1# Copyright 1999, 2000, 2002 Free Software Foundation, Inc. 2 3# This program is free software; you can redistribute it and/or modify 4# it under the terms of the GNU General Public License as published by 5# the Free Software Foundation; either version 2 of the License, or 6# (at your option) any later version. 7# 8# This program is distributed in the hope that it will be useful, 9# but WITHOUT ANY WARRANTY; without even the implied warranty of 10# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 11# GNU General Public License for more details. 12# 13# You should have received a copy of the GNU General Public License 14# along with this program; if not, write to the Free Software 15# Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 16 17# Please email any bugs, comments, and/or additions to this file to: 18# hp@axis.com 19 20# Written by Axis Communications AB. 21 22# --- This function copied from arc.exp and rewritten to fit CRIS --- 23# 24# Test an insn from a template .s/.d. 25# The best way to create the .d file is to run the tests without it, let 26# dejagnu crash, run as.new on the just built .s file, run objdump -dr on 27# the result of that, copy the result into the .d file, and edit in the 28# necessary patterns (@OC@, etc.). Sounds complicated but it's easy. The 29# catch is that we assume a working assembler is used to build it. That's 30# obviously not entirely kosher, but once the .d file is created one can 31# verify it's contents over time. 32# 33# Template patterns: 34# @OC@ - placeholder for the opcode 35# @OR@ - placeholder for extra replacement to distinguish similar 36# testcases. 37# @IR+????@ - placeholder for (e.g.) register-operand insn code 38# @IM+????@ - placeholder for (e.g.) memory-operand insn code. 39 40proc test_template_insn_reg_mem { args } { 41 # tmpl opcode ircode imcode avoid_regex dname ircode0 42 # imcode0 [regex replace OR_replace] 43 global srcdir subdir objdir 44 45 set tmpl [lindex $args 0] 46 set opcode [lindex $args 1] 47 set ircode [lindex $args 2] 48 set imcode [lindex $args 3] 49 set avoid_regex [lindex $args 4] 50 set dname [lindex $args 5] 51 set ircode0 [lindex $args 6] 52 set imcode0 [lindex $args 7] 53 54 if { [llength $args] >= 10 } { 55 set replace_regex [lindex $args 8] 56 set replacement [lindex $args 9] 57 } else { 58 set replace_regex "" 59 } 60 61 # Any extra replacements (like modifying the test name to something 62 # else than the @OC@ modification). Replaces occurences of @OR@. 63 if { [llength $args] >= 11 } then { 64 set extra_OR_replace [lindex $args 10] 65 } else { 66 set extra_OR_replace "" 67 } 68 69 # Get the parts that we will wedge into the insn. 70 if [regexp "(.)(.)(.)" $imcode junk imcode3 imcode2 imcode1] { 71 set imcode3 [expr "0x$imcode3" ] 72 } else { 73 regexp "(.)(.)" $imcode junk imcode2 imcode1 74 set imcode3 0 75 } 76 set imcode1 [expr "0x$imcode1" ] 77 set imcode2 [expr "0x$imcode2" ] 78 79 if [regexp "(.)(.)(.)" $ircode junk ircode3 ircode2 ircode1] { 80 set ircode3 [expr "0x$ircode3" ] 81 } else { 82 regexp "(.)(.)" $ircode junk ircode2 ircode1 83 set ircode3 0 84 } 85 set ircode1 [expr "0x$ircode1" ] 86 set ircode2 [expr "0x$ircode2" ] 87 88 # To avoid fiddling with the generated .d-file, we have a 89 # parameter saying what ircode, imcode to subtract. 90 if [regexp "(.)(.)(.)" $imcode0 junk imcode03 imcode02 imcode01] { 91 set imcode03 [expr "0x$imcode03" ] 92 } else { 93 regexp "(.)(.)" $imcode0 junk imcode02 imcode01 94 set imcode03 0 95 } 96 set imcode01 [expr "0x$imcode01" ] 97 set imcode02 [expr "0x$imcode02" ] 98 99 if [regexp "(.)(.)(.)" $ircode0 junk ircode03 ircode02 ircode01] { 100 set ircode03 [expr "0x$ircode03" ] 101 } else { 102 regexp "(.)(.)" $ircode0 junk ircode02 ircode01 103 set ircode03 0 104 } 105 106 set ircode01 [expr "0x$ircode01" ] 107 set ircode02 [expr "0x$ircode02" ] 108 109 # The output template may be in another file than what the 110 # source template is. 111 if [string match $dname ""] { 112 set dname $tmpl 113 } 114 115 # Change @OC@ in the template file to $opcode 116 117 set in_fd [open $srcdir/$subdir/$tmpl.s r] 118 set out_fd [open $objdir/$opcode-test.s w] 119 # FIXME: check return codes 120 121 while { [gets $in_fd line] >= 0 } { 122 if { [string match "" "$avoid_regex"] \ 123 || ![regexp "$avoid_regex" $line] } { 124 125 # verbose "Keeping $line for $opcode" 126 127 # If caller passed a replacement regex, use it. 128 if ![string match "" "$replace_regex"] { 129 # verbose "Replacing $line with ..." 130 regsub $replace_regex $line $replacement line 131 # verbose "... $line" 132 } 133 regsub "@OC@" $line $opcode line 134 135 puts $out_fd $line 136 } else { 137 # verbose "Skipping $line for $opcode" 138 } 139 } 140 141 close $in_fd 142 close $out_fd 143 144 # Create output template. 145 146 set in_fd [open $srcdir/$subdir/$dname.d r] 147 set out_fd [open $objdir/$opcode-test.d w] 148 # FIXME: check return codes 149 150 while { [gets $in_fd line] >= 0 } { 151 regsub "@OC@" $line $opcode line 152 #send_user "$line\n" 153 154 regsub "@OR@" $line $extra_OR_replace line 155 156 if [string match "*@IM+????@*" $line] { 157 # Insert the memory opcode. imcode2 occupies the high four bits 158 # of the first (presented as leftmost) byte of the 159 # IC parameter, and imcode1 the low four bits of the second 160 # (rightmost) byte. 161 regexp "^(.*)@IM\\+(.)(.)(.)(.)@(.*)$" \ 162 $line junk leftpart n1 n2 n3 n4 rightpart 163 # verbose "IM $n1 $n2 $n3 $n4 ($imcode1 $imcode2 $imcode3 $imcode01 $imcode02 $imcode03)" 164 165 set n1 [expr 0x$n1 - $imcode01 ] 166 set n3 [expr 0x$n3 - $imcode03 ] 167 set n4 [expr 0x$n4 - $imcode02 ] 168 169 set n [expr ($imcode1 << 12) + ($n1 << 12) + (0x$n2 << 8) \ 170 + ($n3 << 4) + ($imcode3 << 4) + $n4 + $imcode2 ] 171 set n [format "%04x" $n] 172 puts $out_fd "$leftpart$n$rightpart" 173 } elseif [string match "*@IR+????@*" $line] { 174 # As IM, but use the register opcode. 175 regexp "^(.*)@IR\\+(.)(.)(.)(.)@(.*)$" \ 176 $line junk leftpart n1 n2 n3 n4 rightpart 177 # verbose "IR $n1 $n2 $n3 $n4 ($ircode1 $ircode2 $ircode3 $ircode01 $ircode02 $ircode03)" 178 179 set n1 [expr 0x$n1 - $ircode01 ] 180 set n3 [expr 0x$n3 - $ircode03 ] 181 set n4 [expr 0x$n4 - $ircode02 ] 182 183 set n [expr ($ircode1 << 12) + ($n1 << 12) + (0x$n2 << 8) \ 184 + ($n3 << 4) + ($ircode3 << 4) + $n4 + $ircode2 ] 185 set n [format "%04x" $n] 186 puts $out_fd "$leftpart$n$rightpart" 187 } else { 188 puts $out_fd $line 189 } 190 } 191 192 close $in_fd 193 close $out_fd 194 195 # Finally, run the test. 196 197 run_dump_test $objdir/$opcode-test 198 199 # "make clean" won't delete these, so for now we must. 200 catch "exec rm -f $objdir/$opcode-test.s $objdir/$opcode-test.d" 201} 202# --- End of arc.exp borrow --- 203 204proc test_template_insn_reg { args } { 205# tmpl opcode ircode avoid_regex dname ircode0 [regex replace OR_replace] 206 if { [llength $args] == 6 } { 207 test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] \ 208 [lindex $args 2] 00 [lindex $args 3] [lindex $args 4] \ 209 [lindex $args 5] 00 210 } elseif { [llength $args] == 9 } { 211 test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] \ 212 [lindex $args 2] 00 [lindex $args 3] [lindex $args 4] \ 213 [lindex $args 5] 00 [lindex $args 6] [lindex $args 7] \ 214 [lindex $args 8] 215 } else { 216 test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] \ 217 [lindex $args 2] 00 [lindex $args 3] [lindex $args 4] \ 218 [lindex $args 5] 00 [lindex $args 6] [lindex $args 7] 219 } 220} 221 222# For insn with only memory operands. 223proc test_template_insn_mem { args } { 224# tmpl opcode imcode avoid_regex dname imcode0 [regex replace] 225 if { [llength $args] == 6 } { 226 test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] 00 \ 227 [lindex $args 2] [lindex $args 3] [lindex $args 4] 00 \ 228 [lindex $args 5] 229 } else { 230 test_template_insn_reg_mem [lindex $args 0] [lindex $args 1] 00 \ 231 [lindex $args 2] [lindex $args 3] [lindex $args 4] 00 \ 232 [lindex $args 5] [lindex $args 6] [lindex $args 7] 233 } 234} 235 236# For insn without substitutions in the output pattern. 237proc test_template_insn_single { tmpl opcode avoid_regex dname } { 238 test_template_insn_reg_mem $tmpl $opcode 00 00 "$avoid_regex" $dname 00 00 239} 240 241# For iteration over special registers. Spec reg name in "regname", 242# number in "regno". Type (size) in "regtype". Size-patterns to avoid 243# in input_avoid. 244proc to_sreg { regname regno regtype input_avoid } { 245 test_template_insn_reg_mem binop move \ 246 [format "%0x63" $regno] [format "%0xa3" $regno] \ 247 ",r\[0-9\]+,r\[0-9\]|@OC@\[^\\.\]|$input_avoid" \ 248 "x-to-$regtype-sreg" 063 0a3 \ 249 "@OC@\[^ \]+ (.*),r\[0-9\]+" [format "@OC@ \\1,%s" $regname] \ 250 $regname 251} 252 253# As to_sreg, but using unop, since we don't need to test constants. 254proc sreg_to { regname regno regtype input_avoid } { 255 test_template_insn_reg_mem unop move \ 256 [format "%0x67" $regno] [format "%0xa7" $regno] \ 257 "@OC@\\." "sreg-to-x" 067 0a7 \ 258 "@OC@ (.*)" [format "@OC@ %s,\\1" $regname] $regname 259} 260 261# Replace registers in pushpop 262proc push_pop { regname regno regtype input_avoid } { 263 test_template_insn_reg_mem pushpop pushpop-sreg \ 264 00 [format "%0x00" $regno] \ 265 "$input_avoid" "pushpop-$regtype-sreg" 00 000 \ 266 "(\\.\[bwd\])? ((\[^, \]*,)?)r\[0-9\]+((,.*)?)" " \\2$regname\\4" $regname 267} 268 269# 270# Iterate over spec reg names and spec reg numbers. 271# 272proc do_spec_regs { inner_function spec_reg_list } { 273 for { set i 0 } { $i < [llength $spec_reg_list] } { incr i } { 274 set regname [lindex [lindex $spec_reg_list $i] 0] 275 set regno [lindex [lindex $spec_reg_list $i] 1] 276 277 set regtype [lindex [lindex $spec_reg_list $i] 2] 278 set input_avoid [lindex [lindex $spec_reg_list $i] 3] 279 280 # verbose "$regname $regno $regtype $input_avoid" 281 $inner_function $regname $regno $regtype $input_avoid 282 } 283} 284 285if [istarget cris-*-*] then { 286 # Note that registers are missing, since the assembler will 287 # rightfully emit errors for registers that are not in current 288 # silicon. Those are currently p2 and p3. 289 # Note the special for dcr1, since it has different size for 290 # different silicon, which matters for assembling and displaying 291 # "immediate constants". 292 set spec_reg_list [list \ 293 [list p0 0 "byte" "(@OC@|move)\\.\[wd\]" ] \ 294 [list p1 1 "byte" "(@OC@|move)\\.\[wd\]" ] \ 295 [list vr 1 "byte" "(@OC@|move)\\.\[wd\]" ] \ 296 [list p4 4 "word" "(@OC@|move)\\.\[bd\]" ] \ 297 [list p5 5 "word" "(@OC@|move)\\.\[bd\]" ] \ 298 [list ccr 5 "word" "(@OC@|move)\\.\[bd\]" ] \ 299 [list p6 6 "word" "(@OC@|move)\\.\[bd\]" ] \ 300 [list dcr0 6 "word" "(@OC@|move)\\.\[bd\]" ] \ 301 [list p7 7 "dword" "(@OC@|move)\\.\[bw\]" ] \ 302 [list dcr1 7 "dcr1" "(@OC@|move)\\.\[bd\]" ] \ 303 [list p8 8 "dword" "(@OC@|move)\\.\[bw\]" ] \ 304 [list p9 9 "dword" "(@OC@|move)\\.\[bw\]" ] \ 305 [list ibr 9 "dword" "(@OC@|move)\\.\[bw\]" ] \ 306 [list p10 10 "dword" "(@OC@|move)\\.\[bw\]" ] \ 307 [list irp 10 "dword" "(@OC@|move)\\.\[bw\]" ] \ 308 [list p11 11 "dword" "(@OC@|move)\\.\[bw\]" ] \ 309 [list srp 11 "dword" "(@OC@|move)\\.\[bw\]" ] \ 310 [list p12 12 "dword" "(@OC@|move)\\.\[bw\]" ] \ 311 [list bar 12 "dword" "(@OC@|move)\\.\[bw\]" ] \ 312 [list dtp0 12 "dword" "(@OC@|move)\\.\[bw\]" ] \ 313 [list p13 13 "dword" "(@OC@|move)\\.\[bw\]" ] \ 314 [list dccr 13 "dword" "(@OC@|move)\\.\[bw\]" ] \ 315 [list dtp1 13 "dword" "(@OC@|move)\\.\[bw\]" ] \ 316 [list p14 14 "dword" "(@OC@|move)\\.\[bw\]" ] \ 317 [list brp 14 "dword" "(@OC@|move)\\.\[bw\]" ] \ 318 [list p15 15 "dword" "(@OC@|move)\\.\[bw\]" ]] 319 320 # Test basic instructions. Note that this will actually 321 # test both the assembler and the disassembler functionality. 322 #untested ".weak reduction" 323 #untested "Old regressions" 324 #untested "LX" 325 #untested "case recognition (disassembler)" 326 #untested "disassembling special regs" 327 #untested "disassembling unimplemented special regs" 328 329 # *PLEASE* make new "simple" run_dump_test-tests match "rd-*.d", so 330 # they will be picked up automatically through this construct. This 331 # so you don't need to change cris.exp. (As perhaps should have been 332 # originally done for cases below, but which is not worth fixing now.) 333 set rd_test_list [lsort [glob -nocomplain $srcdir/$subdir/rd-*.d]] 334 for { set i 0 } { $i < [llength $rd_test_list] } { incr i } { 335 # We need to strip the ".d", but can leave the dirname. 336 verbose [file rootname [lindex $rd_test_list $i]] 337 run_dump_test [file rootname [lindex $rd_test_list $i]] 338 } 339 340 # Broken word handling got erroneously triggers for this and 341 # got out-of-bounds errors. 342 # FIXME: Check closer that this gets the expected results and fix 343 # the general use of difference-expressions in binop.s and elsewhere. 344 gas_test "binop-segref.s" "" "" "False broken words" 345 346 # Really orthogonal instructions. 347 test_template_insn_reg_mem binop add 60 a0 "@OC@\[^\\.\]" "" 60 a0 348 test_template_insn_reg_mem binop sub 68 a8 "@OC@\[^\\.\]" "" 60 a0 349 test_template_insn_reg_mem binop bound 5c 9c "@OC@\[^\\.\]" "" 60 a0 350 test_template_insn_reg_mem binop and 70 b0 "@OC@\[^\\.\]" "" 60 a0 351 test_template_insn_reg_mem binop or 74 b4 "@OC@\[^\\.\]" "" 60 a0 352 353 # Unary (two-operand) insns, otherwise as above. 354 test_template_insn_reg_mem binop cmp 6c ac \ 355 ",r\[0-9\]+,r\[0-9\]|@OC@\[^\\.\]" "binop-cmpmove" 64 a4 356 # This is of course only the move-to-register one. 357 test_template_insn_reg_mem binop move 64 a4 \ 358 ",r\[0-9\]+,r\[0-9\]|@OC@\[^\\.\]" "binop-cmpmove" 64 a4 359 360 # No dword size - operations with sign- or zero-extend on 361 # the mem or reg operand. 362 test_template_insn_reg_mem binop addu 40 80 \ 363 "@\\.d|@OC@\[^\\.\]" "binop-extx" 40 80 364 test_template_insn_reg_mem binop adds 42 82 \ 365 "@\\.d|@OC@\[^\\.\]" "binop-extx" 40 80 366 test_template_insn_reg_mem binop subu 48 88 \ 367 "@\\.d|@OC@\[^\\.\]" "binop-extx" 40 80 368 test_template_insn_reg_mem binop subs 4a 8a \ 369 "@\\.d|@OC@\[^\\.\]" "binop-extx" 40 80 370 371 # The two constraints above combined, and no reg-to-reg - 372 # cmps, cmpu, movs, movu. We have to test reg-to-reg 373 # separately for movs and movu. 374 test_template_insn_mem binop movs 86 \ 375 "r\[0-9\]+,r\[0-9\]+|@\\.d|@OC@\[^\\.\]" "binop-cmpmovx" 84 376 test_template_insn_mem binop movu 84 \ 377 "r\[0-9\]+,r\[0-9\]+|@\\.d|@OC@\[^\\.\]" "binop-cmpmovx" 84 378 test_template_insn_mem binop cmps 8e \ 379 "r\[0-9\]+,r\[0-9\]+|@\\.d|@OC@\[^\\.\]" "binop-cmpmovx" 84 380 test_template_insn_mem binop cmpu 8c \ 381 "r\[0-9\]+,r\[0-9\]+|@\\.d|@OC@\[^\\.\]" "binop-cmpmovx" 84 382 383 # Reg-to-memory. FIXME: Perhaps we should use unop.s for 384 # everything, and insert registers (including special 385 # registers) for all reg-to-mem and mem-to-reg insn tests. 386 test_template_insn_mem binop move.b bc "@OC@\\." "reg-to-mem" bc 387 test_template_insn_mem binop move.w bd "@OC@\\." "reg-to-mem" bc 388 test_template_insn_mem binop move.d be "@OC@\\." "reg-to-mem" bc 389 test_template_insn_mem binop movem bf "@OC@\\." "reg-to-mem" bc 390 391 # Use the replace-regex functionality to reverse the 392 # operands for movem. 393 test_template_insn_mem binop movem 00 "@OC@\\." "movem-to-reg" 00 \ 394 "@OC@ r(\[0-9\]+),\\\[(.*)\\\]" "@OC@ \[\\2\],r\\1" 395 396 # The unary operations are too irregular to make a pattern 397 # of the output. 398 test_template_insn_single unop test "@OC@\[^\\.\]" "test" 399 test_template_insn_single unop clear "@OC@\[^\\.\]" "clear" 400 401 # Quick-operand tests. 402 # 403 # Unsigned 5-bits: btstq, asrq, lslq, lsrq. 404 test_template_insn_reg quick btstq 38 "s6|u6" "quick-u5" 38 405 test_template_insn_reg quick asrq 3a "s6|u6" "quick-u5" 38 406 test_template_insn_reg quick lslq 3c "s6|u6" "quick-u5" 38 407 test_template_insn_reg quick lsrq 3e "s6|u6" "quick-u5" 38 408 409 # Signed 6-bits: moveq, cmpq, andq, orq. 410 test_template_insn_reg quick moveq 24 "u6" "quick-s6" 24 411 test_template_insn_reg quick cmpq 2c "u6" "quick-s6" 24 412 test_template_insn_reg quick andq 30 "u6" "quick-s6" 24 413 test_template_insn_reg quick orq 34 "u6" "quick-s6" 24 414 415 # Unsigned 6-bits: addq, subq. 416 test_template_insn_reg quick addq 20 "s6" "quick-u6" 20 417 test_template_insn_reg quick subq 28 "s6" "quick-u6" 20 418 419 # Register-to-register instructions, for each size. 420 test_template_insn_reg regreg movu.b 44 "" "" 44 421 test_template_insn_reg regreg movu.w 45 "" "" 44 422 test_template_insn_reg regreg movs.b 46 "" "" 44 423 test_template_insn_reg regreg movs.w 47 "" "" 44 424 test_template_insn_reg regreg lsl.b 4c "" "" 44 425 test_template_insn_reg regreg lsl.w 4d "" "" 44 426 test_template_insn_reg regreg lsl.d 4e "" "" 44 427 test_template_insn_reg regreg neg.b 58 "" "" 44 428 test_template_insn_reg regreg neg.w 59 "" "" 44 429 test_template_insn_reg regreg neg.d 5a "" "" 44 430 test_template_insn_reg regreg asr.b 78 "" "" 44 431 test_template_insn_reg regreg asr.w 79 "" "" 44 432 test_template_insn_reg regreg asr.d 7a "" "" 44 433 test_template_insn_reg regreg lsr.b 7c "" "" 44 434 test_template_insn_reg regreg lsr.w 7d "" "" 44 435 test_template_insn_reg regreg lsr.d 7e "" "" 44 436 test_template_insn_reg regreg btst 4f "" "" 44 437 test_template_insn_reg regreg abs 6b "" "" 44 438 test_template_insn_reg regreg dstep 6f "" "" 44 439 test_template_insn_reg regreg xor 7b "" "" 44 440 test_template_insn_reg regreg mstep 7f "" "" 44 441 442 # The various incarnations of the swap(n) insn. 443 set nwbr_list [list [list "not" 877] \ 444 [list "swapw" 477] \ 445 [list "swapnw" c77] \ 446 [list "swapb" 277] \ 447 [list "swapnb" a77] \ 448 [list "swapwb" 677] \ 449 [list "swapnwb" e77] \ 450 [list "swapr" 177] \ 451 [list "swapnr" 977] \ 452 [list "swapwr" 577] \ 453 [list "swapnwr" d77] \ 454 [list "swapbr" 377] \ 455 [list "swapnbr" b77] \ 456 [list "swapwbr" 777] \ 457 [list "swapnwbr" f77]] 458 459 for { set i 0 } { $i < [llength $nwbr_list] } { incr i } { 460 set name [lindex [lindex $nwbr_list $i] 0] 461 set number [lindex [lindex $nwbr_list $i] 1] 462 463 test_template_insn_reg regreg $name $number "" "oneop-type" 877 \ 464 ",r\[0-9]+" "" $name 465 } 466 467 # And one extra for the one that is canonicalized as "not". 468 test_template_insn_reg regreg swapn 877 "" "oneop-type" 877 \ 469 ",r\[0-9]+" "" not 470 471 # And take the opportunity to make sure that the assembler 472 # recognizes StUDlYCaPs. 473 test_template_insn_reg regreg SWAPN 877 "" "oneop-type" 877 \ 474 ",r\[0-9]+" "" not 475 test_template_insn_reg regreg Swapn 877 "" "oneop-type" 877 \ 476 ",r\[0-9]+" "" not 477 test_template_insn_reg regreg sWApN 877 "" "oneop-type" 877 \ 478 ",r\[0-9]+" "" not 479 480 # Fixed-size unary memory instructions. 481 test_template_insn_mem unop jsr b93 "@OC@\\." "jump-type" b93 482 test_template_insn_mem unop jump 093 "@OC@\\." "jump-type" b93 483 test_template_insn_mem unop jir a93 "@OC@\\." "jump-type" b93 484 485 # Non-templated tests. 486 run_dump_test "ccr" 487 run_dump_test "scc" 488 run_dump_test "pushpop" 489 run_dump_test "prefix" 490 run_dump_test "unimplemented" 491 run_dump_test "return" 492 run_dump_test "branch" 493 run_dump_test "separator" 494 run_dump_test "diffexp-ovwr" 495 run_dump_test "continue" 496 run_dump_test "nosep" 497 run_dump_test "labfloat" 498 run_dump_test "bork" 499 500 # This seems like a generic expression evaluation problem. 501 setup_xfail "cris-*-*" 502 run_dump_test "shexpr-1" 503 504 # The "@" will be erroneously interpreted as a line-separator in a 505 # macro here-label marker: "\@". 506 setup_xfail "cris-*-*" 507 run_dump_test "macroat" 508 509 # "\x20a" will be recognized as "\n" rather than " a" 510 setup_xfail "cris-*-*" 511 run_dump_test "string-1" 512 # Same as above, but removed the failing case to make sure the rest 513 # still works. 514 run_dump_test "string-2" 515 516 # Usable (non-redundant) and refreshed bits from the old, manual, 517 # test suite. 518 run_dump_test "brokw-1" 519 run_dump_test "brokw-2" 520 run_dump_test "brokw-3" 521 run_dump_test "fragtest" 522 523 # Addi is too irregular to bother applying templates to. 524 run_dump_test "addi" 525 526 # Test {mem (including constants), reg}-to/from-spec-reg. 527 do_spec_regs to_sreg $spec_reg_list 528 do_spec_regs sreg_to $spec_reg_list 529 do_spec_regs push_pop $spec_reg_list 530 531 # Additional insns for CRIS v3: 532 run_dump_test "break" 533 test_template_insn_reg regreg lz 73 "" "" 44 534 535 # Additional insns for CRIS v8 (also the swapxxx insns other than "not" above). 536 test_template_insn_mem unop jirc 293 "@OC@\\." "jump-type" b93 537 test_template_insn_mem unop jsrc 393 "@OC@\\." "jump-type" b93 538 test_template_insn_mem unop jbrc 693 "@OC@\\." "jump-type" b93 539 540 # Additional insns for CRIS v10: 541 test_template_insn_reg regreg mulu.b 90 "" "" 44 542 test_template_insn_reg regreg mulu.w 91 "" "" 44 543 test_template_insn_reg regreg mulu.d 92 "" "" 44 544 test_template_insn_reg regreg muls.b d0 "" "" 44 545 test_template_insn_reg regreg muls.w d1 "" "" 44 546 test_template_insn_reg regreg muls.d d2 "" "" 44 547 test_template_insn_mem unop sbfs 3b7 "@OC@\\.| r\[0-9\]+$" "unop-mem" 3b7 548 test_template_insn_mem unop rbf 3b3 "@OC@\\.| r\[0-9\]+$" "unop-mem" 3b7 549 test_template_insn_mem unop jmpu 893 "@OC@\\.| r\[0-9\]+$" "unop-mem" 3b7 550 551 # Some dg-tests, which seems the easiest way to test error 552 # cases. Keeping it here at the end avoids getting a 553 # "Tcl_RegisterChannel: duplicate channel names" error, and 554 # I don't see a cause to put this in a separate file. Hey, 555 # isn't dg-finish supposed to make things (like this case) 556 # fine? 557 load_lib gas-dg.exp 558 dg-init 559 dg-runtest [lsort [glob -nocomplain $srcdir/$subdir/*-err-*.s $srcdir/$subdir/*-warn-*.s]] "" "" 560 dg-finish 561} 562