1# Source file to test assembly of SB-1 MDMX subset instructions and extensions. 2# 3# SB-1 implements only the .ob MDMX instructions, and adds three additional 4# MDMX-ish instructions (pabsdiff, pabsdiffc, pavg). 5 6 .set noreorder 7 .set noat 8 9 .globl text_label .text 10text_label: 11 12 # The normal MDMX instructions: 13 14 movf.l $v1, $v12, $fcc5 15 16 movn.l $v1, $v12, $18 17 18 movt.l $v1, $v12, $fcc5 19 20 movz.l $v1, $v12, $18 21 22 add.ob $v1, $v12, 18 23 add.ob $v1, $v12, $v18 24 add.ob $v1, $v12, $v18[6] 25 26 adda.ob $v12, 18 27 adda.ob $v12, $v18 28 adda.ob $v12, $v18[6] 29 30 addl.ob $v12, 18 31 addl.ob $v12, $v18 32 addl.ob $v12, $v18[6] 33 34 alni.ob $v1, $v12, $v18, 6 35 36 alnv.ob $v1, $v12, $v18, $21 37 38 and.ob $v1, $v12, 18 39 and.ob $v1, $v12, $v18 40 and.ob $v1, $v12, $v18[6] 41 42 c.eq.ob $v12, 18 43 c.eq.ob $v12, $v18 44 c.eq.ob $v12, $v18[6] 45 46 c.le.ob $v12, 18 47 c.le.ob $v12, $v18 48 c.le.ob $v12, $v18[6] 49 50 c.lt.ob $v12, 18 51 c.lt.ob $v12, $v18 52 c.lt.ob $v12, $v18[6] 53 54 max.ob $v1, $v12, 18 55 max.ob $v1, $v12, $v18 56 max.ob $v1, $v12, $v18[6] 57 58 min.ob $v1, $v12, 18 59 min.ob $v1, $v12, $v18 60 min.ob $v1, $v12, $v18[6] 61 62 mul.ob $v1, $v12, 18 63 mul.ob $v1, $v12, $v18 64 mul.ob $v1, $v12, $v18[6] 65 66 mula.ob $v12, 18 67 mula.ob $v12, $v18 68 mula.ob $v12, $v18[6] 69 70 mull.ob $v12, 18 71 mull.ob $v12, $v18 72 mull.ob $v12, $v18[6] 73 74 muls.ob $v12, 18 75 muls.ob $v12, $v18 76 muls.ob $v12, $v18[6] 77 78 mulsl.ob $v12, 18 79 mulsl.ob $v12, $v18 80 mulsl.ob $v12, $v18[6] 81 82 nor.ob $v1, $v12, 18 83 nor.ob $v1, $v12, $v18 84 nor.ob $v1, $v12, $v18[6] 85 86 or.ob $v1, $v12, 18 87 or.ob $v1, $v12, $v18 88 or.ob $v1, $v12, $v18[6] 89 90 pickf.ob $v1, $v12, 18 91 pickf.ob $v1, $v12, $v18 92 pickf.ob $v1, $v12, $v18[6] 93 94 pickt.ob $v1, $v12, 18 95 pickt.ob $v1, $v12, $v18 96 pickt.ob $v1, $v12, $v18[6] 97 98 rach.ob $v1 99 100 racl.ob $v1 101 102 racm.ob $v1 103 104 rnau.ob $v1, 18 105 rnau.ob $v1, $v18 106 rnau.ob $v1, $v18[6] 107 108 rneu.ob $v1, 18 109 rneu.ob $v1, $v18 110 rneu.ob $v1, $v18[6] 111 112 rzu.ob $v1, 18 113 rzu.ob $v1, $v18 114 rzu.ob $v1, $v18[6] 115 116 shfl.mixh.ob $v1, $v12, $v18 117 118 shfl.mixl.ob $v1, $v12, $v18 119 120 shfl.pach.ob $v1, $v12, $v18 121 122 shfl.upsl.ob $v1, $v12, $v18 123 124 sll.ob $v1, $v12, 18 125 sll.ob $v1, $v12, $v18 126 sll.ob $v1, $v12, $v18[6] 127 128 srl.ob $v1, $v12, 18 129 srl.ob $v1, $v12, $v18 130 srl.ob $v1, $v12, $v18[6] 131 132 sub.ob $v1, $v12, 18 133 sub.ob $v1, $v12, $v18 134 sub.ob $v1, $v12, $v18[6] 135 136 suba.ob $v12, 18 137 suba.ob $v12, $v18 138 suba.ob $v12, $v18[6] 139 140 subl.ob $v12, 18 141 subl.ob $v12, $v18 142 subl.ob $v12, $v18[6] 143 144 wach.ob $v12 145 146 wacl.ob $v12, $v18 147 148 xor.ob $v1, $v12, 18 149 xor.ob $v1, $v12, $v18 150 xor.ob $v1, $v12, $v18[6] 151 152 153 # The extensions: 154 155 pabsdiff.ob $v1, $v12, 18 156 pabsdiff.ob $v1, $v12, $v18 157 pabsdiff.ob $v1, $v12, $v18[6] 158 159 pabsdiffc.ob $v12, 18 160 pabsdiffc.ob $v12, $v18 161 pabsdiffc.ob $v12, $v18[6] 162 163 pavg.ob $v1, $v12, 18 164 pavg.ob $v1, $v12, $v18 165 pavg.ob $v1, $v12, $v18[6] 166 167 168# Force at least 8 (non-delay-slot) zero bytes, to make 'objdump' print ... 169 .space 8 170