1/* Linker script for 68HC11 executable (PROM).  */
2ENTRY(_start)
3OUTPUT_FORMAT("elf32-m68hc11", "elf32-m68hc11", "elf32-m68hc11")
4OUTPUT_ARCH(m68hc11)
5
6GROUP(-lc -lbcc -lgcc)
7SEARCH_DIR(.);
8/* Fixed definition of the available memory banks.
9   See generic emulation script for a user defined configuration.  */
10
11/* The memory layout below is suitable for gcc validation.
12   It takes care of big programs allowing up to 48128 bytes
13   of text while allowing some programs that consume some
14   memory (comp-goto-1 requires the RAM to be set to 0x4400
15   to avoid head<->stack collision in malloc/sbrk).  */
16MEMORY
17{
18  page0 (rwx) : ORIGIN = 0x00, LENGTH = 256
19  text  (rx)  : ORIGIN = 0x04400, LENGTH = 0x10000 - 0x4400
20  data        : ORIGIN = 0x01100, LENGTH = 0x2000 - 0x1100
21}
22/* Setup the stack on the top of the data memory bank.  */
23PROVIDE (_stack = 0x04400 - 1);
24SECTIONS
25{
26  .hash          : { *(.hash)		}
27  .dynsym        : { *(.dynsym)		}
28  .dynstr        : { *(.dynstr)		}
29  .gnu.version		  : { *(.gnu.version) }
30  .gnu.version_d	  : { *(.gnu.version_d) }
31  .gnu.version_r	  : { *(.gnu.version_r) }
32  .rel.text      :
33    {
34      *(.rel.text)
35      *(.rel.text.*)
36      *(.rel.gnu.linkonce.t.*)
37    }
38  .rela.text     :
39    {
40      *(.rela.text)
41      *(.rela.text.*)
42      *(.rela.gnu.linkonce.t.*)
43    }
44  .rel.data      :
45    {
46      *(.rel.data)
47      *(.rel.data.*)
48      *(.rel.gnu.linkonce.d.*)
49    }
50  .rela.data     :
51    {
52      *(.rela.data)
53      *(.rela.data.*)
54      *(.rela.gnu.linkonce.d.*)
55    }
56  .rel.rodata    :
57    {
58      *(.rel.rodata)
59      *(.rel.rodata.*)
60      *(.rel.gnu.linkonce.r.*)
61    }
62  .rela.rodata   :
63    {
64      *(.rela.rodata)
65      *(.rela.rodata.*)
66      *(.rela.gnu.linkonce.r.*)
67    }
68  .rel.sdata     :
69    {
70      *(.rel.sdata)
71      *(.rel.sdata.*)
72      *(.rel.gnu.linkonce.s.*)
73    }
74  .rela.sdata     :
75    {
76      *(.rela.sdata)
77      *(.rela.sdata.*)
78      *(.rela.gnu.linkonce.s.*)
79    }
80  .rel.sbss      :
81    {
82      *(.rel.sbss)
83      *(.rel.sbss.*)
84      *(.rel.gnu.linkonce.sb.*)
85    }
86  .rela.sbss     :
87    {
88      *(.rela.sbss)
89      *(.rela.sbss.*)
90      *(.rel.gnu.linkonce.sb.*)
91    }
92  .rel.bss       :
93    {
94      *(.rel.bss)
95      *(.rel.bss.*)
96      *(.rel.gnu.linkonce.b.*)
97    }
98  .rela.bss      :
99    {
100      *(.rela.bss)
101      *(.rela.bss.*)
102      *(.rela.gnu.linkonce.b.*)
103    }
104  .rela.stext		  : { *(.rela.stest) }
105  .rela.etext		  : { *(.rela.etest) }
106  .rela.sdata		  : { *(.rela.sdata) }
107  .rela.edata		  : { *(.rela.edata) }
108  .rela.eit_v		  : { *(.rela.eit_v) }
109  .rela.ebss		  : { *(.rela.ebss) }
110  .rela.srodata		  : { *(.rela.srodata) }
111  .rela.erodata		  : { *(.rela.erodata) }
112  .rela.got		  : { *(.rela.got) }
113  .rela.ctors		  : { *(.rela.ctors) }
114  .rela.dtors		  : { *(.rela.dtors) }
115  .rela.init		  : { *(.rela.init) }
116  .rela.fini		  : { *(.rela.fini) }
117  .rela.plt		  : { *(.rela.plt) }
118  .rel.stext		  : { *(.rel.stest) }
119  .rel.etext		  : { *(.rel.etest) }
120  .rel.sdata		  : { *(.rel.sdata) }
121  .rel.edata		  : { *(.rel.edata) }
122  .rel.ebss		  : { *(.rel.ebss) }
123  .rel.eit_v		  : { *(.rel.eit_v) }
124  .rel.srodata		  : { *(.rel.srodata) }
125  .rel.erodata		  : { *(.rel.erodata) }
126  .rel.got		  : { *(.rel.got) }
127  .rel.ctors		  : { *(.rel.ctors) }
128  .rel.dtors		  : { *(.rel.dtors) }
129  .rel.init		  : { *(.rel.init) }
130  .rel.fini		  : { *(.rel.fini) }
131  .rel.plt		  : { *(.rel.plt) }
132  /* Concatenate .page0 sections.  Put them in the page0 memory bank
133     unless we are creating a relocatable file.  */
134  .page0 :
135  {
136    *(.page0)
137    *(.softregs)
138  }  > page0
139
140  /* Start of text section.  */
141  .stext   :
142  {
143    *(.stext)
144  }  > text
145  .init	  :
146  {
147    *(.init)
148  } =0
149  .text  :
150  {
151    /* Put startup code at beginning so that _start keeps same address.  */
152    /* Startup code.  */
153    *(.install0)	/* Section should setup the stack pointer.  */
154    *(.install1)	/* Place holder for applications.  */
155    *(.install2)	/* Optional installation of data sections in RAM.  */
156    *(.install3)	/* Place holder for applications.  */
157    *(.install4)	/* Section that calls the main.  */
158    *(.init)
159    *(.text)
160    *(.text.*)
161    /* .gnu.warning sections are handled specially by elf32.em.  */
162    *(.gnu.warning)
163    *(.gnu.linkonce.t.*)
164    /* Finish code.  */
165    *(.fini0)		/* Beginning of finish code (_exit symbol).  */
166    *(.fini1)		/* Place holder for applications.  */
167    *(.fini2)		/* C++ destructors.  */
168    *(.fini3)		/* Place holder for applications.  */
169    *(.fini4)		/* Runtime exit.  */
170    _etext = .;
171    PROVIDE (etext = .);
172  }  > text
173  .eh_frame   :
174  {
175    *(.eh_frame)
176  }  > text
177  .rodata    :
178  {
179    *(.rodata)
180    *(.rodata.*)
181    *(.gnu.linkonce.r*)
182  }  > text
183  .rodata1   :
184  {
185    *(.rodata1)
186  }  > text
187  /* Constructor and destructor tables are in ROM.  */
188  .ctors   :
189  {
190     PROVIDE (__CTOR_LIST__ = .);
191    *(.ctors)
192    /* We don't want to include the .ctor section from
193       from the crtend.o file until after the sorted ctors.
194       The .ctor section from the crtend file contains the
195       end of ctors marker and it must be last
196    KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
197    KEEP (*(SORT(.ctors.*)))
198    KEEP (*(.ctors)) */
199     PROVIDE(__CTOR_END__ = .);
200  }  > text
201    .dtors	  :
202  {
203     PROVIDE(__DTOR_LIST__ = .);
204    *(.dtors)
205    /*
206    KEEP (*crtbegin.o(.dtors))
207    KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
208    KEEP (*(SORT(.dtors.*)))
209    KEEP (*(.dtors)) */
210     PROVIDE(__DTOR_END__ = .);
211  }  > text
212  /* Start of the data section image in ROM.  */
213  __data_image = .;
214  PROVIDE (__data_image = .);
215  /* All read-only sections that normally go in PROM must be above.
216     We construct the DATA image section in PROM at end of all these
217     read-only sections.  The data image must be copied at init time.
218     Refer to GNU ld, Section 3.6.8.2 Output Section LMA.  */
219  .data    : AT (__data_image)
220  {
221    __data_section_start = .;
222    PROVIDE (__data_section_start = .);
223    *(.sdata)
224    *(.data)
225    *(.data.*)
226    *(.data1)
227    *(.gnu.linkonce.d.*)
228    CONSTRUCTORS
229    _edata  =  .;
230    PROVIDE (edata = .);
231  }  > data
232  __data_section_size = SIZEOF(.data);
233  PROVIDE (__data_section_size = SIZEOF(.data));
234  __data_image_end = __data_image + __data_section_size;
235/* SCz: this does not work yet... This is supposed to force the loading
236   of _map_data.o (from libgcc.a) when the .data section is not empty.
237   By doing so, this should bring the code that copies the .data section
238   from ROM to RAM at init time.
239  ___pre_comp_data_size = SIZEOF(.data);
240  __install_data_sections = ___pre_comp_data_size > 0 ?
241		__map_data_sections : 0;
242*/
243  /* .install  :
244  {
245    . = _data_image_end;
246  }  > text */
247  /* Relocation for some bss and data sections.  */
248  .bss   :
249  {
250    __bss_start = .;
251    *(.sbss)
252    *(.scommon)
253    *(.dynbss)
254    *(.bss)
255    *(.bss.*)
256    *(.gnu.linkonce.b.*)
257    *(COMMON)
258    PROVIDE (_end = .);
259  }  > data
260  __bss_size = SIZEOF(.bss);
261  PROVIDE (__bss_size = SIZEOF(.bss));
262  /* If the 'vectors_addr' symbol is defined, it indicates the start address
263     of interrupt vectors.  This depends on the 68HC11 operating mode:
264			Addr
265     Single chip	0xffc0
266     Extended mode	0xffc0
267     Bootstrap		0x00c0
268     Test		0xbfc0
269     In general, the vectors address is 0xffc0.  This can be overriden
270     with the '-defsym vectors_addr=0xbfc0' ld option.
271     Note: for the bootstrap mode, the interrupt vectors are at 0xbfc0 but
272     they are redirected to 0x00c0 by the internal PROM.  Application's vectors
273     must also consist of jump instructions (see Motorola's manual).  */
274  PROVIDE (_vectors_addr = DEFINED (vectors_addr) ? vectors_addr : 0xffc0);
275  .vectors DEFINED (vectors_addr) ? vectors_addr : 0xffc0 :
276  {
277    *(.vectors)
278  }
279  /* Stabs debugging sections.  */
280  .stab		 0 : { *(.stab) }
281  .stabstr	 0 : { *(.stabstr) }
282  .stab.excl	 0 : { *(.stab.excl) }
283  .stab.exclstr	 0 : { *(.stab.exclstr) }
284  .stab.index	 0 : { *(.stab.index) }
285  .stab.indexstr 0 : { *(.stab.indexstr) }
286  .comment	 0 : { *(.comment) }
287  /* DWARF debug sections.
288     Symbols in the DWARF debugging sections are relative to the beginning
289     of the section so we begin them at 0.
290     Treatment of DWARF debug section must be at end of the linker
291     script to avoid problems when there are undefined symbols. It's necessary
292     to avoid that the DWARF section is relocated before such undefined
293     symbols are found.  */
294  /* DWARF 1 */
295  .debug	 0 : { *(.debug) }
296  .line		 0 : { *(.line) }
297  /* GNU DWARF 1 extensions */
298  .debug_srcinfo 0 : { *(.debug_srcinfo) }
299  .debug_sfnames 0 : { *(.debug_sfnames) }
300  /* DWARF 1.1 and DWARF 2 */
301  .debug_aranges  0 : { *(.debug_aranges) }
302  .debug_pubnames 0 : { *(.debug_pubnames) }
303  /* DWARF 2 */
304  .debug_info     0 : { *(.debug_info) *(.gnu.linkonce.wi.*) }
305  .debug_abbrev   0 : { *(.debug_abbrev) }
306  .debug_line     0 : { *(.debug_line) }
307  .debug_frame    0 : { *(.debug_frame) }
308  .debug_str      0 : { *(.debug_str) }
309  .debug_loc      0 : { *(.debug_loc) }
310  .debug_macinfo  0 : { *(.debug_macinfo) }
311}
312