12002-07-13 Andrew Cagney <ac131313@redhat.com> 2 3 * cpu.h: Mark file obsolete. 4 * sim-main.h, sim-calls.c, engine.c, cpu.c, alu.h: Ditto. 5 * dc-short, ic-d30v, d30v-insns, Makefile.in: Ditto. 6 72002-06-16 Andrew Cagney <ac131313@redhat.com> 8 9 * configure: Regenerated to track ../common/aclocal.m4 changes. 10 112000-07-05 Nick Clifton <nickc@cygnus.com> 12 13 * d30v-insns: Change minimum loop size limit to 0x10. 14 15Tue May 23 21:39:23 2000 Andrew Cagney <cagney@b1.cygnus.com> 16 17 * configure: Regenerated to track ../common/aclocal.m4 changes. 18 192000-04-12 Frank Ch. Eigler <fche@redhat.com> 20 21 * cpu.h (GPR_CLEAR): New macro. 22 (GPR_SET): Removed macro. 23 24Thu Sep 2 18:15:53 1999 Andrew Cagney <cagney@b1.cygnus.com> 25 26 * configure: Regenerated to track ../common/aclocal.m4 changes. 27 28Wed Sep 1 11:38:21 1999 Andrew Cagney <cagney@b1.cygnus.com> 29 30 * d30v-insns: Cast CIA to LONG in printfs. 31 32Tue Aug 31 01:32:22 1999 Andrew Cagney <cagney@b1.cygnus.com> 33 34 * cpu.h (unqueue_writes): Add declaration. 35 361999-05-27 Michael Meissner <meissner@cygnus.com> 37 38 * d30v-insns (do_repeat): Print a warning if a REPEAT or REPEATI 39 instruction loop is too small. 40 411999-05-08 Felix Lee <flee@cygnus.com> 42 43 * configure: Regenerated to track ../common/aclocal.m4 changes. 44 451999-03-16 Martin Hunt <hunt@cygnus.com> 46 From Frank Ch. Eigler <fche@cygnus.com> 47 48 * cpu.h (mvtsys_left_p): New flag for MVTSYS instruction history. 49 * d30v-insns (mvtsys): Set this flag instead of left_kills_right_p. 50 (do_sath): Detect MVTSYS by new flag. 51 * engine.c (unqueue_writes): Detect MVTSYS by new flag. 52 (do_2_short, do_parallel): Initialize new flag. 53 541999-02-26 Frank Ch. Eigler <fche@cygnus.com> 55 56 * tconfig.in (SIM_HANDLES_LMA): Make it so. 57 581999-01-12 Frank Ch. Eigler <fche@cygnus.com> 59 60 * engine.c (unqueue_writes): Make PSW conflict resolution code 61 conditional - disable it for MVTSYS || insn case. 62 631999-01-11 Frank Ch. Eigler <fche@cygnus.com> 64 65 * d30v-insns (do_sath): Drain PSW write queue before PSW_S_FLAG 66 update. 67 * engine.c (unqueue_writes): Make non-static. Remove PSW_V/VA 68 special case. 69 (do_parallel): Don't drain PSW write queue for MVTSYS || insn. 70 711999-01-07 Frank Ch. Eigler <fche@cygnus.com> 72 73 * d30v-insns (do_ld2h): Sign-extend loaded half-words. 74 751999-01-05 Frank Ch. Eigler <fche@cygnus.com> 76 77 * d30v-insns (do_ld2h): Read memory in word units. 78 (do_ld4bh): Ditto. Correct sign extension. 79 (do_ld4bhu): Ditto. 80 (do_st2h): Write memory in word units. 81 (do_st4hb): Ditto. 82 (st4hb): Correct mnemonic in igen template. 83 841998-12-08 Frank Ch. Eigler <fche@cygnus.com> 85 86 * d30v-insns: (do_ld2h): Don't update R0 nor R1 for double-word insn. 87 (do_ld2w): Ditto. 88 (do_ld4bh): Ditto. 89 (do_ld4bhu): Ditto. 90 (do_mulx2h): Ditto. 91 921998-12-03 Frank Ch. Eigler <fche@cygnus.com> 93 94 * d30v-insns (do_repeat): Don't set RP for repeat count 1. 95 961998-12-03 Frank Ch. Eigler <fche@cygnus.com> 97 98 * d30v-insns (do_src): Treat shift count -32 naturally instead of 99 producing zero result. 100 1011998-11-22 Frank Ch. Eigler <fche@cygnus.com> 102 103 * d30v-insns (do_src): Limit SRC shift count to -32 .. 31. 104 1051998-11-16 Frank Ch. Eigler <fche@cygnus.com> 106 107 * d30v-insns (dbt): Defer PSW/DPSW update with new DID_TRAP code 2. 108 * engine.c (unqueue_writes): Perform DBT processing on PSW/DPSW here. 109 1101998-11-12 Frank Ch. Eigler <fche@cygnus.com> 111 112 * cpu.h (_sim_cpu): Removed is_delayed_call field, and associated 113 RPT_IS_CALL macro. 114 * sim-calls.c (sim_create_inferior): Don't initialize is_delayed_call. 115 * d30v-insns (do_dbra): Don't clear RPT_IS_CALL. (do_dbrai): Ditto. 116 (do_djmp): Ditto. (do_djmpi): Ditto. (do_repeat): Ditto. 117 * d30v-insns (do_dbsr): Don't set RPT_IS_CALL, but set R62 instead. 118 (do_dbsri): Ditto. (do_djsr): Dito. (do_djsri): Ditto. 119 * engine.c (sim_engine_run): Remove conditional setting of R62 based 120 upon RPT_IS_CALL. 121 1221998-11-08 Frank Ch. Eigler <fche@cygnus.com> 123 124 * sim-calls.c (sim_open): Add dummy memory range over control 125 register region (0x40000000..0x4000FFFF). 126 1271998-11-06 Frank Ch. Eigler <fche@cygnus.com> 128 129 * d30v-insns (do_mvfacc): Use loop to limit shift count to 63 .. 0. 130 131Tue Oct 13 11:01:16 1998 Frank Ch. Eigler <fche@cygnus.com> 132 133 * d30v-insns (do_sra,do_srah,do_srl,do_srlh): Make shift 134 count -32 to produce zero result. 135 (do_src): Ditto for shift count == -64. 136 137Mon Oct 12 23:04:11 1998 Frank Ch. Eigler <fche@cygnus.com> 138 139 * d30v-insns (ROT): Use 0x1f bit mask for rotate count masking. 140 (do_sra,do_srl): Use loop to limit shift count to -32 .. 31. 141 (do_srah,do_srlh): Use loop to limit shift count to -32 .. 31. 142 (sra2h,srl2h): Use loop to limit shift count to -16 .. 15. 143 (do_src): Use loop to limit shift count to -64 .. 63. 144 145Fri Oct 9 16:46:52 1998 Doug Evans <devans@canuck.cygnus.com> 146 147 * sim-calls.c (get_insn_name): New fn. 148 (sim_open): Initialize CPU_INSN_NAME,CPU_MAX_INSNS. 149 * sim-main.h (MAX_INSNS,INSN_NAME): Delete. 150 151Mon Sep 28 10:43:28 1998 Frank Ch. Eigler <fche@cygnus.com> 152 153 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Use 154 correct MSB bit numbers for sign extension masks. 155 156Fri Sep 25 17:32:27 1998 Frank Ch. Eigler <fche@cygnus.com> 157 158 * engine.c (do_parallel): Unqueue writes if MU instruction was 159 a MVTSYS, as identified by its left_kills_right_p side-effect. 160 161Fri Sep 25 12:31:34 1998 Frank Ch. Eigler <fche@cygnus.com> 162 163 * d30v-insns (do_sra,do_srah,do_srl,do_srlh,ROT,do_src): Mask 164 shift/rotate counts to number of bits in width of operand; no 165 longer saturate at maxima. 166 167Tue Jul 14 18:39:23 1998 Frank Ch. Eigler <fche@cygnus.com> 168 169 * cpu.h (left_kills_right_p): New flag for non-branch instructions 170 that, when executed in left slot of a -> sequential pair, kill the 171 right slot. 172 * d30v-insns (mvtsys): Set flag for PSW/PSWh/PSWl/FLAG operands. 173 * engine.c (do_2_short): Respect flag. 174 175Thu Jun 4 16:48:58 1998 David Taylor <taylor@texas.cygnus.com> 176 177 * d30v-insns (do_trap): don't save the bPSW and PSW based on 178 current values because an instruction done in parallel with 179 the trap might change them, instead set a flag do that 180 unqueue_writes will take care of it. 181 * engine.c (unqueue_writes): finish trap handling 182 * cpu.h (_sim_cpu): add new field did_trap and a macro DID_TRAP 183 to make use of it; set by do_trap, tested and cleared by 184 unqueue_writes. 185 186Tue May 19 16:07:04 1998 Frank Ch. Eigler <fche@cygnus.com> 187 188 * engine.c (unqueue_writes): Suppress the all enqueued writes to 189 the same flags in PSW except the last. 190 191Fri May 15 11:38:59 1998 Frank Ch. Eigler <fche@cygnus.com> 192 193 * d30v-insns (RETI): Correct instruction spelling to "reit". 194 195Thu May 14 09:34:20 1998 Frank Ch. Eigler <fche@cygnus.com> 196 197 * d30v-insns (dbt): Handle DBT at end of repeat block. 198 (do_trap, dbt): Clear PSW_RP if at end of repeat block. 199 200Thu May 14 07:41:41 1998 Frank Ch. Eigler <fche@cygnus.com> 201 202 * engine.c (sim_engine_run): Trigger DDBT based on previous PC, 203 instead of next PC. 204 205Wed May 13 11:03:40 1998 Frank Ch. Eigler <fche@cygnus.com> 206 207 * engine.c (sim_engine_run): Move DDBT handling after instruction 208 decode/execute stage. 209 210Tue May 12 12:14:53 1998 Frank Ch. Eigler <fche@cygnus.com> 211 212 * d30v-insns (do_sat*): Correct "saturate to 0 bits" patch to 213 properly handle negative saturation inputs. 214 215Tue May 12 11:11:26 1998 Frank Ch. Eigler <fche@cygnus.com> 216 217 * engine.c (sim_engine_run): Decrement RPT_C only under more 218 restricted conditions. 219 220Mon May 11 17:33:46 1998 Frank Ch. Eigler <fche@cygnus.com> 221 222 * d30v-insns (do_sat*): Make "saturate to 0 bits" pass through data 223 unchanged. 224 225Mon May 11 16:27:04 1998 Frank Ch. Eigler <fche@cygnus.com> 226 227 * engine.c (sim_engine_run): Implement DDBT (debugger debug trap) 228 functionality. 229 230Fri May 8 16:44:19 1998 Frank Ch. Eigler <fche@cygnus.com> 231 232 * d30v-insns (do_trap): Set bPC to RPT_S if trap is last 233 instruction in repeat block. 234 (bsr*/jsr*): Set R62 (LINK) to RPT_S if subroutine branch 235 is last instruction in repeat block. 236 237Fri May 8 11:06:50 1998 Frank Ch. Eigler <fche@cygnus.com> 238 239 * d30v-insns (do_sath): Query/update F4/PSW_S using proper flag 240 macro. 241 * cpu.h (PSW_S_FLAG): New flag number for PSW_S status bit. 242 243Wed May 6 19:40:56 1998 Doug Evans <devans@canuck.cygnus.com> 244 245 * sim-main.h (INSN_NAME): New arg `cpu'. 246 247Fri May 1 14:24:30 1998 Andrew Cagney <cagney@b1.cygnus.com> 248 249 * d30v-insns: Fix parameter list to sim_engine_abort. 250 251Thu Apr 30 14:28:00 1998 Fred Fish <fnf@cygnus.com> 252 253 * d30v-insns (do_sath): Add additional argument that determines 254 whether or not the F4 (PSW_S) bit in the PSW is updated. 255 (SAT2H): Do not update PSW_S bit. 256 (SATHp): Do update PSW_S bit. 257 258Tue Apr 28 23:36:00 1998 Fred Fish <fnf@cygnus.com> 259 260 * d30v-insns (SRAHp, SRLHp): Immediate values are signed 6 bit 261 values, not 5 bit values. 262 263Wed Apr 29 12:57:55 1998 Frank Ch. Eigler <fche@cygnus.com> 264 265 * d30v-insns (do_incr): Check modular arithmetic limits after 266 postincrement/postdecrement, rather than before, to match 267 erroneous hardware behavior. 268 269Tue Apr 28 18:33:31 1998 Geoffrey Noer <noer@cygnus.com> 270 271 * configure: Regenerated to track ../common/aclocal.m4 changes. 272 273Mon Apr 27 19:42:00 1998 Fred Fish <fnf@cygnus.com> 274 275 * d30v-insns (do_trap): Clear all bits in PSW except SM and DB. 276 277Mon Apr 27 14:55:00 1998 Fred Fish <fnf@cygnus.com> 278 279 * d30v-insns (do_mulx2h): Low order results go in ra+1, high 280 order in ra. 281 282Mon Apr 27 14:42:00 1998 Fred Fish <fnf@cygnus.com> 283 284 * d30v-insns (do_mulx2h): Rewrite to do proper 32 bit signed 285 multiply of high and low fields from operands. 286 287Sun Apr 26 15:31:55 1998 Tom Tromey <tromey@creche> 288 289 * configure: Regenerated to track ../common/aclocal.m4 changes. 290 * config.in: Ditto. 291 292Sun Apr 26 15:20:20 1998 Tom Tromey <tromey@cygnus.com> 293 294 * acconfig.h: New file. 295 * configure.in: Reverted change of Apr 24; use sinclude again. 296 297Fri Apr 24 14:16:40 1998 Tom Tromey <tromey@creche> 298 299 * configure: Regenerated to track ../common/aclocal.m4 changes. 300 * config.in: Ditto. 301 302Fri Apr 24 11:20:00 1998 Tom Tromey <tromey@cygnus.com> 303 304 * configure.in: Don't call sinclude. 305 306Wed Apr 22 21:23:00 1998 Fred Fish <fnf@cygnus.com> 307 308 * ic-d30v (RbU, RcU): Unsigned versions of Rb and Rc. 309 * d30v-insns (MVTACC): Use new RbU and RcU macros. 310 311Wed Apr 22 20:52:00 1998 Fred Fish <fnf@cygnus.com> 312 313 * ic-d30v (RbHU,RbLU): Unsigned versions of RbH and RbL. 314 * d30v-insns (SRL2H): Use new RbHU and RbLU macros instead of 315 RbH and RbL. 316 317Mon Apr 13 16:59:00 1998 Fred Fish <fnf@cygnus.com> 318 319 * d30v-insns (do_srl): Avoid undefined behavior of host compiler 320 when shifting left by more than 31 bits. 321 322Tue Apr 7 18:09:00 1998 Fred Fish <fnf@cygnus.com> 323 324 * engine.c (sim_engine_run): Remove at_loop_end variable. Add 325 rp_was_set and rpt_c_was_nonzero variables. Major restructuring of 326 code before and after instruction execution to properly handle state 327 of the RP bit in the PSW, the value in RPT_C, and other loop related 328 problems. 329 330Sat Apr 4 20:36:25 1998 Andrew Cagney <cagney@b1.cygnus.com> 331 332 * configure: Regenerated to track ../common/aclocal.m4 changes. 333 334Fri Apr 3 15:26:00 1998 Fred Fish <fnf@cygnus.com> 335 336 * d30v-insns (do_trap): Use offset from EIT_VB rather than hardcoded 337 BASE_ADDRESS constant. 338 * cpu.h (BASE_ADDRESS): Remove constant not used any longer. 339 340Fri Apr 3 14:42:00 1998 Fred Fish <fnf@cygnus.com> 341 342 * cpu.h (EIT_VB): Define macro to access EIT_VB register. 343 (EIT_VB_DEFAULT): Define value of EIT_VB register after reset. 344 * sim-calls.c (sim_create_inferior): Set EIT_VB to EIT_VB_DEFAULT. 345 346Tue Mar 31 19:00:00 1998 Fred Fish <fnf@cygnus.com> 347 348 * d30v-insns (do_dbrai): RPT_S is cia plus pcdisp rather than 349 just pcdisp. 350 351Mon Mar 30 20:30:00 1998 Fred Fish <fnf@cygnus.com> 352 353 * engine.c (sim_engine_run): Add at_loop_end. Rework end of loop 354 code to use this to both reset PSW_RP when needed and to set PC 355 to RPT_S for another pass through the loop. 356 357Mon Mar 30 16:12:00 1998 Fred Fish <fnf@cygnus.com> 358 359 * engine.c (sim_engine_run): Change code that handles RPT_* regs 360 and PSW_RP bit in PSW so that PSW_RP is always set while executing 361 the loop and loop terminates upon completion of the pass for which 362 RPT_C is zero. More closely follow logic in architecture manual. 363 364Fri Mar 27 16:15:52 1998 Andrew Cagney <cagney@b1.cygnus.com> 365 366 * configure: Regenerated to track ../common/aclocal.m4 changes. 367 368Wed Mar 25 12:35:29 1998 Andrew Cagney <cagney@b1.cygnus.com> 369 370 * configure: Regenerated to track ../common/aclocal.m4 changes. 371 372Thu Mar 19 00:25:43 1998 Andrew Cagney <cagney@b1.cygnus.com> 373 374 * sim-calls.c (sim_open): Move memory-region commands back to 375 before the call to sim_parse_args. 376 (d30v_option_handler): Implement extmem-size option using 377 memory-delete and memory-region commands. 378 379 * sim-calls.c (d30v_option_handler): Use ANSI-C argument list, 380 correct number and type of arguments. 381 382Wed Mar 18 12:38:12 1998 Andrew Cagney <cagney@b1.cygnus.com> 383 384 * configure: Regenerated to track ../common/aclocal.m4 changes. 385 386Wed Mar 11 13:56:32 1998 Andrew Cagney <cagney@b1.cygnus.com> 387 388 * alu.h (IMEM, MEM, STORE): Replace sim_core_*_map with exec_map, 389 read_map and write_map resp. 390 391 * cpu.c (d30v_read_mem, d30v_write_mem): Ditto. 392 393Mon Mar 2 13:34:08 1998 Fred Fish <fnf@cygnus.com> 394 395 * d30v-insns (do_repeat): Abort repeat instructions that have 396 a repeat count of zero. 397 398Fri Feb 27 18:44:12 1998 Doug Evans <devans@canuck.cygnus.com> 399 400 * sim-calls.c (sim_open): Update call to sim_add_option_table. 401 402Thu Feb 26 18:34:31 1998 Andrew Cagney <cagney@b1.cygnus.com> 403 404 * sim-calls.c (sim_info): Delete. 405 406Wed Feb 25 14:44:58 1998 Michael Meissner <meissner@cygnus.com> 407 408 * d30v-insns (mvtsys): If moving to EIT_VB register, and with 409 valid bits. Optimize code somewhat. 410 411 * cpu.h (eit_vector_base_cr): New CR we need to special case. 412 (EIT_VALID): Valid bits for EIT_VB register. 413 414 * d30v-insns (mv{f,t}sys): When moving to/from PSWH, the value is 415 in the low 16 bits of the register. 416 417 * d30v-insns (do_sra): Use a common WRITE32_QUEUE to write back 418 results. 419 (do_sr{a,l}h): Do shift in 32 bits, only truncate when writing 420 result back to the registers. 421 422Tue Feb 24 18:09:52 1998 Fred Fish <fnf@cygnus.com> 423 424 * Makefile.in (tmp-igen): Use -G gen-zero-r0 option to force 425 r0 to always be zero. 426 * cpu.h (GPR_SET): Define. 427 428Tue Feb 24 14:12:57 1998 Michael Meissner <meissner@cygnus.com> 429 430 * d30v-insns (do_sath): Do saturation in 32 bits, before 431 converting to 16. 432 (sat{,2h,z,hp}): Use imm_5, not imm to get proper zero extend. 433 (do_sath_p): Delete, no longer used. 434 (sathp): Call do_sath, not do_sath_p. 435 436Mon Feb 23 15:55:14 1998 Michael Meissner <meissner@cygnus.com> 437 438 * d30v-insns (illegal,wrong_slot): Print \n after PC and before we 439 call sim_engine_halt. 440 (sr{a,l}hp): Implement missing instructions. 441 (do_trap): Print high order PSW bits in human readable fashion. 442 (do_{dbra{,i},dbsr{,i},djmp{,i},djsr{,i},repeat}): Set PSW bit RP. 443 444 * alu.h (PSW_SET_QUEUE): New macro to set PSW bits. 445 446 * engine.c (sim_engine_run): Check for RP bit being set, not RPT_C 447 being > 0. If RPT_C is decremented to 0, clear PSW RP bit. 448 449Fri Feb 20 10:13:34 1998 Fred Fish <fnf@cygnus.com> 450 451 * cpu.h (BASE_ADDRESS): Change from 0xfffff000 to 0xfffff020. 452 453Tue Feb 17 12:39:52 1998 Andrew Cagney <cagney@b1.cygnus.com> 454 455 * sim-calls.c (sim_store_register, sim_fetch_register): Pass in 456 length parameter. Return -1. 457 458Fri Feb 6 17:39:54 1998 Michael Meissner <meissner@cygnus.com> 459 460 * d30v-insns (do_dbrai): Correct typo, use shift, not comparison. 461 462Sun Feb 1 16:47:51 1998 Andrew Cagney <cagney@b1.cygnus.com> 463 464 * configure: Regenerated to track ../common/aclocal.m4 changes. 465 466Sat Jan 31 18:15:41 1998 Andrew Cagney <cagney@b1.cygnus.com> 467 468 * configure: Regenerated to track ../common/aclocal.m4 changes. 469 470Fri Jan 30 08:29:20 1998 Andrew Cagney <cagney@b1.cygnus.com> 471 472 * engine.c (sim_engine_run): Add parameter nr_cpus. 473 474Fri Jan 30 17:09:37 1998 Michael Meissner <meissner@cygnus.com> 475 476 * d30v-insns (jsrtzr): Check for register == 0, not != 0. 477 478Wed Jan 21 17:52:04 1998 Andrew Cagney <cagney@b1.cygnus.com> 479 480 * engine.c (do_stack_swap): Make type of new_sp unsigned. 481 482Mon Jan 19 22:26:29 1998 Doug Evans <devans@seba> 483 484 * configure: Regenerated to track ../common/aclocal.m4 changes. 485 486Mon Jan 5 16:04:17 1998 Andrew Cagney <cagney@sanguine.cygnus.com> 487 488 * sim-calls.c (sim_info): Call profile_print. 489 490 * sim-main.h: Enable instruction profiling. 491 492Thu Dec 18 12:21:38 1997 Michael Meissner <meissner@cygnus.com> 493 494 * alu.h (ALU{16,32}_END): Change setting PSW to only set the carry 495 and overflow bits. Don't look at the current value of PSW. 496 (PSW_FLAG_SET_QUEUE): Only queue up setting the particular bit in 497 question. Don't look at the current value of PSW. 498 499 * d30v-insns: All instructions that set the PSW, will only queue 500 up the particular bits in question that were set by the 501 instruction. Don't look at the current value of PSW. 502 503Wed Dec 17 11:41:44 1997 Michael Meissner <meissner@cygnus.com> 504 505 * cpu.h (PSW_VALID): Allow EA/DB to be set in the PSW. 506 (DPSW_VALID): Like PSW_VALID, but it allows the DS bit to be set. 507 508 * engine.c (trace_alu32): When changing BPSW/DPSW, print the 509 special PSW bits. 510 511 * d30v-insns (do_cmp_cc): Fix cmpps and cmpng. 512 (do_cmp{,u}_cc): Print which cc value was used if not in switch 513 statement. 514 (do_cmpu_cc): Remove illegal cases CMPU{EQ,NE,PS,NG}. 515 (mvtsys): When setting BPSW or DPSW, and with DPSW_VALID. 516 517Tue Dec 16 18:17:26 1997 Michael Meissner <meissner@cygnus.com> 518 519 * d30v-insns (mulx2h): Add missing instruction. Complain if 520 register is not even. 521 (do_{add,sub}h_ppp): Get correct high/low values. Also correctly 522 handle short immediates. 523 (do_ld{2w,4bh}): Don't load r0 if ra == 0. 524 525 * engine.c (d30v_interrupt_event): Remove unused variable 526 (unqueue_writes): Ditto. 527 528Mon Dec 15 23:17:11 1997 Andrew Cagney <cagney@b1.cygnus.com> 529 530 * configure: Regenerated to track ../common/aclocal.m4 changes. 531 * config.in: Ditto. 532 533Sat Dec 13 23:40:17 1997 Michael Meissner <meissner@cygnus.com> 534 535 * cpu.h (_write{32,64}): New structures for keeping track of 536 queued writes to registers. 537 (_sim_cpu): Add _write{32,64} structures. Make is_delayed_call 538 unsigned32 also. 539 (WRITE{32,64}*): New macros for queueing up writes to registers. 540 541 * alu.h (ALU16_END): Take field that says whether we are setting 542 the high or low half word. Queue up changes to registers. 543 (ALU32_END): Queue up changes to registers. 544 (PSW_FLAG_SET_QUEUE): Like PSW_FLAG_SET, except queues it up. 545 546 * sim-main.h (do_stack_swap): Remove declaration. 547 548 * engine.c (do_stack_swap): Make static. 549 (unqueue_writes): New function to unqueue all changes to 32 and 64 550 bit registers in order. Implement --trace-alu. Reset high water 551 marks for # of queued registers. If PSW changed, possibly update 552 stack pointer. 553 (do_{long,2_short,parallel}): Unqueue register writes at the 554 appropriate time. 555 556 * d30v-insns: Modify all insns to queue changes to registers, 557 rather than do them immediately so that parallel instructions get 558 the right values for inputs. Rewrite 16 bit operations to be done 559 in terms of masked 32 bit registers. Don't call do_stack_swap any 560 more here. 561 562Thu Dec 11 10:06:02 1997 Michael Meissner <meissner@cygnus.com> 563 564 * sim-calls.c (d30v_option_handler): Add support for --extmem-size 565 to size external memory. 566 (sim_open): Ditto. Default if no --extmem-size option is 8 meg. 567 568Wed Dec 10 01:08:24 1997 Jim Blandy <jimb@zwingli.cygnus.com> 569 570 * d30v-insns (do_rot2h): Clip rotate amounts to four bits. The 571 upper bits, and the sign of the rotation amount, are red herrings. 572 (do_sra, do_srl): Handle shifts greater than 32 bits. 573 (do_srah, do_sral): Properly sign-extend value and shift amount. 574 Handle shifts larger than 16 bits. 575 576Thu Dec 4 09:21:05 1997 Doug Evans <devans@canuck.cygnus.com> 577 578 * configure: Regenerated to track ../common/aclocal.m4 changes. 579 580Mon Dec 1 15:10:44 1997 Michael Meissner <meissner@cygnus.com> 581 582 * d30v-insns (do_sub2h): For short instruction, correctly 583 dupplicate lower 16 bits of immediate in upper 16 bits. 584 (sat2z): Fix typo that ignored the upper half of the register. 585 (do_satz): If < 0, set *ra to 0, if not call do_sat. 586 (mvtsys): Before setting PSW, and with PSW_VALID. 587 588 * cpu.h (PSW_VALID): Mask for bits in PSW that is valid. 589 590Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com> 591 592 * d30v-insns (do_trap): Pacify GCC - correct type of %ld arg in 593 printf, return dummy at end. 594 595Mon Dec 1 15:05:03 1997 Andrew Cagney <cagney@b1.cygnus.com> 596 597 * d30v-insns (do_add, do_addh_ppp, do_adds): Replace ALU_ADD with 598 ALU_ADDC. 599 (do_addc): Replace ALU_SET_CARRY / ALU_ADD_CA with ALU_ADDC_C. 600 (do_sub, do_subh_ppp): Replace ALU_SUB with ALU_SUBB. 601 (do_subb): Replace ALU_SET_CARRY / ALU_SUB_CA with ALU_SUBB_B. 602 603 * alu.h (ALU16_END): Use ALU16_HAD_CARRY_BORROW instead of 604 ALU16_HAD_CARRY. 605 (ALU32_END): Ditto. 606 607 * sim-main.h (string.h, strings.h): Include. 608 609 * sim-calls.c: Delete inclusion of string.h and strings.h. 610 611Sun Nov 30 17:29:25 1997 Michael Meissner <meissner@cygnus.com> 612 613 * configure.in (--enable-sim-trapdump): New switch to control 614 whether traps 0..30 dump out the registers or do the real trap. 615 * configure: Regenerate. 616 617 * Makefile.in (SIM_EXTRA_CLFAGS): Add -DTRAPDUMP={0,1} if 618 appropriate --{en,dis}able-sim-trapdump is done. 619 620 * sim-calls.c (OPTION_TRACE_CALL): Rename from OPTION_CALL_TRACE. 621 (OPTION_TRACE_TRAPDUMP): New option for --trace-trapdump. 622 (d30v_option_handler): Add support for --trace-trapdump. 623 (d30v_options): Ditto. 624 (sim_open): Ditto. 625 626 * d30v-insns (do_trap): Do register dump if --trace-trapdump and 627 not the system call trap. Remove support for calling old function 628 sim_io_syscalls. 629 630Sat Nov 29 18:54:55 1997 Michael Meissner <meissner@cygnus.com> 631 632 * cpu.h (_sim_cpu): Add trace_call_p, trace_action fields. 633 (TRACE_CALL_P): Non-zero if --trace-call. 634 (TRACE_ACTION): Non-zero if there is a tracing action at the end 635 of processing an instruction boundary. 636 (TRACE_ACTION_{CALL,RETURN}): Bits to say trace call & return. 637 (d30v_next_insn): Delete, now trace_action field in cpu state. 638 639 * cpu.c (d30v_next_insn): Delete, now trace_action field in cpu 640 state. 641 (return_occurred): Minimum saved register to check is now 34. 642 643 * engine.c (sim_engine_run): Change call tracing to use 644 trace_action field in cpu state. 645 646 * sim-calls.c (d30v_option_handler): Handle d30v specific options. 647 (d30v_options): D30V specific options. Right now, --trace-call. 648 (sim_open): Register d30v specific options. 649 650 * d30v-insns (call, return insns): Move --trace-debug call/return 651 tracing action to d30v specific --trace-call option. 652 653Fri Nov 28 20:12:48 1997 Michael Meissner <meissner@cygnus.com> 654 655 * cpu.h (CREG): Rename from CR. 656 657 * d30v-insns (do_{addc,subb}): Explicitly import the carry bit. 658 (do_trap): Use CREG, not CR. Switch to using cb_syscall. 659 660Thu Nov 27 19:25:43 1997 Michael Meissner <meissner@cygnus.com> 661 662 * cpu.h (ACC): Define as short cut to accumulators. 663 664 * d30v-insns (do_rot): Delete explicit function, use ROT32 to do 665 rotate instruction. 666 (do_trap): Make trap 30 print out accumulators and first 16 667 control registers as well. 668 (do_avg): Sign extend to 64 bit type before doing add/shift. 669 (do_avg2h): Sign extend 16 bit chunks before doing add/shift. 670 671Wed Nov 26 15:20:24 1997 Doug Evans <devans@canuck.cygnus.com> 672 673 * Makefile.in (NL_TARGET): Define. 674 675Wed Nov 26 16:55:38 1997 Michael Meissner <meissner@cygnus.com> 676 677 * cpu.h (d30v_next_insn): New flag for things we are supposed to 678 trace between instruction words. 679 ({call,return}_occurred): Remove index argument. 680 (d30v_{read,write}_mem): Add declarations. 681 682 * cpu.c (d30v_next_insn): New flag for things we are supposed to 683 trace between instruction words. 684 ({call,return}_occurred): Remove index argument. 685 (d30v_{read,write}_mem): New functions for reading/writing 686 simulated memory in the new common system call support. 687 688 * d30v-insns: Set emacs C mode. 689 (call/return insns): Set bit to trace call at instruction 690 boundary, rather than doing it here. 691 (do_trap): Set up to use new common system call interface. 692 693 * engine.c (sim_engine_run): If d30v_next_insn is non zero, do 694 function call/return tracing. 695 696Mon Nov 24 16:40:49 1997 Michael Meissner <meissner@cygnus.com> 697 698 * d30v-insns (bnot): Correctly reset bit in question. 699 (do_trap): Use common system call emulation support, rather than 700 our home grown support. 701 702Sun Nov 23 22:47:20 1997 Michael Meissner <meissner@cygnus.com> 703 704 * d30v-insns (mvfacc): Immediate field is unsigned, allowing 705 shifts of up to 63 to be encoded. Also do shift signed, rather 706 than unsigned. 707 708 * ic-d30v (IMM_6S): Add field for 6 bit unsigned constants. 709 710 * d30v-insns (cmpu): Short cmpu zero extends immediate, not sign 711 extends. 712 713Sat Nov 22 19:04:34 1997 Andrew Cagney <cagney@b1.cygnus.com> 714 715 * d30v-insns (illegal, wrong_slot): Replace SIGILL with 716 SIM_SIGILL. 717 718 * sim-calls.c (signal.h): Do not include, replaced by 719 sim-signal.h. 720 721 * sim-main.h (signal.h): Do not include, include sim-signal.h 722 instead. 723 724Fri Nov 21 09:33:54 1997 Andrew Cagney <cagney@b1.cygnus.com> 725 726 * cpu.c (call_occurred): Use ZALLOC instead of xmalloc. 727 (return_occurred): Use zfree instead of free. 728 729Wed Nov 19 13:28:09 1997 Michael Meissner <meissner@cygnus.com> 730 731 * Makefile.in ({l,s}_{support,semantics}.o): Depend on the include 732 files in $(ENGINE_H). 733 734 * d30v-insns (do_{add,addc,sub,subb}): ALU_{ADD,SUB}_CA now takes 735 a VAL argument to add/subtract along with the carry. 736 737Tue Nov 18 15:33:48 1997 Doug Evans <devans@canuck.cygnus.com> 738 739 * Makefile.in (SIM_OBJS): Use $(SIM_NEW_COMMON_OBJS). 740 741Tue Nov 18 13:56:15 1997 Michael Meissner <meissner@cygnus.com> 742 743 * d30v-insns (do_trap): Change to new system call numbers. Add 744 read emulation. 745 746Mon Nov 17 14:43:45 1997 Michael Meissner <meissner@cygnus.com> 747 748 * d30v-insns (mulx): Add mulx instruction. 749 750Sun Nov 16 19:06:56 1997 Michael Meissner <meissner@cygnus.com> 751 752 * cpu.c ({call,return}_occurred): New trace functions to mark 753 function calls and returns and check whether all saved registers 754 really were saved. 755 756 * cpu.h ({call,return}_occurred): Add declaration. 757 758 * d30v-insns ({bsr, jsr} patterns): Call call_occurred if 759 --trace-debug to trace function calls. 760 (jmp register pattern): If this is a jump r62 and --trace-debug, 761 call return_occurred to trace function calls. 762 (bsr{tnz,tzr}): Move setting r62 inside conditional against reg. 763 (do_ld2w): Grab memory in 64-bit chunk, to check alignment. 764 (do_st2w): Ditto. 765 766Sat Nov 15 20:57:57 1997 Michael Meissner <meissner@cygnus.com> 767 768 * d30v-insns: Undo changes from Nov. 11, allowing for odd register 769 pairs, since the machine doesn't support such usage. Trap on odd 770 registers, rather than give a warning. Keep do_src and do_trap 771 changes. 772 773Fri Nov 14 11:59:29 1997 Andrew Cagney <cagney@b1.cygnus.com> 774 775 * d30v-insns (do_trap): Pacify compiler warnings for printf calls. 776 777Tue Nov 11 18:26:03 1997 Michael Meissner <meissner@cygnus.com> 778 779 * d30v-insns (not_r63_reg): Rename from make_even_reg, only check 780 for register being r63. Change callers ld2{h,w}, ld4bh{,u}. 781 (get_reg_not_r63): Rename from get_even_reg, and only check for 782 register r63. Change callers st2{w,h}, st4b. 783 (do_src): Correct register pair for shift left. 784 (do_trap): Temporarily make trap 30 print out the registers. 785 786Tue Nov 4 08:51:22 1997 Michael Meissner <meissner@cygnus.com> 787 788 * d30v-insns (do_trap): Make trap 31 be used for system calls. 789 Add primitive write and exit system calls. 790 791 * Makefile (FILTER): New make variable to filter out known igen 792 warnings. 793 (tmp-igen): Add $(FILTER) on all 3 invocations of igen to filter 794 out warnings that should be ignored by default. 795 796Fri Oct 31 19:36:51 1997 Andrew Cagney <cagney@b1.cygnus.com> 797 798 * sim-calls.c (sim_open): Change EIT to memory region. 799 800Fri Oct 17 16:51:31 1997 Andrew Cagney <cagney@b1.cygnus.com> 801 802 * alu.h (ALU16_END): Get result from ALU16_OVERFLOW_RESULT. 803 (ALU32_END): Get result from ALU32_OVERFLOW_RESULT. 804 805Fri Oct 3 09:28:00 1997 Andrew Cagney <cagney@b1.cygnus.com> 806 807 * configure: Regenerated to track ../common/aclocal.m4 changes. 808 809Mon Sep 29 15:23:35 1997 Stu Grossman <grossman@babylon-5.cygnus.com> 810 811 * d30v-insns (MVFSYS MVTSYS): Fix bit patterns so that these 812 instructions get recognised. 813 814Wed Sep 24 17:38:57 1997 Andrew Cagney <cagney@b1.cygnus.com> 815 816 * configure: Regenerated to track ../common/aclocal.m4 changes. 817 818Wed Sep 24 17:51:43 1997 Stu Grossman <grossman@babylon-5.cygnus.com> 819 820 * Makefile.in (SIM_OBJS): Add sim-break.o. 821 * (INCLUDE_DEPS): Add tconfig.h. 822 * alu.h (MEM STORE): Change to sim_core_read/write_unaligned to 823 allow for trapping unaligned accesses. 824 * cpu.h: Define SIM_BREAKPOINT as syscall 5 for intrinsic breakpoint 825 mechanism. 826 * d30v-insn (short syscall): Use syscall 5 for breakpoint insn. 827 * sim-calls.c (sim_fetch_register sim_store_register): Implement. 828 * tconfig.in: Define SIM_HAVE_BREAKPOINTS to enable intrinsic 829 breakpoint mechanism. 830 831Tue Sep 23 11:04:38 1997 Andrew Cagney <cagney@b1.cygnus.com> 832 833 * configure: Regenerated to track ../common/aclocal.m4 changes. 834 835Tue Sep 23 10:19:51 1997 Andrew Cagney <cagney@b1.cygnus.com> 836 837 * Makefile.in (SIM_WARNINGS, SIM_ALIGNMENT, SIM_ENDIAN, 838 SIM_HOSTENDIAN, SIM_RESERVED_BITS): Delete, moved to common. 839 (SIM_EXTRA_CFLAGS): Update. 840 841Mon Sep 22 11:46:20 1997 Andrew Cagney <cagney@b1.cygnus.com> 842 843 * configure.in: Specify strict alignment. 844 * configure: Regenerated to track ../common/aclocal.m4 changes. 845 846Fri Sep 19 17:45:25 1997 Andrew Cagney <cagney@b1.cygnus.com> 847 848 * configure: Regenerated to track ../common/aclocal.m4 changes. 849 850Mon Sep 15 17:36:15 1997 Andrew Cagney <cagney@b1.cygnus.com> 851 852 * configure: Regenerated to track ../common/aclocal.m4 changes. 853 854Fri Sep 12 16:13:04 1997 Andrew Cagney <cagney@b1.cygnus.com> 855 856 * sim-calls.c (sim_open): Change memory to 857 internal inst. RAM h'00000000-h'0000ffff (64KB) 858 internal data RAM h'20000000-h'20007fff (32KB) 859 external RAM h'80000000-h'803fffff (4MB) 860 EIT h'fffff000-h'ffffffff 861 862 863Thu Sep 11 08:59:34 1997 Andrew Cagney <cagney@b1.cygnus.com> 864 865 * Makefile.in (SIM_OBJS): Add sim-hrw.o module. 866 867 * sim-calls.c (sim_read): Delete. use sim-hrw. 868 (sim_write): Delete, use sim-hrw. 869 870 871Tue Sep 9 01:36:20 1997 Andrew Cagney <cagney@b1.cygnus.com> 872 873 * ic-d30v (imm_5): Update nr args passed to LSMASKED. 874 875 * d30v-insns (do_sat, do_sath, do_sath_p, do_satz, do_satzh): Fix, 876 computing the max sat value incorrectly. 877 878Thu Sep 4 17:21:23 1997 Doug Evans <dje@seba> 879 880 * configure: Regenerated to track ../common/aclocal.m4 changes. 881 882Fri Sep 5 09:15:33 1997 Andrew Cagney <cagney@b1.cygnus.com> 883 884 * d30v-insns (do_mac, do_macs, do_msub, do_mulxs): Use explicit 885 type cast instead of SIGNED64 macro. 886 887Thu Sep 4 10:28:45 1997 Andrew Cagney <cagney@b1.cygnus.com> 888 889 * Makefile.in (SIM_OBJS): Include sim-memopt.o module. 890 891 * sim-calls.c (sim_open): Pass zero modulo arg to sim_core_attach 892 calls. 893 (sim_open): If no memory, use memory commands to establish d30v 894 ram. 895 (d30v_option_handler): Delete, replased by sim-memopt.c. 896 (sim_create_inferior): Call sim_module_init. 897 898 * sim-main.h (struct sim_state): Remove members eit_ram, 899 sizeof_eit_ram, external_ram, baseof_external_ram, 900 sizeof_external_ram. Using generic memory model instead. 901 902Mon Sep 1 11:04:09 1997 Andrew Cagney <cagney@b1.cygnus.com> 903 904 * sim-calls.c (sim_open): Use sim_state_alloc. 905 906Sat Aug 30 10:01:51 1997 Andrew Cagney <cagney@b1.cygnus.com> 907 908 * sim-main.h (INVALID_INSTRUCTION_ADDRESS): Define. 909 910 * engine.c (do_2_short): Compare with INVALID_INSTRUCTION_ADDRESS 911 not -1. 912 913Wed Aug 27 18:13:22 1997 Andrew Cagney <cagney@b1.cygnus.com> 914 915 * configure: Regenerated to track ../common/aclocal.m4 changes. 916 * config.in: Ditto. 917 918Wed Aug 27 13:41:54 1997 Andrew Cagney <cagney@b1.cygnus.com> 919 920 * sim-calls.c (sim_open): Add call to sim_analyze_program, update 921 call to sim_config. 922 923 * sim-calls.c (sim_create_inferior): Add ABFD argument. 924 Initialize CPU registers including PC. 925 (sim_load): Delete, using sim-hload. 926 927 * Makefile.in (SIM_OBJS): Add sim-hload.o module. 928 929Mon Aug 25 17:50:22 1997 Andrew Cagney <cagney@b1.cygnus.com> 930 931 * configure: Regenerated to track ../common/aclocal.m4 changes. 932 * config.in: Ditto. 933 934Mon Aug 25 15:41:44 1997 Andrew Cagney <cagney@b1.cygnus.com> 935 936 * sim-calls.c (sim_open): Add ABFD argument. 937 (sim_open): Move sim_config call to after sim_parse_args. 938 (sim_open): Check sim_config return status. 939 940Fri Aug 22 16:38:59 1997 Andrew Cagney <cagney@b1.cygnus.com> 941 942 * d30v-insns (do_subh_ppp): Correct name, was do_sub_ppp. 943 (do_subh_ppp): Compute rc=rb-src instead of src-rb. 944 (do_addh_ppp): Ditto. 945 946Fri Jun 27 14:43:20 1997 Andrew Cagney <cagney@b1.cygnus.com> 947 948 * d30v-insns (mvfsys, mvtsys): Switch instruction encodings, was 949 wrong. Update handling of PSW[DS] bit. 950 (dbt): Fix debug trap address. 951 952 * cpu.h (NR_CONTROL_REGISTERS): Allow the full 64 registers. 953 954Tue Jun 24 12:41:55 1997 Andrew Cagney <cagney@b1.cygnus.com> 955 956 * d30v-insns (DBT, RTD): Swap the stack after updating the PSW. 957 (DBT): Use PSW_SET to update PSW. 958 959 * alu.h (ALU16_END): Check for 16 bit carry and not 32 bit. 960 961Tue Jun 24 12:16:14 1997 Andrew Cagney <cagney@b2.cygnus.com> 962 963 * d30v-insns (ppp, ccc, pp, XX, p): Update format functions so 964 that they are of class %s instead of class function. 965 966Tue Jun 10 12:26:39 1997 Andrew Cagney <cagney@b1.cygnus.com> 967 968 * sim-main.h (engine_error, engine_restart, engine_halt, 969 engine_run_until_stop): Delete prototypes. Functions deleted 970 earlier. 971 (do_interrupt_handler): Add prototype. 972 (sim_state): Add pending_event member to struct. 973 974 * sim-calls.c (sim_open): Configure interrupt handler. 975 * engine.c (d30v_interrupt_event): New function. Deliver external 976 interrupt to processor. 977 978 * d30v-insns (do_stack_swap): Move function from here. 979 * engine.c (do_stack_swap): To here. 980 * sim-main.h (do_stack_swap): Add prototype. 981 982 * cpu.h (registers): Change current_sp to an int. 983 * d30v-insn (do_stack_swap): Update. 984 985Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> 986 987 * d30v-insns (LD*, ST*): Disasemble XX == 0 as immed version of 988 instruction. 989 (str_XXX): Fix case of XX == 3 - return "-". 990 991Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> 992 993 * engine.c (sim_engine_run): Issuing L->R and R->L instructions in 994 wrong order. 995 996 * d30v-insn (CMPUcc imm long): With of RB field should be 6 not 997 three. 998 (MUL, MUL2H, MULHX): X field 01 instead of 10. 999 1000Thu Jun 5 12:54:35 1997 Andrew Cagney <cagney@b1.cygnus.com> 1001 1002 * d30v-insns (mvtsys): Don't modify DS bit when writing to PSW. 1003 (dbt, rtd): New instructions. 1004 1005 * cpu.h (NR_CONTROL_REGISTERS): Now 15. 1006 (debug_program_status_word_cr, debug_program_counter_cr): Add 1007 debug control registers. Renumber other control registers. 1008 (PSW_DS): New PSW bit. 1009 (DPC, DPSW): Define. 1010 1011Wed May 28 13:45:47 1997 Andrew Cagney <cagney@b1.cygnus.com> 1012 1013 * engine.c (sim_engine_run): Check the event queue on every cycle. 1014 1015 * sim-calls.c (sim_size): Delete. 1016 (sim_do_command): Call sim_args_command. 1017 (sim_open): Move eit_ram and sizeof_eit_ram to sim_state struct. 1018 (simulation): Delete global now depend on sd argument. 1019 (sim_open): Initialize sim-watch. 1020 (d30v_option_handler): New function, parse mem-size argument. 1021 1022Tue May 27 14:03:38 1997 Andrew Cagney <cagney@b1.cygnus.com> 1023 1024 * sim-calls.c (sim_set_callbacks): Delete. 1025 (sim_write): Pass NULL cpu arg to sim_core_write_buffer. 1026 1027 * engine.c (engine_init): Delete. Handled in sim_open. 1028 (engine_create): Ditto. 1029 1030Tue May 20 10:15:35 1997 Andrew Cagney <cagney@b1.cygnus.com> 1031 1032 * sim-calls.c (sim_open): Add callback argument. 1033 (sim_set_callbacks): Delete SIM_DESC argument. 1034 1035Mon May 19 14:59:32 1997 Andrew Cagney <cagney@b1.cygnus.com> 1036 1037 * sim-calls.c (sim_open): Set the sim.base magic number. 1038 1039Fri May 16 15:25:59 1997 Andrew Cagney <cagney@b1.cygnus.com> 1040 1041 * d30v-insns: Replace engine_error with common sim_engine_abort. 1042 * cpu.c (is_condition_ok, is_wrong_slot): Ditto. 1043 1044 * engine.c (engine_run_until_stop): Rename this. 1045 (sim_engine_run): To this. Simplify - most moved to common. 1046 1047 * sim-calls.c (sim_stop_reason, sim_resume, sim_stop): 1048 Delete. Replaced by common code. 1049 1050 * engine.c (engine_error, engine_restart, engine_halt): Ditto. 1051 1052 * sim-main.h (SIM_ENGINE_RESTART_HOOK, SIM_ENGINE_HALT_HOOK): 1053 Define as NOPs. 1054 1055Mon May 5 23:05:41 1997 Andrew Cagney <cagney@b1.cygnus.com> 1056 1057 * alu.h (IMEM, MEM, STORE): Update to reflect changes to core in 1058 ../common. 1059 * sim-calls.c (sim_open): Ditto. 1060 1061 * alu.h, cpu.h, cpu.c, d30v-insn, dc-short: Clean up copyright 1062 notice. 1063 1064Fri May 2 12:01:38 1997 Andrew Cagney <cagney@b1.cygnus.com> 1065 1066 * sim-calls.c (sim-options.h, sim-utils.h): Include. 1067 * Makefile.in (sim-calls.o): Add dependencies. 1068 1069 * d30v-insns (address_word): Remove cia argument from support 1070 functions, igen now does this automatically. 1071 1072 * Makefile.in (tmp-igen): Include line number information in 1073 generated files. 1074 1075 * sim-main.h (SIM_DESC): Remove sim_events and sim_core, moved to 1076 simulator base type sim_state_base. 1077 (sim-core.h, sim-events.h, sim-io.h): Replace with #include 1078 "sim-base.h". 1079 1080 * sim-main.h (sim_state): Track recomendations in common 1081 directory. 1082 * cpu.h (sim_cpu): Ditto. 1083 * engine.c (do_2_short, do_parallel): Ditto. 1084 * cpu.h (GPR): Ditto. 1085 * alu.h (MEM, IMEM, STORE): Ditto. 1086 * cpu.c (is_wrong_slot): Ditto. 1087 * ic-d30v (Aa, Ab): Ditto. 1088 1089Thu Apr 24 00:39:51 1997 Doug Evans <dje@canuck.cygnus.com> 1090 1091 * configure: Regenerated to track ../common/aclocal.m4 changes. 1092 * Makefile.in (SIM_OBJS): Add sim-module.o, sim-profile.o. 1093 * sim-calls.c (sim_open): Call sim_module_uninstall if argument 1094 parsing fails. Call sim_post_argv_init. 1095 (sim_close): Call sim_module_uninstall. 1096 1097Fri Apr 18 13:44:48 1997 Andrew Cagney <cagney@b1.cygnus.com> 1098 1099 * sim-calls.c (sim_stop): New function. 1100 1101Thu Apr 17 02:57:55 1997 Doug Evans <dje@canuck.cygnus.com> 1102 1103 * Makefile.in (SIM_OBJS): Add sim-load.o, sim-options.o, sim-trace.o. 1104 (SIM_EXTRA_{LIBS,LIBDEPS,ALL,INSTALL}): Delete. 1105 (SIM_RUN_OBJS): Change from run.o to nrun.o. 1106 * cpu.h (sim_cpu): New member base. Delete members trace, sd. 1107 (cpu_traces): Delete. 1108 * engine.c (engine_init): Set backlink from cpu to state. 1109 * sim-calls.c: #include bfd.h. 1110 (sim_open): Set STATE_OPEN_KIND. Call sim_pre_argv_init, 1111 sim_parse_args. 1112 (sim_load): Return SIM_RC. New arg abfd. 1113 Call sim_load_file to load file into simulator. 1114 (sim_create_inferior): Return SIM_RC. Delete arg start_address. 1115 (sim_trace): Delete. 1116 * sim-main.h (struct sim_state): sim_state_base is typedef now. 1117 (STATE_CPU): Define. 1118 1119Mon Apr 7 15:45:02 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1120 1121 * configure: Regenerated to track ../common/aclocal.m4 changes. 1122 * config.in: Ditto. 1123 1124Wed Apr 2 15:06:28 1997 Doug Evans <dje@canuck.cygnus.com> 1125 1126 * Makefile.in (SIM_EXTRA_DEPS): Define. 1127 (SIM_OBJS): Add sim-utils.o. 1128 (SIM_GEN): Delete tmp-common. 1129 (SIM_EXTRA_CLEAN): Delete clean-common. 1130 (BUILT_SRC_FROM_COMMON): Moved to ../common/Make-common.in. 1131 (tmp-common,clean-common): Delete. 1132 (ENGINE_H): sim-state.h renamed to sim-main.h. 1133 (clean-igen): Delete tmp-insns. 1134 1135 * cpu.c: sim-state.h renamed to sim-main.h. 1136 * engine.c: Likewise. 1137 * sim-calls.c: Likewise. 1138 (zalloc,zfree): Moved to ../common/sim-utils.c. 1139 * sim-main.h: Renamed from sim-state.h. 1140 1141 * sim-calls.c (sim_open): New arg `kind'. 1142 1143 * configure: Regenerated to track ../common/aclocal.m4 changes. 1144 1145Wed Apr 2 14:34:19 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1146 1147 * configure: Regenerated to track ../common/aclocal.m4 changes. 1148 1149Wed Apr 2 11:13:15 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1150 1151 * Makefile.in (SIM_OBJS): Link in the recently added sim-config.o 1152 1153 * engine.c (current_target_byte_order, current_host_byte_order, 1154 current_environment, current_alignment, current_floating_point, 1155 current_model_issue, current_stdio): Delete, moved to 1156 ../common/sim-config.c 1157 1158Mon Mar 24 14:50:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1159 1160 * d30v-insns (do_ldw): Load 4 bytes not 2. 1161 (do_incr, LD*, ST*): Increment register not its value. 1162 1163Mon Mar 24 09:59:53 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1164 1165 * cpu.c (is_wrong_slot): Ditto. 1166 (is_condition_ok): Ditto. 1167 1168 * sim-calls.c (sim_trace): Ditto. 1169 1170 * engine.c (engine_init): Ditto. 1171 (do_2_short): Ditto. 1172 (engine_run_until_stop): Ditto. 1173 1174 * d30v-insns (void): Update. For functions, remove `SIM_DESC sd' 1175 and `cpu *processor' arguments as igen now handles this. 1176 1177 * cpu.h: Rename struct _cpu to struct _sim_cpu. Rename variable 1178 processor to cpu. 1179 1180 * sim-state.h: Update. 1181 1182Fri Mar 21 12:52:12 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1183 1184 * d30v-insns (do_sat): Correct calculation of saturate lower 1185 bound. 1186 (do_sath): Ditto. 1187 (do_satzh, do_satz): Arguments should be signed. 1188 1189 * sim-calls.c (zalloc): Use malloc() instead of xmalloc() for 1190 moment. 1191 (filter_filename): Drop. 1192 1193 * cpu.h (is_wrong_slot): Correct declaration name - was 1194 is_valid_slot. 1195 1196 * engine.c (do_parallel): Plicate GCC. 1197 (engine_error): Ditto. 1198 (engine_run_until_stop): Ditto. 1199 * cpu.c (is_wrong_slot): Ditto. 1200 (is_condition_ok): Ditto. 1201 * sim-calls.c (sim_size): Ditto. 1202 (sim_read): Ditto. 1203 (sim_trace): Ditto. 1204 1205 * engine.h, engine.c (engine_create): Add missing prototype to 1206 header file. Clean up missing variables. 1207 1208 * configure.in (unistd.h, string.h, strings.h): Configure in. 1209 * configure, config.in: Rebuild. 1210 1211Thu Mar 20 19:40:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1212 1213 * d30v-insns (void): Provide a second emul instruction using a 1214 branch prefix. 1215 1216Tue Mar 18 20:51:42 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1217 1218 * d30v-insn (do_sat*): Pass all necessary args. 1219 1220Tue Mar 18 18:49:10 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1221 1222 * d30v-insns (SAT*): Issue warning when bit overflow. 1223 (EMUL): Exit with GPR[2] not 2. 1224 1225Tue Mar 18 14:24:09 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1226 1227 * sim-state.h: New file rename engine.h. 1228 (sim_state): Rename engine strut to sim_state, rename events and 1229 core members. 1230 1231 * engine.c: Update. 1232 * cpu.h, cpu.c: Ditto. 1233 * alu.h: Ditto. 1234 * d30v-insns: Ditto. 1235 * sim-calls.c: Ditto. 1236 1237 * Makefile.in (sim-*.c): Moved to ../common. 1238 1239Tue Mar 18 10:39:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1240 1241 * d30v-insns (do_mac): Adding wrong register. 1242 (do_macs): Ditto. 1243 (do_msub): Ditto. 1244 (do_msubs): Ditto. 1245 1246 * ic-d30v: Put back definitions of RaH, RaL, et.al. 1247 (do_sra2h, do_srah): Use. 1248 (do_srl2h, do_srlh): Use. 1249 1250 * d30v-insns (SAT, SAT2H, SATp, SATZ): Implement saturate. 1251 1252Tue Mar 18 03:01:25 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1253 1254 * d30v-insns: Specify wild insted of reserved bits. 1255 (void): 1256 1257Mon Mar 17 15:10:07 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1258 1259 * configure: Re-generate. 1260 1261Mon Mar 17 14:35:37 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1262 1263 * Makefile.in (SIM_EXTRA_CFLAGS), configure.in: Include SIM_* 1264 options. Allow RESERVED_BITS to be configured. 1265 * configure: Re-generate. 1266 1267 * Makefile.in (sim-*.h): Drop, not needed. 1268 (sim-*.c): Make each explicit so that they automatically update. 1269 1270Sat Mar 15 02:34:30 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1271 1272 * ic-d30v (imm long): Incorrect calculation. 1273 1274 * d30v-insns (EMUL): Finish exit, write-string emul-call. 1275 1276 * sim-calls.c (sim_trace): Have sim-trace enable basic instruction 1277 tracing. 1278 1279Sat Mar 15 02:10:31 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1280 1281 * configure.in: Enable common options - endian, inline and 1282 warnings. 1283 * configure: Regenerate. 1284 1285Fri Mar 14 16:11:50 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1286 1287 * Makefile.in (cpu.o): Update dependencies. 1288 * cpu.c (is_condition_ok): Update PSW bit manipulations. 1289 1290Fri Mar 14 12:49:20 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1291 1292 * configure.in: Autoconfig m4 1293 * configure: Regenerate. 1294 1295 * Makefile.in: Use m4 to preprocess d30v-insns. 1296 * d30v-insn: Adjust. 1297 1298Thu Mar 13 12:44:54 1997 Doug Evans <dje@canuck.cygnus.com> 1299 1300 * sim-calls.c (sim_open): New SIM_DESC result. Argument is now 1301 in argv form. 1302 (other sim_*): New SIM_DESC argument. 1303 1304Wed Mar 12 19:05:45 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1305 1306 * sim-calls.c (sim_open): Create all the d30v RAM blocks. 1307 1308 * engine.c (engine_run_until_stop): Handle delayed subroutine 1309 call. 1310 * d30v-insn: Ditto. 1311 1312 * ic-d30v: For Rb and Rc always return the value and not the 1313 equation. 1314 * d30v-insn: Use. 1315 1316 * ic-d30v (val_Ra): Returns 0 or RA. 1317 * d30v-insn: Use. 1318 1319 * d30v-insn (make_even_reg, get_even_reg): New functions. Force 1320 the register index to be even, issusing a warning if it was not. 1321 (LD*, ST*): Use. 1322 1323Wed Mar 12 14:57:26 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1324 1325 * d30v-insns (do_trap): Implement TRAP instruction. 1326 1327 * alu.h (PSW_F, PSW_FLAG_VAL, PSW_FLAG_SET): New macro, map flag 1328 onto PSW bit. 1329 * ic-d30v: Drop F* expressions. 1330 * d30v-insn: Use more explicit PSW_FLAG_ ops. 1331 * cpu.h (PSW_*): Redo PSW bit values. 1332 * alu.h (ALU*_END): Update. Fix setting of overflow - logic was 1333 backwards. 1334 1335 * d30v-insn (MVFSYS, MVTSYS): Implement. 1336 * cpu.h (PSWH, PSWL): New macros for high, low word of PSW. 1337 1338Wed Mar 12 14:12:11 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1339 1340 * cpu.h (RPT_IS_CALL): New macro for processor field 1341 is_delayed_call. That in turn used as a flag to indicate if a 1342 delayed branch or delayed call is to occure. 1343 * d30v-insns (do_dbra): Set/clear RPT_IS_CALL; 1344 (do_dbrai): Ditto. 1345 (do_dbsr): Ditto. 1346 (do_dbsr): Ditto. 1347 (do_djmp): Ditto. 1348 (do_djmpi): Dotto. 1349 (do_djsr): Ditto. 1350 (do_djsri): Ditto. 1351 (void): 1352 1353 * d30v-insn (do_incr): Finish - handle modulo registers. 1354 1355 * d30v-insns (CMPU): Include all possible compare 1356 operations. Issue a warning where op defined by the processor 1357 spec. 1358 1359Wed Mar 12 13:55:55 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1360 1361 * d30v-insns: Add a new instruction class _EMUL and a new 1362 instruction EMUL that emulates a few basic IO operations. 1363 1364 * Makefile.in (tmp-igen): Filter in emul instructions. 1365 1366Fri Mar 7 20:32:13 1997 Andrew Cagney <cagney@kremvax.cygnus.com> 1367 1368 * d30v-insns (void): Fill in the gaps. 1369 1370Wed Feb 26 09:31:10 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au> 1371 1372 * Makefile.in (tmp-igen): Include ic-d30v in dependencies. 1373 1374 * ic-d30v (cache): Update to use H_word, L_word added to 1375 sim-endian.h. 1376 1377Tue Feb 25 15:26:51 1997 Andrew Cagney <cagney@kremvax.tpgi.com.au> 1378 1379 * Makefile.in (tmp-igen): Correctly run $(MAKE). 1380 1381Thu Feb 20 20:30:31 1997 Andrew Cagney <cagney@critters.cygnus.com> 1382 1383 * Makefile.in (FROM_IGEN, FROM_COMMON): Make the igen generated 1384 files dependant on tmp-igen. Define ENGINE_H. 1385 1386Sun Feb 16 16:42:48 1997 Andrew Cagney <cagney@critters.cygnus.com> 1387 1388 * configure.in: New file - follow Doug Evans instructions. 1389 * Makefile.in: Ditto. 1390 1391