1 /* BFD back-end for Renesas H8/300 COFF binaries.
2 Copyright 1990, 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999,
3 2000, 2001, 2002, 2003, 2004
4 Free Software Foundation, Inc.
5 Written by Steve Chamberlain, <sac@cygnus.com>.
6
7 This file is part of BFD, the Binary File Descriptor library.
8
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 2 of the License, or
12 (at your option) any later version.
13
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with this program; if not, write to the Free Software
21 Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
22
23 #include "bfd.h"
24 #include "sysdep.h"
25 #include "libbfd.h"
26 #include "bfdlink.h"
27 #include "genlink.h"
28 #include "coff/h8300.h"
29 #include "coff/internal.h"
30 #include "libcoff.h"
31 #include "libiberty.h"
32
33 #define COFF_DEFAULT_SECTION_ALIGNMENT_POWER (1)
34
35 /* We derive a hash table from the basic BFD hash table to
36 hold entries in the function vector. Aside from the
37 info stored by the basic hash table, we need the offset
38 of a particular entry within the hash table as well as
39 the offset where we'll add the next entry. */
40
41 struct funcvec_hash_entry
42 {
43 /* The basic hash table entry. */
44 struct bfd_hash_entry root;
45
46 /* The offset within the vectors section where
47 this entry lives. */
48 bfd_vma offset;
49 };
50
51 struct funcvec_hash_table
52 {
53 /* The basic hash table. */
54 struct bfd_hash_table root;
55
56 bfd *abfd;
57
58 /* Offset at which we'll add the next entry. */
59 unsigned int offset;
60 };
61
62 static struct bfd_hash_entry *
63 funcvec_hash_newfunc
64 (struct bfd_hash_entry *, struct bfd_hash_table *, const char *);
65
66 static bfd_boolean
67 funcvec_hash_table_init
68 (struct funcvec_hash_table *, bfd *,
69 struct bfd_hash_entry *(*) (struct bfd_hash_entry *,
70 struct bfd_hash_table *,
71 const char *));
72
73 static bfd_reloc_status_type special
74 (bfd *, arelent *, asymbol *, PTR, asection *, bfd *, char **);
75 static int select_reloc
76 (reloc_howto_type *);
77 static void rtype2howto
78 (arelent *, struct internal_reloc *);
79 static void reloc_processing
80 (arelent *, struct internal_reloc *, asymbol **, bfd *, asection *);
81 static bfd_boolean h8300_symbol_address_p
82 (bfd *, asection *, bfd_vma);
83 static int h8300_reloc16_estimate
84 (bfd *, asection *, arelent *, unsigned int,
85 struct bfd_link_info *);
86 static void h8300_reloc16_extra_cases
87 (bfd *, struct bfd_link_info *, struct bfd_link_order *, arelent *,
88 bfd_byte *, unsigned int *, unsigned int *);
89 static bfd_boolean h8300_bfd_link_add_symbols
90 (bfd *, struct bfd_link_info *);
91
92 /* To lookup a value in the function vector hash table. */
93 #define funcvec_hash_lookup(table, string, create, copy) \
94 ((struct funcvec_hash_entry *) \
95 bfd_hash_lookup (&(table)->root, (string), (create), (copy)))
96
97 /* The derived h8300 COFF linker table. Note it's derived from
98 the generic linker hash table, not the COFF backend linker hash
99 table! We use this to attach additional data structures we
100 need while linking on the h8300. */
101 struct h8300_coff_link_hash_table {
102 /* The main hash table. */
103 struct generic_link_hash_table root;
104
105 /* Section for the vectors table. This gets attached to a
106 random input bfd, we keep it here for easy access. */
107 asection *vectors_sec;
108
109 /* Hash table of the functions we need to enter into the function
110 vector. */
111 struct funcvec_hash_table *funcvec_hash_table;
112 };
113
114 static struct bfd_link_hash_table *h8300_coff_link_hash_table_create (bfd *);
115
116 /* Get the H8/300 COFF linker hash table from a link_info structure. */
117
118 #define h8300_coff_hash_table(p) \
119 ((struct h8300_coff_link_hash_table *) ((coff_hash_table (p))))
120
121 /* Initialize fields within a funcvec hash table entry. Called whenever
122 a new entry is added to the funcvec hash table. */
123
124 static struct bfd_hash_entry *
funcvec_hash_newfunc(struct bfd_hash_entry * entry,struct bfd_hash_table * gen_table,const char * string)125 funcvec_hash_newfunc (struct bfd_hash_entry *entry,
126 struct bfd_hash_table *gen_table,
127 const char *string)
128 {
129 struct funcvec_hash_entry *ret;
130 struct funcvec_hash_table *table;
131
132 ret = (struct funcvec_hash_entry *) entry;
133 table = (struct funcvec_hash_table *) gen_table;
134
135 /* Allocate the structure if it has not already been allocated by a
136 subclass. */
137 if (ret == NULL)
138 ret = ((struct funcvec_hash_entry *)
139 bfd_hash_allocate (gen_table,
140 sizeof (struct funcvec_hash_entry)));
141 if (ret == NULL)
142 return NULL;
143
144 /* Call the allocation method of the superclass. */
145 ret = ((struct funcvec_hash_entry *)
146 bfd_hash_newfunc ((struct bfd_hash_entry *) ret, gen_table, string));
147
148 if (ret == NULL)
149 return NULL;
150
151 /* Note where this entry will reside in the function vector table. */
152 ret->offset = table->offset;
153
154 /* Bump the offset at which we store entries in the function
155 vector. We'd like to bump up the size of the vectors section,
156 but it's not easily available here. */
157 switch (bfd_get_mach (table->abfd))
158 {
159 case bfd_mach_h8300:
160 case bfd_mach_h8300hn:
161 case bfd_mach_h8300sn:
162 table->offset += 2;
163 break;
164 case bfd_mach_h8300h:
165 case bfd_mach_h8300s:
166 table->offset += 4;
167 break;
168 default:
169 return NULL;
170 }
171
172 /* Everything went OK. */
173 return (struct bfd_hash_entry *) ret;
174 }
175
176 /* Initialize the function vector hash table. */
177
178 static bfd_boolean
funcvec_hash_table_init(struct funcvec_hash_table * table,bfd * abfd,struct bfd_hash_entry * (* newfunc)(struct bfd_hash_entry *,struct bfd_hash_table *,const char *))179 funcvec_hash_table_init (struct funcvec_hash_table *table,
180 bfd *abfd,
181 struct bfd_hash_entry *(*newfunc)
182 (struct bfd_hash_entry *,
183 struct bfd_hash_table *,
184 const char *))
185 {
186 /* Initialize our local fields, then call the generic initialization
187 routine. */
188 table->offset = 0;
189 table->abfd = abfd;
190 return (bfd_hash_table_init (&table->root, newfunc));
191 }
192
193 /* Create the derived linker hash table. We use a derived hash table
194 basically to hold "static" information during an H8/300 coff link
195 without using static variables. */
196
197 static struct bfd_link_hash_table *
h8300_coff_link_hash_table_create(bfd * abfd)198 h8300_coff_link_hash_table_create (bfd *abfd)
199 {
200 struct h8300_coff_link_hash_table *ret;
201 bfd_size_type amt = sizeof (struct h8300_coff_link_hash_table);
202
203 ret = (struct h8300_coff_link_hash_table *) bfd_malloc (amt);
204 if (ret == NULL)
205 return NULL;
206 if (!_bfd_link_hash_table_init (&ret->root.root, abfd,
207 _bfd_generic_link_hash_newfunc))
208 {
209 free (ret);
210 return NULL;
211 }
212
213 /* Initialize our data. */
214 ret->vectors_sec = NULL;
215 ret->funcvec_hash_table = NULL;
216
217 /* OK. Everything's initialized, return the base pointer. */
218 return &ret->root.root;
219 }
220
221 /* Special handling for H8/300 relocs.
222 We only come here for pcrel stuff and return normally if not an -r link.
223 When doing -r, we can't do any arithmetic for the pcrel stuff, because
224 the code in reloc.c assumes that we can manipulate the targets of
225 the pcrel branches. This isn't so, since the H8/300 can do relaxing,
226 which means that the gap after the instruction may not be enough to
227 contain the offset required for the branch, so we have to use only
228 the addend until the final link. */
229
230 static bfd_reloc_status_type
special(bfd * abfd ATTRIBUTE_UNUSED,arelent * reloc_entry ATTRIBUTE_UNUSED,asymbol * symbol ATTRIBUTE_UNUSED,PTR data ATTRIBUTE_UNUSED,asection * input_section ATTRIBUTE_UNUSED,bfd * output_bfd,char ** error_message ATTRIBUTE_UNUSED)231 special (bfd *abfd ATTRIBUTE_UNUSED,
232 arelent *reloc_entry ATTRIBUTE_UNUSED,
233 asymbol *symbol ATTRIBUTE_UNUSED,
234 PTR data ATTRIBUTE_UNUSED,
235 asection *input_section ATTRIBUTE_UNUSED,
236 bfd *output_bfd,
237 char **error_message ATTRIBUTE_UNUSED)
238 {
239 if (output_bfd == (bfd *) NULL)
240 return bfd_reloc_continue;
241
242 /* Adjust the reloc address to that in the output section. */
243 reloc_entry->address += input_section->output_offset;
244 return bfd_reloc_ok;
245 }
246
247 static reloc_howto_type howto_table[] = {
248 HOWTO (R_RELBYTE, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8", FALSE, 0x000000ff, 0x000000ff, FALSE),
249 HOWTO (R_RELWORD, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
250 HOWTO (R_RELLONG, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "32", FALSE, 0xffffffff, 0xffffffff, FALSE),
251 HOWTO (R_PCRBYTE, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8", FALSE, 0x000000ff, 0x000000ff, TRUE),
252 HOWTO (R_PCRWORD, 0, 1, 16, TRUE, 0, complain_overflow_signed, special, "DISP16", FALSE, 0x0000ffff, 0x0000ffff, TRUE),
253 HOWTO (R_PCRLONG, 0, 2, 32, TRUE, 0, complain_overflow_signed, special, "DISP32", FALSE, 0xffffffff, 0xffffffff, TRUE),
254 HOWTO (R_MOV16B1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:16", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
255 HOWTO (R_MOV16B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
256 HOWTO (R_JMP1, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "16/pcrel", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
257 HOWTO (R_JMP2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pcrecl/16", FALSE, 0x000000ff, 0x000000ff, FALSE),
258 HOWTO (R_JMPL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield, special, "24/pcrell", FALSE, 0x00ffffff, 0x00ffffff, FALSE),
259 HOWTO (R_JMPL2, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "pc8/24", FALSE, 0x000000ff, 0x000000ff, FALSE),
260 HOWTO (R_MOV24B1, 0, 1, 32, FALSE, 0, complain_overflow_bitfield, special, "relaxable mov.b:24", FALSE, 0xffffffff, 0xffffffff, FALSE),
261 HOWTO (R_MOV24B2, 0, 1, 8, FALSE, 0, complain_overflow_bitfield, special, "relaxed mov.b:24", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
262
263 /* An indirect reference to a function. This causes the function's address
264 to be added to the function vector in lo-mem and puts the address of
265 the function vector's entry in the jsr instruction. */
266 HOWTO (R_MEM_INDIRECT, 0, 0, 8, FALSE, 0, complain_overflow_bitfield, special, "8/indirect", FALSE, 0x000000ff, 0x000000ff, FALSE),
267
268 /* Internal reloc for relaxing. This is created when a 16-bit pc-relative
269 branch is turned into an 8-bit pc-relative branch. */
270 HOWTO (R_PCRWORD_B, 0, 0, 8, TRUE, 0, complain_overflow_bitfield, special, "relaxed bCC:16", FALSE, 0x000000ff, 0x000000ff, FALSE),
271
272 HOWTO (R_MOVL1, 0, 2, 32, FALSE, 0, complain_overflow_bitfield,special, "32/24 relaxable move", FALSE, 0xffffffff, 0xffffffff, FALSE),
273
274 HOWTO (R_MOVL2, 0, 1, 16, FALSE, 0, complain_overflow_bitfield, special, "32/24 relaxed move", FALSE, 0x0000ffff, 0x0000ffff, FALSE),
275
276 HOWTO (R_BCC_INV, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "DISP8 inverted", FALSE, 0x000000ff, 0x000000ff, TRUE),
277
278 HOWTO (R_JMP_DEL, 0, 0, 8, TRUE, 0, complain_overflow_signed, special, "Deleted jump", FALSE, 0x000000ff, 0x000000ff, TRUE),
279 };
280
281 /* Turn a howto into a reloc number. */
282
283 #define SELECT_RELOC(x,howto) \
284 { x.r_type = select_reloc (howto); }
285
286 #define BADMAG(x) (H8300BADMAG (x) && H8300HBADMAG (x) && H8300SBADMAG (x) \
287 && H8300HNBADMAG(x) && H8300SNBADMAG(x))
288 #define H8300 1 /* Customize coffcode.h */
289 #define __A_MAGIC_SET__
290
291 /* Code to swap in the reloc. */
292 #define SWAP_IN_RELOC_OFFSET H_GET_32
293 #define SWAP_OUT_RELOC_OFFSET H_PUT_32
294 #define SWAP_OUT_RELOC_EXTRA(abfd, src, dst) \
295 dst->r_stuff[0] = 'S'; \
296 dst->r_stuff[1] = 'C';
297
298 static int
select_reloc(reloc_howto_type * howto)299 select_reloc (reloc_howto_type *howto)
300 {
301 return howto->type;
302 }
303
304 /* Code to turn a r_type into a howto ptr, uses the above howto table. */
305
306 static void
rtype2howto(arelent * internal,struct internal_reloc * dst)307 rtype2howto (arelent *internal, struct internal_reloc *dst)
308 {
309 switch (dst->r_type)
310 {
311 case R_RELBYTE:
312 internal->howto = howto_table + 0;
313 break;
314 case R_RELWORD:
315 internal->howto = howto_table + 1;
316 break;
317 case R_RELLONG:
318 internal->howto = howto_table + 2;
319 break;
320 case R_PCRBYTE:
321 internal->howto = howto_table + 3;
322 break;
323 case R_PCRWORD:
324 internal->howto = howto_table + 4;
325 break;
326 case R_PCRLONG:
327 internal->howto = howto_table + 5;
328 break;
329 case R_MOV16B1:
330 internal->howto = howto_table + 6;
331 break;
332 case R_MOV16B2:
333 internal->howto = howto_table + 7;
334 break;
335 case R_JMP1:
336 internal->howto = howto_table + 8;
337 break;
338 case R_JMP2:
339 internal->howto = howto_table + 9;
340 break;
341 case R_JMPL1:
342 internal->howto = howto_table + 10;
343 break;
344 case R_JMPL2:
345 internal->howto = howto_table + 11;
346 break;
347 case R_MOV24B1:
348 internal->howto = howto_table + 12;
349 break;
350 case R_MOV24B2:
351 internal->howto = howto_table + 13;
352 break;
353 case R_MEM_INDIRECT:
354 internal->howto = howto_table + 14;
355 break;
356 case R_PCRWORD_B:
357 internal->howto = howto_table + 15;
358 break;
359 case R_MOVL1:
360 internal->howto = howto_table + 16;
361 break;
362 case R_MOVL2:
363 internal->howto = howto_table + 17;
364 break;
365 case R_BCC_INV:
366 internal->howto = howto_table + 18;
367 break;
368 case R_JMP_DEL:
369 internal->howto = howto_table + 19;
370 break;
371 default:
372 abort ();
373 break;
374 }
375 }
376
377 #define RTYPE2HOWTO(internal, relocentry) rtype2howto (internal, relocentry)
378
379 /* Perform any necessary magic to the addend in a reloc entry. */
380
381 #define CALC_ADDEND(abfd, symbol, ext_reloc, cache_ptr) \
382 cache_ptr->addend = ext_reloc.r_offset;
383
384 #define RELOC_PROCESSING(relent,reloc,symbols,abfd,section) \
385 reloc_processing (relent, reloc, symbols, abfd, section)
386
387 static void
reloc_processing(arelent * relent,struct internal_reloc * reloc,asymbol ** symbols,bfd * abfd,asection * section)388 reloc_processing (arelent *relent, struct internal_reloc *reloc,
389 asymbol **symbols, bfd *abfd, asection *section)
390 {
391 relent->address = reloc->r_vaddr;
392 rtype2howto (relent, reloc);
393
394 if (((int) reloc->r_symndx) > 0)
395 relent->sym_ptr_ptr = symbols + obj_convert (abfd)[reloc->r_symndx];
396 else
397 relent->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
398
399 relent->addend = reloc->r_offset;
400
401 relent->address -= section->vma;
402 #if 0
403 relent->section = 0;
404 #endif
405 }
406
407 static bfd_boolean
h8300_symbol_address_p(bfd * abfd,asection * input_section,bfd_vma address)408 h8300_symbol_address_p (bfd *abfd, asection *input_section, bfd_vma address)
409 {
410 asymbol **s;
411
412 s = _bfd_generic_link_get_symbols (abfd);
413 BFD_ASSERT (s != (asymbol **) NULL);
414
415 /* Search all the symbols for one in INPUT_SECTION with
416 address ADDRESS. */
417 while (*s)
418 {
419 asymbol *p = *s;
420
421 if (p->section == input_section
422 && (input_section->output_section->vma
423 + input_section->output_offset
424 + p->value) == address)
425 return TRUE;
426 s++;
427 }
428 return FALSE;
429 }
430
431 /* If RELOC represents a relaxable instruction/reloc, change it into
432 the relaxed reloc, notify the linker that symbol addresses
433 have changed (bfd_perform_slip) and return how much the current
434 section has shrunk by.
435
436 FIXME: Much of this code has knowledge of the ordering of entries
437 in the howto table. This needs to be fixed. */
438
439 static int
h8300_reloc16_estimate(bfd * abfd,asection * input_section,arelent * reloc,unsigned int shrink,struct bfd_link_info * link_info)440 h8300_reloc16_estimate (bfd *abfd, asection *input_section, arelent *reloc,
441 unsigned int shrink, struct bfd_link_info *link_info)
442 {
443 bfd_vma value;
444 bfd_vma dot;
445 bfd_vma gap;
446 static asection *last_input_section = NULL;
447 static arelent *last_reloc = NULL;
448
449 /* The address of the thing to be relocated will have moved back by
450 the size of the shrink - but we don't change reloc->address here,
451 since we need it to know where the relocation lives in the source
452 uncooked section. */
453 bfd_vma address = reloc->address - shrink;
454
455 if (input_section != last_input_section)
456 last_reloc = NULL;
457
458 /* Only examine the relocs which might be relaxable. */
459 switch (reloc->howto->type)
460 {
461 /* This is the 16-/24-bit absolute branch which could become an
462 8-bit pc-relative branch. */
463 case R_JMP1:
464 case R_JMPL1:
465 /* Get the address of the target of this branch. */
466 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
467
468 /* Get the address of the next instruction (not the reloc). */
469 dot = (input_section->output_section->vma
470 + input_section->output_offset + address);
471
472 /* Adjust for R_JMP1 vs R_JMPL1. */
473 dot += (reloc->howto->type == R_JMP1 ? 1 : 2);
474
475 /* Compute the distance from this insn to the branch target. */
476 gap = value - dot;
477
478 /* If the distance is within -128..+128 inclusive, then we can relax
479 this jump. +128 is valid since the target will move two bytes
480 closer if we do relax this branch. */
481 if ((int) gap >= -128 && (int) gap <= 128)
482 {
483 bfd_byte code;
484
485 if (!bfd_get_section_contents (abfd, input_section, & code,
486 reloc->address, 1))
487 break;
488 code = bfd_get_8 (abfd, & code);
489
490 /* It's possible we may be able to eliminate this branch entirely;
491 if the previous instruction is a branch around this instruction,
492 and there's no label at this instruction, then we can reverse
493 the condition on the previous branch and eliminate this jump.
494
495 original: new:
496 bCC lab1 bCC' lab2
497 jmp lab2
498 lab1: lab1:
499
500 This saves 4 bytes instead of two, and should be relatively
501 common.
502
503 Only perform this optimisation for jumps (code 0x5a) not
504 subroutine calls, as otherwise it could transform:
505
506 mov.w r0,r0
507 beq .L1
508 jsr @_bar
509 .L1: rts
510 _bar: rts
511 into:
512 mov.w r0,r0
513 bne _bar
514 rts
515 _bar: rts
516
517 which changes the call (jsr) into a branch (bne). */
518 if (code == 0x5a
519 && gap <= 126
520 && last_reloc
521 && last_reloc->howto->type == R_PCRBYTE)
522 {
523 bfd_vma last_value;
524 last_value = bfd_coff_reloc16_get_value (last_reloc, link_info,
525 input_section) + 1;
526
527 if (last_value == dot + 2
528 && last_reloc->address + 1 == reloc->address
529 && !h8300_symbol_address_p (abfd, input_section, dot - 2))
530 {
531 reloc->howto = howto_table + 19;
532 last_reloc->howto = howto_table + 18;
533 last_reloc->sym_ptr_ptr = reloc->sym_ptr_ptr;
534 last_reloc->addend = reloc->addend;
535 shrink += 4;
536 bfd_perform_slip (abfd, 4, input_section, address);
537 break;
538 }
539 }
540
541 /* Change the reloc type. */
542 reloc->howto = reloc->howto + 1;
543
544 /* This shrinks this section by two bytes. */
545 shrink += 2;
546 bfd_perform_slip (abfd, 2, input_section, address);
547 }
548 break;
549
550 /* This is the 16-bit pc-relative branch which could become an 8-bit
551 pc-relative branch. */
552 case R_PCRWORD:
553 /* Get the address of the target of this branch, add one to the value
554 because the addend field in PCrel jumps is off by -1. */
555 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section) + 1;
556
557 /* Get the address of the next instruction if we were to relax. */
558 dot = input_section->output_section->vma +
559 input_section->output_offset + address;
560
561 /* Compute the distance from this insn to the branch target. */
562 gap = value - dot;
563
564 /* If the distance is within -128..+128 inclusive, then we can relax
565 this jump. +128 is valid since the target will move two bytes
566 closer if we do relax this branch. */
567 if ((int) gap >= -128 && (int) gap <= 128)
568 {
569 /* Change the reloc type. */
570 reloc->howto = howto_table + 15;
571
572 /* This shrinks this section by two bytes. */
573 shrink += 2;
574 bfd_perform_slip (abfd, 2, input_section, address);
575 }
576 break;
577
578 /* This is a 16-bit absolute address in a mov.b insn, which can
579 become an 8-bit absolute address if it's in the right range. */
580 case R_MOV16B1:
581 /* Get the address of the data referenced by this mov.b insn. */
582 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
583 value = bfd_h8300_pad_address (abfd, value);
584
585 /* If the address is in the top 256 bytes of the address space
586 then we can relax this instruction. */
587 if (value >= 0xffffff00u)
588 {
589 /* Change the reloc type. */
590 reloc->howto = reloc->howto + 1;
591
592 /* This shrinks this section by two bytes. */
593 shrink += 2;
594 bfd_perform_slip (abfd, 2, input_section, address);
595 }
596 break;
597
598 /* Similarly for a 24-bit absolute address in a mov.b. Note that
599 if we can't relax this into an 8-bit absolute, we'll fall through
600 and try to relax it into a 16-bit absolute. */
601 case R_MOV24B1:
602 /* Get the address of the data referenced by this mov.b insn. */
603 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
604 value = bfd_h8300_pad_address (abfd, value);
605
606 if (value >= 0xffffff00u)
607 {
608 /* Change the reloc type. */
609 reloc->howto = reloc->howto + 1;
610
611 /* This shrinks this section by four bytes. */
612 shrink += 4;
613 bfd_perform_slip (abfd, 4, input_section, address);
614
615 /* Done with this reloc. */
616 break;
617 }
618
619 /* FALLTHROUGH and try to turn the 24-/32-bit reloc into a 16-bit
620 reloc. */
621
622 /* This is a 24-/32-bit absolute address in a mov insn, which can
623 become an 16-bit absolute address if it's in the right range. */
624 case R_MOVL1:
625 /* Get the address of the data referenced by this mov insn. */
626 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
627 value = bfd_h8300_pad_address (abfd, value);
628
629 /* If the address is a sign-extended 16-bit value then we can
630 relax this instruction. */
631 if (value <= 0x7fff || value >= 0xffff8000u)
632 {
633 /* Change the reloc type. */
634 reloc->howto = howto_table + 17;
635
636 /* This shrinks this section by two bytes. */
637 shrink += 2;
638 bfd_perform_slip (abfd, 2, input_section, address);
639 }
640 break;
641
642 /* No other reloc types represent relaxing opportunities. */
643 default:
644 break;
645 }
646
647 last_reloc = reloc;
648 last_input_section = input_section;
649 return shrink;
650 }
651
652 /* Handle relocations for the H8/300, including relocs for relaxed
653 instructions.
654
655 FIXME: Not all relocations check for overflow! */
656
657 static void
h8300_reloc16_extra_cases(bfd * abfd,struct bfd_link_info * link_info,struct bfd_link_order * link_order,arelent * reloc,bfd_byte * data,unsigned int * src_ptr,unsigned int * dst_ptr)658 h8300_reloc16_extra_cases (bfd *abfd, struct bfd_link_info *link_info,
659 struct bfd_link_order *link_order, arelent *reloc,
660 bfd_byte *data, unsigned int *src_ptr,
661 unsigned int *dst_ptr)
662 {
663 unsigned int src_address = *src_ptr;
664 unsigned int dst_address = *dst_ptr;
665 asection *input_section = link_order->u.indirect.section;
666 bfd_vma value;
667 bfd_vma dot;
668 int gap, tmp;
669 unsigned char temp_code;
670
671 switch (reloc->howto->type)
672 {
673 /* Generic 8-bit pc-relative relocation. */
674 case R_PCRBYTE:
675 /* Get the address of the target of this branch. */
676 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
677
678 dot = (link_order->offset
679 + dst_address
680 + link_order->u.indirect.section->output_section->vma);
681
682 gap = value - dot;
683
684 /* Sanity check. */
685 if (gap < -128 || gap > 126)
686 {
687 if (! ((*link_info->callbacks->reloc_overflow)
688 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
689 reloc->howto->name, reloc->addend, input_section->owner,
690 input_section, reloc->address)))
691 abort ();
692 }
693
694 /* Everything looks OK. Apply the relocation and update the
695 src/dst address appropriately. */
696 bfd_put_8 (abfd, gap, data + dst_address);
697 dst_address++;
698 src_address++;
699
700 /* All done. */
701 break;
702
703 /* Generic 16-bit pc-relative relocation. */
704 case R_PCRWORD:
705 /* Get the address of the target of this branch. */
706 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
707
708 /* Get the address of the instruction (not the reloc). */
709 dot = (link_order->offset
710 + dst_address
711 + link_order->u.indirect.section->output_section->vma + 1);
712
713 gap = value - dot;
714
715 /* Sanity check. */
716 if (gap > 32766 || gap < -32768)
717 {
718 if (! ((*link_info->callbacks->reloc_overflow)
719 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
720 reloc->howto->name, reloc->addend, input_section->owner,
721 input_section, reloc->address)))
722 abort ();
723 }
724
725 /* Everything looks OK. Apply the relocation and update the
726 src/dst address appropriately. */
727 bfd_put_16 (abfd, (bfd_vma) gap, data + dst_address);
728 dst_address += 2;
729 src_address += 2;
730
731 /* All done. */
732 break;
733
734 /* Generic 8-bit absolute relocation. */
735 case R_RELBYTE:
736 /* Get the address of the object referenced by this insn. */
737 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
738
739 bfd_put_8 (abfd, value & 0xff, data + dst_address);
740 dst_address += 1;
741 src_address += 1;
742
743 /* All done. */
744 break;
745
746 /* Various simple 16-bit absolute relocations. */
747 case R_MOV16B1:
748 case R_JMP1:
749 case R_RELWORD:
750 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
751 bfd_put_16 (abfd, value, data + dst_address);
752 dst_address += 2;
753 src_address += 2;
754 break;
755
756 /* Various simple 24-/32-bit absolute relocations. */
757 case R_MOV24B1:
758 case R_MOVL1:
759 case R_RELLONG:
760 /* Get the address of the target of this branch. */
761 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
762 bfd_put_32 (abfd, value, data + dst_address);
763 dst_address += 4;
764 src_address += 4;
765 break;
766
767 /* Another 24-/32-bit absolute relocation. */
768 case R_JMPL1:
769 /* Get the address of the target of this branch. */
770 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
771
772 value = ((value & 0x00ffffff)
773 | (bfd_get_32 (abfd, data + src_address) & 0xff000000));
774 bfd_put_32 (abfd, value, data + dst_address);
775 dst_address += 4;
776 src_address += 4;
777 break;
778
779 /* This is a 24-/32-bit absolute address in one of the following
780 instructions:
781
782 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
783 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", "ldc.w",
784 "stc.w" and "mov.[bwl]"
785
786 We may relax this into an 16-bit absolute address if it's in
787 the right range. */
788 case R_MOVL2:
789 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
790 value = bfd_h8300_pad_address (abfd, value);
791
792 /* Sanity check. */
793 if (value <= 0x7fff || value >= 0xffff8000u)
794 {
795 /* Insert the 16-bit value into the proper location. */
796 bfd_put_16 (abfd, value, data + dst_address);
797
798 /* Fix the opcode. For all the instructions that belong to
799 this relaxation, we simply need to turn off bit 0x20 in
800 the previous byte. */
801 data[dst_address - 1] &= ~0x20;
802 dst_address += 2;
803 src_address += 4;
804 }
805 else
806 {
807 if (! ((*link_info->callbacks->reloc_overflow)
808 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
809 reloc->howto->name, reloc->addend, input_section->owner,
810 input_section, reloc->address)))
811 abort ();
812 }
813 break;
814
815 /* A 16-bit absolute branch that is now an 8-bit pc-relative branch. */
816 case R_JMP2:
817 /* Get the address of the target of this branch. */
818 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
819
820 /* Get the address of the next instruction. */
821 dot = (link_order->offset
822 + dst_address
823 + link_order->u.indirect.section->output_section->vma + 1);
824
825 gap = value - dot;
826
827 /* Sanity check. */
828 if (gap < -128 || gap > 126)
829 {
830 if (! ((*link_info->callbacks->reloc_overflow)
831 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
832 reloc->howto->name, reloc->addend, input_section->owner,
833 input_section, reloc->address)))
834 abort ();
835 }
836
837 /* Now fix the instruction itself. */
838 switch (data[dst_address - 1])
839 {
840 case 0x5e:
841 /* jsr -> bsr */
842 bfd_put_8 (abfd, 0x55, data + dst_address - 1);
843 break;
844 case 0x5a:
845 /* jmp -> bra */
846 bfd_put_8 (abfd, 0x40, data + dst_address - 1);
847 break;
848
849 default:
850 abort ();
851 }
852
853 /* Write out the 8-bit value. */
854 bfd_put_8 (abfd, gap, data + dst_address);
855
856 dst_address += 1;
857 src_address += 3;
858
859 break;
860
861 /* A 16-bit pc-relative branch that is now an 8-bit pc-relative branch. */
862 case R_PCRWORD_B:
863 /* Get the address of the target of this branch. */
864 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
865
866 /* Get the address of the instruction (not the reloc). */
867 dot = (link_order->offset
868 + dst_address
869 + link_order->u.indirect.section->output_section->vma - 1);
870
871 gap = value - dot;
872
873 /* Sanity check. */
874 if (gap < -128 || gap > 126)
875 {
876 if (! ((*link_info->callbacks->reloc_overflow)
877 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
878 reloc->howto->name, reloc->addend, input_section->owner,
879 input_section, reloc->address)))
880 abort ();
881 }
882
883 /* Now fix the instruction. */
884 switch (data[dst_address - 2])
885 {
886 case 0x58:
887 /* bCC:16 -> bCC:8 */
888 /* Get the second byte of the original insn, which contains
889 the condition code. */
890 tmp = data[dst_address - 1];
891
892 /* Compute the fisrt byte of the relaxed instruction. The
893 original sequence 0x58 0xX0 is relaxed to 0x4X, where X
894 represents the condition code. */
895 tmp &= 0xf0;
896 tmp >>= 4;
897 tmp |= 0x40;
898
899 /* Write it. */
900 bfd_put_8 (abfd, tmp, data + dst_address - 2);
901 break;
902
903 case 0x5c:
904 /* bsr:16 -> bsr:8 */
905 bfd_put_8 (abfd, 0x55, data + dst_address - 2);
906 break;
907
908 default:
909 abort ();
910 }
911
912 /* Output the target. */
913 bfd_put_8 (abfd, gap, data + dst_address - 1);
914
915 /* We don't advance dst_address -- the 8-bit reloc is applied at
916 dst_address - 1, so the next insn should begin at dst_address. */
917 src_address += 2;
918
919 break;
920
921 /* Similarly for a 24-bit absolute that is now 8 bits. */
922 case R_JMPL2:
923 /* Get the address of the target of this branch. */
924 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
925
926 /* Get the address of the instruction (not the reloc). */
927 dot = (link_order->offset
928 + dst_address
929 + link_order->u.indirect.section->output_section->vma + 2);
930
931 gap = value - dot;
932
933 /* Fix the instruction. */
934 switch (data[src_address])
935 {
936 case 0x5e:
937 /* jsr -> bsr */
938 bfd_put_8 (abfd, 0x55, data + dst_address);
939 break;
940 case 0x5a:
941 /* jmp ->bra */
942 bfd_put_8 (abfd, 0x40, data + dst_address);
943 break;
944 default:
945 abort ();
946 }
947
948 bfd_put_8 (abfd, gap, data + dst_address + 1);
949 dst_address += 2;
950 src_address += 4;
951
952 break;
953
954 /* This is a 16-bit absolute address in one of the following
955 instructions:
956
957 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
958 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
959 "mov.b"
960
961 We may relax this into an 8-bit absolute address if it's in
962 the right range. */
963 case R_MOV16B2:
964 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
965
966 /* All instructions with R_H8_DIR16B2 start with 0x6a. */
967 if (data[dst_address - 2] != 0x6a)
968 abort ();
969
970 temp_code = data[src_address - 1];
971
972 /* If this is a mov.b instruction, clear the lower nibble, which
973 contains the source/destination register number. */
974 if ((temp_code & 0x10) != 0x10)
975 temp_code &= 0xf0;
976
977 /* Fix up the opcode. */
978 switch (temp_code)
979 {
980 case 0x00:
981 /* This is mov.b @aa:16,Rd. */
982 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
983 break;
984 case 0x80:
985 /* This is mov.b Rs,@aa:16. */
986 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
987 break;
988 case 0x18:
989 /* This is a bit-maniputation instruction that stores one
990 bit into memory, one of "bclr", "bist", "bnot", "bset",
991 and "bst". */
992 data[dst_address - 2] = 0x7f;
993 break;
994 case 0x10:
995 /* This is a bit-maniputation instruction that loads one bit
996 from memory, one of "band", "biand", "bild", "bior",
997 "bixor", "bld", "bor", "btst", and "bxor". */
998 data[dst_address - 2] = 0x7e;
999 break;
1000 default:
1001 abort ();
1002 }
1003
1004 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1005 src_address += 2;
1006 break;
1007
1008 /* This is a 24-bit absolute address in one of the following
1009 instructions:
1010
1011 "band", "bclr", "biand", "bild", "bior", "bist", "bixor",
1012 "bld", "bnot", "bor", "bset", "bst", "btst", "bxor", and
1013 "mov.b"
1014
1015 We may relax this into an 8-bit absolute address if it's in
1016 the right range. */
1017 case R_MOV24B2:
1018 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1019
1020 /* All instructions with R_MOV24B2 start with 0x6a. */
1021 if (data[dst_address - 2] != 0x6a)
1022 abort ();
1023
1024 temp_code = data[src_address - 1];
1025
1026 /* If this is a mov.b instruction, clear the lower nibble, which
1027 contains the source/destination register number. */
1028 if ((temp_code & 0x30) != 0x30)
1029 temp_code &= 0xf0;
1030
1031 /* Fix up the opcode. */
1032 switch (temp_code)
1033 {
1034 case 0x20:
1035 /* This is mov.b @aa:24/32,Rd. */
1036 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x20;
1037 break;
1038 case 0xa0:
1039 /* This is mov.b Rs,@aa:24/32. */
1040 data[dst_address - 2] = (data[src_address - 1] & 0xf) | 0x30;
1041 break;
1042 case 0x38:
1043 /* This is a bit-maniputation instruction that stores one
1044 bit into memory, one of "bclr", "bist", "bnot", "bset",
1045 and "bst". */
1046 data[dst_address - 2] = 0x7f;
1047 break;
1048 case 0x30:
1049 /* This is a bit-maniputation instruction that loads one bit
1050 from memory, one of "band", "biand", "bild", "bior",
1051 "bixor", "bld", "bor", "btst", and "bxor". */
1052 data[dst_address - 2] = 0x7e;
1053 break;
1054 default:
1055 abort ();
1056 }
1057
1058 bfd_put_8 (abfd, value & 0xff, data + dst_address - 1);
1059 src_address += 4;
1060 break;
1061
1062 case R_BCC_INV:
1063 /* Get the address of the target of this branch. */
1064 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1065
1066 dot = (link_order->offset
1067 + dst_address
1068 + link_order->u.indirect.section->output_section->vma) + 1;
1069
1070 gap = value - dot;
1071
1072 /* Sanity check. */
1073 if (gap < -128 || gap > 126)
1074 {
1075 if (! ((*link_info->callbacks->reloc_overflow)
1076 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1077 reloc->howto->name, reloc->addend, input_section->owner,
1078 input_section, reloc->address)))
1079 abort ();
1080 }
1081
1082 /* Everything looks OK. Fix the condition in the instruction, apply
1083 the relocation, and update the src/dst address appropriately. */
1084
1085 bfd_put_8 (abfd, bfd_get_8 (abfd, data + dst_address - 1) ^ 1,
1086 data + dst_address - 1);
1087 bfd_put_8 (abfd, gap, data + dst_address);
1088 dst_address++;
1089 src_address++;
1090
1091 /* All done. */
1092 break;
1093
1094 case R_JMP_DEL:
1095 src_address += 4;
1096 break;
1097
1098 /* An 8-bit memory indirect instruction (jmp/jsr).
1099
1100 There's several things that need to be done to handle
1101 this relocation.
1102
1103 If this is a reloc against the absolute symbol, then
1104 we should handle it just R_RELBYTE. Likewise if it's
1105 for a symbol with a value ge 0 and le 0xff.
1106
1107 Otherwise it's a jump/call through the function vector,
1108 and the linker is expected to set up the function vector
1109 and put the right value into the jump/call instruction. */
1110 case R_MEM_INDIRECT:
1111 {
1112 /* We need to find the symbol so we can determine it's
1113 address in the function vector table. */
1114 asymbol *symbol;
1115 const char *name;
1116 struct funcvec_hash_table *ftab;
1117 struct funcvec_hash_entry *h;
1118 struct h8300_coff_link_hash_table *htab;
1119 asection *vectors_sec;
1120
1121 if (link_info->hash->creator != abfd->xvec)
1122 {
1123 (*_bfd_error_handler)
1124 (_("cannot handle R_MEM_INDIRECT reloc when using %s output"),
1125 link_info->hash->creator->name);
1126
1127 /* What else can we do? This function doesn't allow return
1128 of an error, and we don't want to call abort as that
1129 indicates an internal error. */
1130 #ifndef EXIT_FAILURE
1131 #define EXIT_FAILURE 1
1132 #endif
1133 xexit (EXIT_FAILURE);
1134 }
1135 htab = h8300_coff_hash_table (link_info);
1136 vectors_sec = htab->vectors_sec;
1137
1138 /* First see if this is a reloc against the absolute symbol
1139 or against a symbol with a nonnegative value <= 0xff. */
1140 symbol = *(reloc->sym_ptr_ptr);
1141 value = bfd_coff_reloc16_get_value (reloc, link_info, input_section);
1142 if (symbol == bfd_abs_section_ptr->symbol
1143 || value <= 0xff)
1144 {
1145 /* This should be handled in a manner very similar to
1146 R_RELBYTES. If the value is in range, then just slam
1147 the value into the right location. Else trigger a
1148 reloc overflow callback. */
1149 if (value <= 0xff)
1150 {
1151 bfd_put_8 (abfd, value, data + dst_address);
1152 dst_address += 1;
1153 src_address += 1;
1154 }
1155 else
1156 {
1157 if (! ((*link_info->callbacks->reloc_overflow)
1158 (link_info, bfd_asymbol_name (*reloc->sym_ptr_ptr),
1159 reloc->howto->name, reloc->addend, input_section->owner,
1160 input_section, reloc->address)))
1161 abort ();
1162 }
1163 break;
1164 }
1165
1166 /* This is a jump/call through a function vector, and we're
1167 expected to create the function vector ourselves.
1168
1169 First look up this symbol in the linker hash table -- we need
1170 the derived linker symbol which holds this symbol's index
1171 in the function vector. */
1172 name = symbol->name;
1173 if (symbol->flags & BSF_LOCAL)
1174 {
1175 char *new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1176
1177 if (new_name == NULL)
1178 abort ();
1179
1180 strcpy (new_name, name);
1181 sprintf (new_name + strlen (name), "_%08x",
1182 (int) symbol->section);
1183 name = new_name;
1184 }
1185
1186 ftab = htab->funcvec_hash_table;
1187 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1188
1189 /* This shouldn't ever happen. If it does that means we've got
1190 data corruption of some kind. Aborting seems like a reasonable
1191 thing to do here. */
1192 if (h == NULL || vectors_sec == NULL)
1193 abort ();
1194
1195 /* Place the address of the function vector entry into the
1196 reloc's address. */
1197 bfd_put_8 (abfd,
1198 vectors_sec->output_offset + h->offset,
1199 data + dst_address);
1200
1201 dst_address++;
1202 src_address++;
1203
1204 /* Now create an entry in the function vector itself. */
1205 switch (bfd_get_mach (input_section->owner))
1206 {
1207 case bfd_mach_h8300:
1208 case bfd_mach_h8300hn:
1209 case bfd_mach_h8300sn:
1210 bfd_put_16 (abfd,
1211 bfd_coff_reloc16_get_value (reloc,
1212 link_info,
1213 input_section),
1214 vectors_sec->contents + h->offset);
1215 break;
1216 case bfd_mach_h8300h:
1217 case bfd_mach_h8300s:
1218 bfd_put_32 (abfd,
1219 bfd_coff_reloc16_get_value (reloc,
1220 link_info,
1221 input_section),
1222 vectors_sec->contents + h->offset);
1223 break;
1224 default:
1225 abort ();
1226 }
1227
1228 /* Gross. We've already written the contents of the vector section
1229 before we get here... So we write it again with the new data. */
1230 bfd_set_section_contents (vectors_sec->output_section->owner,
1231 vectors_sec->output_section,
1232 vectors_sec->contents,
1233 (file_ptr) vectors_sec->output_offset,
1234 vectors_sec->_raw_size);
1235 break;
1236 }
1237
1238 default:
1239 abort ();
1240 break;
1241
1242 }
1243
1244 *src_ptr = src_address;
1245 *dst_ptr = dst_address;
1246 }
1247
1248 /* Routine for the h8300 linker.
1249
1250 This routine is necessary to handle the special R_MEM_INDIRECT
1251 relocs on the h8300. It's responsible for generating a vectors
1252 section and attaching it to an input bfd as well as sizing
1253 the vectors section. It also creates our vectors hash table.
1254
1255 It uses the generic linker routines to actually add the symbols.
1256 from this BFD to the bfd linker hash table. It may add a few
1257 selected static symbols to the bfd linker hash table. */
1258
1259 static bfd_boolean
h8300_bfd_link_add_symbols(bfd * abfd,struct bfd_link_info * info)1260 h8300_bfd_link_add_symbols (bfd *abfd, struct bfd_link_info *info)
1261 {
1262 asection *sec;
1263 struct funcvec_hash_table *funcvec_hash_table;
1264 bfd_size_type amt;
1265 struct h8300_coff_link_hash_table *htab;
1266
1267 /* Add the symbols using the generic code. */
1268 _bfd_generic_link_add_symbols (abfd, info);
1269
1270 if (info->hash->creator != abfd->xvec)
1271 return TRUE;
1272
1273 htab = h8300_coff_hash_table (info);
1274
1275 /* If we haven't created a vectors section, do so now. */
1276 if (!htab->vectors_sec)
1277 {
1278 flagword flags;
1279
1280 /* Make sure the appropriate flags are set, including SEC_IN_MEMORY. */
1281 flags = (SEC_ALLOC | SEC_LOAD
1282 | SEC_HAS_CONTENTS | SEC_IN_MEMORY | SEC_READONLY);
1283 htab->vectors_sec = bfd_make_section (abfd, ".vectors");
1284
1285 /* If the section wasn't created, or we couldn't set the flags,
1286 quit quickly now, rather than dying a painful death later. */
1287 if (!htab->vectors_sec
1288 || !bfd_set_section_flags (abfd, htab->vectors_sec, flags))
1289 return FALSE;
1290
1291 /* Also create the vector hash table. */
1292 amt = sizeof (struct funcvec_hash_table);
1293 funcvec_hash_table = (struct funcvec_hash_table *) bfd_alloc (abfd, amt);
1294
1295 if (!funcvec_hash_table)
1296 return FALSE;
1297
1298 /* And initialize the funcvec hash table. */
1299 if (!funcvec_hash_table_init (funcvec_hash_table, abfd,
1300 funcvec_hash_newfunc))
1301 {
1302 bfd_release (abfd, funcvec_hash_table);
1303 return FALSE;
1304 }
1305
1306 /* Store away a pointer to the funcvec hash table. */
1307 htab->funcvec_hash_table = funcvec_hash_table;
1308 }
1309
1310 /* Load up the function vector hash table. */
1311 funcvec_hash_table = htab->funcvec_hash_table;
1312
1313 /* Now scan the relocs for all the sections in this bfd; create
1314 additional space in the .vectors section as needed. */
1315 for (sec = abfd->sections; sec; sec = sec->next)
1316 {
1317 long reloc_size, reloc_count, i;
1318 asymbol **symbols;
1319 arelent **relocs;
1320
1321 /* Suck in the relocs, symbols & canonicalize them. */
1322 reloc_size = bfd_get_reloc_upper_bound (abfd, sec);
1323 if (reloc_size <= 0)
1324 continue;
1325
1326 relocs = (arelent **) bfd_malloc ((bfd_size_type) reloc_size);
1327 if (!relocs)
1328 return FALSE;
1329
1330 /* The symbols should have been read in by _bfd_generic link_add_symbols
1331 call abovec, so we can cheat and use the pointer to them that was
1332 saved in the above call. */
1333 symbols = _bfd_generic_link_get_symbols(abfd);
1334 reloc_count = bfd_canonicalize_reloc (abfd, sec, relocs, symbols);
1335 if (reloc_count <= 0)
1336 {
1337 free (relocs);
1338 continue;
1339 }
1340
1341 /* Now walk through all the relocations in this section. */
1342 for (i = 0; i < reloc_count; i++)
1343 {
1344 arelent *reloc = relocs[i];
1345 asymbol *symbol = *(reloc->sym_ptr_ptr);
1346 const char *name;
1347
1348 /* We've got an indirect reloc. See if we need to add it
1349 to the function vector table. At this point, we have
1350 to add a new entry for each unique symbol referenced
1351 by an R_MEM_INDIRECT relocation except for a reloc
1352 against the absolute section symbol. */
1353 if (reloc->howto->type == R_MEM_INDIRECT
1354 && symbol != bfd_abs_section_ptr->symbol)
1355
1356 {
1357 struct funcvec_hash_table *ftab;
1358 struct funcvec_hash_entry *h;
1359
1360 name = symbol->name;
1361 if (symbol->flags & BSF_LOCAL)
1362 {
1363 char *new_name;
1364
1365 new_name = bfd_malloc ((bfd_size_type) strlen (name) + 9);
1366 if (new_name == NULL)
1367 abort ();
1368
1369 strcpy (new_name, name);
1370 sprintf (new_name + strlen (name), "_%08x",
1371 (int) symbol->section);
1372 name = new_name;
1373 }
1374
1375 /* Look this symbol up in the function vector hash table. */
1376 ftab = htab->funcvec_hash_table;
1377 h = funcvec_hash_lookup (ftab, name, FALSE, FALSE);
1378
1379 /* If this symbol isn't already in the hash table, add
1380 it and bump up the size of the hash table. */
1381 if (h == NULL)
1382 {
1383 h = funcvec_hash_lookup (ftab, name, TRUE, TRUE);
1384 if (h == NULL)
1385 {
1386 free (relocs);
1387 return FALSE;
1388 }
1389
1390 /* Bump the size of the vectors section. Each vector
1391 takes 2 bytes on the h8300 and 4 bytes on the h8300h. */
1392 switch (bfd_get_mach (abfd))
1393 {
1394 case bfd_mach_h8300:
1395 case bfd_mach_h8300hn:
1396 case bfd_mach_h8300sn:
1397 htab->vectors_sec->_raw_size += 2;
1398 break;
1399 case bfd_mach_h8300h:
1400 case bfd_mach_h8300s:
1401 htab->vectors_sec->_raw_size += 4;
1402 break;
1403 default:
1404 abort ();
1405 }
1406 }
1407 }
1408 }
1409
1410 /* We're done with the relocations, release them. */
1411 free (relocs);
1412 }
1413
1414 /* Now actually allocate some space for the function vector. It's
1415 wasteful to do this more than once, but this is easier. */
1416 sec = htab->vectors_sec;
1417 if (sec->_raw_size != 0)
1418 {
1419 /* Free the old contents. */
1420 if (sec->contents)
1421 free (sec->contents);
1422
1423 /* Allocate new contents. */
1424 sec->contents = bfd_malloc (sec->_raw_size);
1425 }
1426
1427 return TRUE;
1428 }
1429
1430 #define coff_reloc16_extra_cases h8300_reloc16_extra_cases
1431 #define coff_reloc16_estimate h8300_reloc16_estimate
1432 #define coff_bfd_link_add_symbols h8300_bfd_link_add_symbols
1433 #define coff_bfd_link_hash_table_create h8300_coff_link_hash_table_create
1434
1435 #define COFF_LONG_FILENAMES
1436 #include "coffcode.h"
1437
1438 #undef coff_bfd_get_relocated_section_contents
1439 #undef coff_bfd_relax_section
1440 #define coff_bfd_get_relocated_section_contents \
1441 bfd_coff_reloc16_get_relocated_section_contents
1442 #define coff_bfd_relax_section bfd_coff_reloc16_relax_section
1443
1444 CREATE_BIG_COFF_TARGET_VEC (h8300coff_vec, "coff-h8300", BFD_IS_RELAXABLE, 0, '_', NULL, COFF_SWAP_TABLE)
1445