1 /* Definitions of target machine for GNU compiler. 2 Renesas H8/300 (generic) 3 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1996, 1997, 1998, 1999, 4 2000, 2001, 2002, 2003, 2004 Free Software Foundation, Inc. 5 Contributed by Steve Chamberlain (sac@cygnus.com), 6 Jim Wilson (wilson@cygnus.com), and Doug Evans (dje@cygnus.com). 7 8 This file is part of GCC. 9 10 GCC is free software; you can redistribute it and/or modify 11 it under the terms of the GNU General Public License as published by 12 the Free Software Foundation; either version 2, or (at your option) 13 any later version. 14 15 GCC is distributed in the hope that it will be useful, 16 but WITHOUT ANY WARRANTY; without even the implied warranty of 17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 18 GNU General Public License for more details. 19 20 You should have received a copy of the GNU General Public License 21 along with GCC; see the file COPYING. If not, write to 22 the Free Software Foundation, 59 Temple Place - Suite 330, 23 Boston, MA 02111-1307, USA. */ 24 25 #ifndef GCC_H8300_H 26 #define GCC_H8300_H 27 28 /* Which CPU to compile for. 29 We use int for CPU_TYPE to avoid lots of casts. */ 30 #if 0 /* defined in insn-attr.h, here for documentation */ 31 enum attr_cpu { CPU_H8300, CPU_H8300H }; 32 #endif 33 extern int cpu_type; 34 35 /* Various globals defined in h8300.c. */ 36 37 extern const char *h8_push_op, *h8_pop_op, *h8_mov_op; 38 extern const char * const *h8_reg_names; 39 40 /* Target CPU builtins. */ 41 #define TARGET_CPU_CPP_BUILTINS() \ 42 do \ 43 { \ 44 if (TARGET_H8300H) \ 45 { \ 46 builtin_define ("__H8300H__"); \ 47 builtin_assert ("cpu=h8300h"); \ 48 builtin_assert ("machine=h8300h"); \ 49 if (TARGET_NORMAL_MODE) \ 50 { \ 51 builtin_define ("__NORMAL_MODE__"); \ 52 } \ 53 } \ 54 else if (TARGET_H8300S) \ 55 { \ 56 builtin_define ("__H8300S__"); \ 57 builtin_assert ("cpu=h8300s"); \ 58 builtin_assert ("machine=h8300s"); \ 59 if (TARGET_NORMAL_MODE) \ 60 { \ 61 builtin_define ("__NORMAL_MODE__"); \ 62 } \ 63 } \ 64 else \ 65 { \ 66 builtin_define ("__H8300__"); \ 67 builtin_assert ("cpu=h8300"); \ 68 builtin_assert ("machine=h8300"); \ 69 } \ 70 } \ 71 while (0) 72 73 #define LINK_SPEC "%{mh:%{mn:-m h8300hn}} %{mh:%{!mn:-m h8300h}} %{ms:%{mn:-m h8300sn}} %{ms:%{!mn:-m h8300s}}" 74 75 #define LIB_SPEC "%{mrelax:-relax} %{g:-lg} %{!p:%{!pg:-lc}}%{p:-lc_p}%{pg:-lc_p}" 76 77 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) \ 78 do \ 79 { \ 80 /* Basic block reordering is only beneficial on targets with cache \ 81 and/or variable-cycle branches where (cycle count taken != \ 82 cycle count not taken). */ \ 83 flag_reorder_blocks = 0; \ 84 } \ 85 while (0) 86 87 /* Print subsidiary information on the compiler version in use. */ 88 89 #define TARGET_VERSION fprintf (stderr, " (Renesas H8/300)"); 90 91 /* Run-time compilation parameters selecting different hardware subsets. */ 92 93 extern int target_flags; 94 95 /* Masks for the -m switches. */ 96 #define MASK_H8300S 0x00000001 97 #define MASK_MAC 0x00000002 98 #define MASK_INT32 0x00000008 99 #define MASK_ADDRESSES 0x00000040 100 #define MASK_QUICKCALL 0x00000080 101 #define MASK_SLOWBYTE 0x00000100 102 #define MASK_NORMAL_MODE 0x00000200 103 #define MASK_RELAX 0x00000400 104 #define MASK_H8300H 0x00001000 105 #define MASK_ALIGN_300 0x00002000 106 107 /* Macros used in the machine description to test the flags. */ 108 109 /* Make int's 32 bits. */ 110 #define TARGET_INT32 (target_flags & MASK_INT32) 111 112 /* Dump recorded insn lengths into the output file. This helps debug the 113 md file. */ 114 #define TARGET_ADDRESSES (target_flags & MASK_ADDRESSES) 115 116 /* Pass the first few arguments in registers. */ 117 #define TARGET_QUICKCALL (target_flags & MASK_QUICKCALL) 118 119 /* Pretend byte accesses are slow. */ 120 #define TARGET_SLOWBYTE (target_flags & MASK_SLOWBYTE) 121 122 /* Select between the H8/300 and H8/300H CPUs. */ 123 #define TARGET_H8300 (! TARGET_H8300H && ! TARGET_H8300S) 124 #define TARGET_H8300H (target_flags & MASK_H8300H) 125 #define TARGET_H8300S (target_flags & MASK_H8300S) 126 #define TARGET_NORMAL_MODE (target_flags & MASK_NORMAL_MODE) 127 128 /* mac register and relevant instructions are available. */ 129 #define TARGET_MAC (target_flags & MASK_MAC) 130 131 /* Align all values on the H8/300H the same way as the H8/300. Specifically, 132 32 bit and larger values are aligned on 16 bit boundaries. 133 This is all the hardware requires, but the default is 32 bits for the H8/300H. 134 ??? Now watch someone add hardware floating point requiring 32 bit 135 alignment. */ 136 #define TARGET_ALIGN_300 (target_flags & MASK_ALIGN_300) 137 138 /* Macro to define tables used to set the flags. 139 This is a list in braces of pairs in braces, 140 each pair being { "NAME", VALUE } 141 where VALUE is the bits to set or minus the bits to clear. 142 An empty string NAME is used to identify the default VALUE. */ 143 144 #define TARGET_SWITCHES \ 145 { {"s", MASK_H8300S, N_("Generate H8S code")}, \ 146 {"no-s", -MASK_H8300S, N_("Do not generate H8S code")}, \ 147 {"s2600", MASK_MAC, N_("Generate H8S/2600 code")}, \ 148 {"no-s2600", -MASK_MAC, N_("Do not generate H8S/2600 code")}, \ 149 {"int32", MASK_INT32, N_("Make integers 32 bits wide")}, \ 150 {"addresses", MASK_ADDRESSES, NULL}, \ 151 {"quickcall", MASK_QUICKCALL, \ 152 N_("Use registers for argument passing")}, \ 153 {"no-quickcall", -MASK_QUICKCALL, \ 154 N_("Do not use registers for argument passing")}, \ 155 {"slowbyte", MASK_SLOWBYTE, \ 156 N_("Consider access to byte sized memory slow")}, \ 157 {"relax", MASK_RELAX, N_("Enable linker relaxing")}, \ 158 {"h", MASK_H8300H, N_("Generate H8/300H code")}, \ 159 {"n", MASK_NORMAL_MODE, N_("Enable the normal mode")}, \ 160 {"no-h", -MASK_H8300H, N_("Do not generate H8/300H code")}, \ 161 {"align-300", MASK_ALIGN_300, N_("Use H8/300 alignment rules")}, \ 162 { "", TARGET_DEFAULT, NULL}} 163 164 #ifdef IN_LIBGCC2 165 #undef TARGET_H8300H 166 #undef TARGET_H8300S 167 #undef TARGET_NORMAL_MODE 168 /* If compiling libgcc2, make these compile time constants based on what 169 flags are we actually compiling with. */ 170 #ifdef __H8300H__ 171 #define TARGET_H8300H 1 172 #else 173 #define TARGET_H8300H 0 174 #endif 175 #ifdef __H8300S__ 176 #define TARGET_H8300S 1 177 #else 178 #define TARGET_H8300S 0 179 #endif 180 #ifdef __NORMAL_MODE__ 181 #define TARGET_NORMAL_MODE 1 182 #else 183 #define TARGET_NORMAL_MODE 0 184 #endif 185 #endif /* !IN_LIBGCC2 */ 186 187 /* Do things that must be done once at start up. */ 188 189 #define OVERRIDE_OPTIONS \ 190 do \ 191 { \ 192 h8300_init_once (); \ 193 } \ 194 while (0) 195 196 /* Default target_flags if no switches specified. */ 197 198 #ifndef TARGET_DEFAULT 199 #define TARGET_DEFAULT (MASK_QUICKCALL) 200 #endif 201 202 /* Show we can debug even without a frame pointer. */ 203 /* #define CAN_DEBUG_WITHOUT_FP */ 204 205 /* Define this if addresses of constant functions 206 shouldn't be put through pseudo regs where they can be cse'd. 207 Desirable on machines where ordinary constants are expensive 208 but a CALL with constant address is cheap. 209 210 Calls through a register are cheaper than calls to named 211 functions; however, the register pressure this causes makes 212 CSEing of function addresses generally a lose. */ 213 #define NO_FUNCTION_CSE 214 215 /* Target machine storage layout */ 216 217 /* Define this if most significant bit is lowest numbered 218 in instructions that operate on numbered bit-fields. 219 This is not true on the H8/300. */ 220 #define BITS_BIG_ENDIAN 0 221 222 /* Define this if most significant byte of a word is the lowest numbered. */ 223 /* That is true on the H8/300. */ 224 #define BYTES_BIG_ENDIAN 1 225 226 /* Define this if most significant word of a multiword number is lowest 227 numbered. */ 228 #define WORDS_BIG_ENDIAN 1 229 230 #define MAX_BITS_PER_WORD 32 231 232 /* Width of a word, in units (bytes). */ 233 #define UNITS_PER_WORD (TARGET_H8300H || TARGET_H8300S ? 4 : 2) 234 #define MIN_UNITS_PER_WORD 2 235 236 #define SHORT_TYPE_SIZE 16 237 #define INT_TYPE_SIZE (TARGET_INT32 ? 32 : 16) 238 #define LONG_TYPE_SIZE 32 239 #define LONG_LONG_TYPE_SIZE 64 240 #define FLOAT_TYPE_SIZE 32 241 #define DOUBLE_TYPE_SIZE 32 242 #define LONG_DOUBLE_TYPE_SIZE DOUBLE_TYPE_SIZE 243 244 #define MAX_FIXED_MODE_SIZE 32 245 246 /* Allocation boundary (in *bits*) for storing arguments in argument list. */ 247 #define PARM_BOUNDARY (TARGET_H8300H || TARGET_H8300S ? 32 : 16) 248 249 /* Allocation boundary (in *bits*) for the code of a function. */ 250 #define FUNCTION_BOUNDARY 16 251 252 /* Alignment of field after `int : 0' in a structure. */ 253 /* One can argue this should be 32 for -mint32, but since 32 bit ints only 254 need 16 bit alignment, this is left as is so that -mint32 doesn't change 255 structure layouts. */ 256 #define EMPTY_FIELD_BOUNDARY 16 257 258 /* No data type wants to be aligned rounder than this. 259 32 bit values are aligned as such on the H8/300H and H8S for speed. */ 260 #define BIGGEST_ALIGNMENT \ 261 (((TARGET_H8300H || TARGET_H8300S) && ! TARGET_ALIGN_300) ? 32 : 16) 262 263 /* The stack goes in 16/32 bit lumps. */ 264 #define STACK_BOUNDARY (TARGET_H8300 ? 16 : 32) 265 266 /* Define this if move instructions will actually fail to work 267 when given unaligned data. */ 268 /* On the H8/300, longs can be aligned on halfword boundaries, but not 269 byte boundaries. */ 270 #define STRICT_ALIGNMENT 1 271 272 /* Standard register usage. */ 273 274 /* Number of actual hardware registers. 275 The hardware registers are assigned numbers for the compiler 276 from 0 to just below FIRST_PSEUDO_REGISTER. 277 278 All registers that the compiler knows about must be given numbers, 279 even those that are not normally considered general registers. 280 281 Reg 9 does not correspond to any hardware register, but instead 282 appears in the RTL as an argument pointer prior to reload, and is 283 eliminated during reloading in favor of either the stack or frame 284 pointer. */ 285 286 #define FIRST_PSEUDO_REGISTER 11 287 288 /* 1 for registers that have pervasive standard uses 289 and are not available for the register allocator. */ 290 291 #define FIXED_REGISTERS \ 292 { 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1} 293 294 /* 1 for registers not available across function calls. 295 These must include the FIXED_REGISTERS and also any 296 registers that can be used without being saved. 297 The latter must include the registers where values are returned 298 and the register where structure-value addresses are passed. 299 Aside from that, you can include as many other registers as you 300 like. 301 302 H8 destroys r0,r1,r2,r3. */ 303 304 #define CALL_USED_REGISTERS \ 305 { 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1 } 306 307 #define REG_ALLOC_ORDER \ 308 { 2, 3, 0, 1, 4, 5, 6, 8, 7, 9, 10} 309 310 #define CONDITIONAL_REGISTER_USAGE \ 311 { \ 312 if (!TARGET_MAC) \ 313 fixed_regs[MAC_REG] = call_used_regs[MAC_REG] = 1; \ 314 } 315 316 /* Return number of consecutive hard regs needed starting at reg REGNO 317 to hold something of mode MODE. 318 319 This is ordinarily the length in words of a value of mode MODE 320 but can be less for certain modes in special long registers. 321 322 We pretend the MAC register is 32bits -- we don't have any data 323 types on the H8 series to handle more than 32bits. */ 324 325 #define HARD_REGNO_NREGS(REGNO, MODE) \ 326 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 327 328 /* Value is 1 if hard register REGNO can hold a value of machine-mode 329 MODE. 330 331 H8/300: If an even reg, then anything goes. Otherwise the mode must be QI 332 or HI. 333 H8/300H: Anything goes. */ 334 335 #define HARD_REGNO_MODE_OK(REGNO, MODE) \ 336 (TARGET_H8300 \ 337 ? ((((REGNO) & 1) == 0) || ((MODE) == HImode) || ((MODE) == QImode)) \ 338 : (REGNO) == MAC_REG ? (MODE) == SImode : 1) 339 340 /* Value is 1 if it is a good idea to tie two pseudo registers 341 when one has mode MODE1 and one has mode MODE2. 342 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2, 343 for any hard reg, then this must be 0 for correct output. */ 344 #define MODES_TIEABLE_P(MODE1, MODE2) \ 345 ((MODE1) == (MODE2) \ 346 || (((MODE1) == QImode || (MODE1) == HImode \ 347 || ((TARGET_H8300H || TARGET_H8300S) && (MODE1) == SImode)) \ 348 && ((MODE2) == QImode || (MODE2) == HImode \ 349 || ((TARGET_H8300H || TARGET_H8300S) && (MODE2) == SImode)))) 350 351 /* A C expression that is nonzero if hard register NEW_REG can be 352 considered for use as a rename register for OLD_REG register */ 353 354 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \ 355 h8300_hard_regno_rename_ok (OLD_REG, NEW_REG) 356 357 /* Specify the registers used for certain standard purposes. 358 The values of these macros are register numbers. */ 359 360 /* H8/300 pc is not overloaded on a register. */ 361 362 /*#define PC_REGNUM 15*/ 363 364 /* Register to use for pushing function arguments. */ 365 #define STACK_POINTER_REGNUM SP_REG 366 367 /* Base register for access to local variables of the function. */ 368 #define FRAME_POINTER_REGNUM FP_REG 369 370 /* Value should be nonzero if functions must have frame pointers. 371 Zero means the frame pointer need not be set up (and parms 372 may be accessed via the stack pointer) in functions that seem suitable. 373 This is computed in `reload', in reload1.c. */ 374 #define FRAME_POINTER_REQUIRED 0 375 376 /* Base register for access to arguments of the function. */ 377 #define ARG_POINTER_REGNUM AP_REG 378 379 /* Register in which static-chain is passed to a function. */ 380 #define STATIC_CHAIN_REGNUM SC_REG 381 382 /* Fake register that holds the address on the stack of the 383 current function's return address. */ 384 #define RETURN_ADDRESS_POINTER_REGNUM RAP_REG 385 386 /* A C expression whose value is RTL representing the value of the return 387 address for the frame COUNT steps up from the current frame. 388 FRAMEADDR is already the frame pointer of the COUNT frame, assuming 389 a stack layout with the frame pointer as the first saved register. */ 390 #define RETURN_ADDR_RTX(COUNT, FRAME) h8300_return_addr_rtx ((COUNT), (FRAME)) 391 392 /* Define the classes of registers for register constraints in the 393 machine description. Also define ranges of constants. 394 395 One of the classes must always be named ALL_REGS and include all hard regs. 396 If there is more than one class, another class must be named NO_REGS 397 and contain no registers. 398 399 The name GENERAL_REGS must be the name of a class (or an alias for 400 another name such as ALL_REGS). This is the class of registers 401 that is allowed by "g" or "r" in a register constraint. 402 Also, registers outside this class are allocated only when 403 instructions express preferences for them. 404 405 The classes must be numbered in nondecreasing order; that is, 406 a larger-numbered class must never be contained completely 407 in a smaller-numbered class. 408 409 For any two classes, it is very desirable that there be another 410 class that represents their union. */ 411 412 enum reg_class { 413 NO_REGS, GENERAL_REGS, MAC_REGS, ALL_REGS, LIM_REG_CLASSES 414 }; 415 416 #define N_REG_CLASSES ((int) LIM_REG_CLASSES) 417 418 /* Give names of register classes as strings for dump file. */ 419 420 #define REG_CLASS_NAMES \ 421 { "NO_REGS", "GENERAL_REGS", "MAC_REGS", "ALL_REGS", "LIM_REGS" } 422 423 /* Define which registers fit in which classes. 424 This is an initializer for a vector of HARD_REG_SET 425 of length N_REG_CLASSES. */ 426 427 #define REG_CLASS_CONTENTS \ 428 { {0}, /* No regs */ \ 429 {0x6ff}, /* GENERAL_REGS */ \ 430 {0x100}, /* MAC_REGS */ \ 431 {0x7ff}, /* ALL_REGS */ \ 432 } 433 434 /* The same information, inverted: 435 Return the class number of the smallest class containing 436 reg number REGNO. This could be a conditional expression 437 or could index an array. */ 438 439 #define REGNO_REG_CLASS(REGNO) (REGNO != MAC_REG ? GENERAL_REGS : MAC_REGS) 440 441 /* The class value for index registers, and the one for base regs. */ 442 443 #define INDEX_REG_CLASS NO_REGS 444 #define BASE_REG_CLASS GENERAL_REGS 445 446 /* Get reg_class from a letter such as appears in the machine description. 447 448 'a' is the MAC register. */ 449 450 #define REG_CLASS_FROM_LETTER(C) ((C) == 'a' ? MAC_REGS : NO_REGS) 451 452 /* The letters I, J, K, L, M, N, O, P in a register constraint string 453 can be used to stand for particular ranges of immediate operands. 454 This macro defines what the ranges are. 455 C is the letter, and VALUE is a constant value. 456 Return 1 if VALUE is in the range specified by C. */ 457 458 #define CONST_OK_FOR_I(VALUE) ((VALUE) == 0) 459 #define CONST_OK_FOR_J(VALUE) (((VALUE) & 0xff) == 0) 460 #define CONST_OK_FOR_L(VALUE) \ 461 (TARGET_H8300H || TARGET_H8300S \ 462 ? (VALUE) == 1 || (VALUE) == 2 || (VALUE) == 4 \ 463 : (VALUE) == 1 || (VALUE) == 2) 464 #define CONST_OK_FOR_M(VALUE) \ 465 ((VALUE) == 1 || (VALUE) == 2) 466 #define CONST_OK_FOR_N(VALUE) \ 467 (TARGET_H8300H || TARGET_H8300S \ 468 ? (VALUE) == -1 || (VALUE) == -2 || (VALUE) == -4 \ 469 : (VALUE) == -1 || (VALUE) == -2) 470 #define CONST_OK_FOR_O(VALUE) \ 471 ((VALUE) == -1 || (VALUE) == -2) 472 473 #define CONST_OK_FOR_LETTER_P(VALUE, C) \ 474 ((C) == 'I' ? CONST_OK_FOR_I (VALUE) : \ 475 (C) == 'J' ? CONST_OK_FOR_J (VALUE) : \ 476 (C) == 'L' ? CONST_OK_FOR_L (VALUE) : \ 477 (C) == 'M' ? CONST_OK_FOR_M (VALUE) : \ 478 (C) == 'N' ? CONST_OK_FOR_N (VALUE) : \ 479 (C) == 'O' ? CONST_OK_FOR_O (VALUE) : \ 480 0) 481 482 /* Similar, but for floating constants, and defining letters G and H. 483 Here VALUE is the CONST_DOUBLE rtx itself. 484 485 `G' is a floating-point zero. */ 486 487 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \ 488 ((C) == 'G' ? (VALUE) == CONST0_RTX (SFmode) \ 489 : 0) 490 491 /* Given an rtx X being reloaded into a reg required to be 492 in class CLASS, return the class of reg to actually use. 493 In general this is just CLASS; but on some machines 494 in some cases it is preferable to use a more restrictive class. */ 495 496 #define PREFERRED_RELOAD_CLASS(X, CLASS) (CLASS) 497 498 /* Return the maximum number of consecutive registers 499 needed to represent mode MODE in a register of class CLASS. */ 500 501 /* On the H8, this is the size of MODE in words. */ 502 503 #define CLASS_MAX_NREGS(CLASS, MODE) \ 504 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD) 505 506 /* Any SI register-to-register move may need to be reloaded, 507 so define REGISTER_MOVE_COST to be > 2 so that reload never 508 shortcuts. */ 509 510 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \ 511 (CLASS1 == MAC_REGS || CLASS2 == MAC_REGS ? 6 : 3) 512 513 /* Stack layout; function entry, exit and calling. */ 514 515 /* Define this if pushing a word on the stack 516 makes the stack pointer a smaller address. */ 517 518 #define STACK_GROWS_DOWNWARD 519 520 /* Define this if the nominal address of the stack frame 521 is at the high-address end of the local variables; 522 that is, each additional local variable allocated 523 goes at a more negative offset in the frame. */ 524 525 #define FRAME_GROWS_DOWNWARD 526 527 /* Offset within stack frame to start allocating local variables at. 528 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the 529 first local allocated. Otherwise, it is the offset to the BEGINNING 530 of the first local allocated. */ 531 532 #define STARTING_FRAME_OFFSET 0 533 534 /* If we generate an insn to push BYTES bytes, 535 this says how many the stack pointer really advances by. 536 537 On the H8/300, @-sp really pushes a byte if you ask it to - but that's 538 dangerous, so we claim that it always pushes a word, then we catch 539 the mov.b rx,@-sp and turn it into a mov.w rx,@-sp on output. 540 541 On the H8/300H, we simplify TARGET_QUICKCALL by setting this to 4 542 and doing a similar thing. */ 543 544 #define PUSH_ROUNDING(BYTES) \ 545 (((BYTES) + PARM_BOUNDARY / 8 - 1) & -PARM_BOUNDARY / 8) 546 547 /* Offset of first parameter from the argument pointer register value. */ 548 /* Is equal to the size of the saved fp + pc, even if an fp isn't 549 saved since the value is used before we know. */ 550 551 #define FIRST_PARM_OFFSET(FNDECL) 0 552 553 /* Value is the number of bytes of arguments automatically 554 popped when returning from a subroutine call. 555 FUNDECL is the declaration node of the function (as a tree), 556 FUNTYPE is the data type of the function (as a tree), 557 or for a library call it is an identifier node for the subroutine name. 558 SIZE is the number of bytes of arguments passed on the stack. 559 560 On the H8 the return does not pop anything. */ 561 562 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0 563 564 /* Definitions for register eliminations. 565 566 This is an array of structures. Each structure initializes one pair 567 of eliminable registers. The "from" register number is given first, 568 followed by "to". Eliminations of the same "from" register are listed 569 in order of preference. 570 571 We have three registers that can be eliminated on the h8300. 572 First, the frame pointer register can often be eliminated in favor 573 of the stack pointer register. Secondly, the argument pointer 574 register and the return address pointer register are always 575 eliminated; they are replaced with either the stack or frame 576 pointer. */ 577 578 #define ELIMINABLE_REGS \ 579 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \ 580 { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \ 581 { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},\ 582 { RETURN_ADDRESS_POINTER_REGNUM, FRAME_POINTER_REGNUM},\ 583 { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}} 584 585 /* Given FROM and TO register numbers, say whether this elimination is allowed. 586 Frame pointer elimination is automatically handled. 587 588 For the h8300, if frame pointer elimination is being done, we would like to 589 convert ap and rp into sp, not fp. 590 591 All other eliminations are valid. */ 592 593 #define CAN_ELIMINATE(FROM, TO) \ 594 ((TO) == STACK_POINTER_REGNUM ? ! frame_pointer_needed : 1) 595 596 /* Define the offset between two registers, one to be eliminated, and the other 597 its replacement, at the start of a routine. */ 598 599 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \ 600 ((OFFSET) = h8300_initial_elimination_offset ((FROM), (TO))) 601 602 /* Define how to find the value returned by a function. 603 VALTYPE is the data type of the value (as a tree). 604 If the precise function being called is known, FUNC is its FUNCTION_DECL; 605 otherwise, FUNC is 0. 606 607 On the H8 the return value is in R0/R1. */ 608 609 #define FUNCTION_VALUE(VALTYPE, FUNC) \ 610 gen_rtx_REG (TYPE_MODE (VALTYPE), R0_REG) 611 612 /* Define how to find the value returned by a library function 613 assuming the value has mode MODE. */ 614 615 /* On the H8 the return value is in R0/R1. */ 616 617 #define LIBCALL_VALUE(MODE) \ 618 gen_rtx_REG (MODE, R0_REG) 619 620 /* 1 if N is a possible register number for a function value. 621 On the H8, R0 is the only register thus used. */ 622 623 #define FUNCTION_VALUE_REGNO_P(N) ((N) == R0_REG) 624 625 /* Define this if PCC uses the nonreentrant convention for returning 626 structure and union values. */ 627 628 /*#define PCC_STATIC_STRUCT_RETURN*/ 629 630 /* 1 if N is a possible register number for function argument passing. 631 On the H8, no registers are used in this way. */ 632 633 #define FUNCTION_ARG_REGNO_P(N) (TARGET_QUICKCALL ? N < 3 : 0) 634 635 /* When defined, the compiler allows registers explicitly used in the 636 rtl to be used as spill registers but prevents the compiler from 637 extending the lifetime of these registers. */ 638 639 #define SMALL_REGISTER_CLASSES 1 640 641 /* Define a data type for recording info about an argument list 642 during the scan of that argument list. This data type should 643 hold all necessary information about the function itself 644 and about the args processed so far, enough to enable macros 645 such as FUNCTION_ARG to determine where the next arg should go. 646 647 On the H8/300, this is a two item struct, the first is the number 648 of bytes scanned so far and the second is the rtx of the called 649 library function if any. */ 650 651 #define CUMULATIVE_ARGS struct cum_arg 652 struct cum_arg 653 { 654 int nbytes; 655 struct rtx_def *libcall; 656 }; 657 658 /* Initialize a variable CUM of type CUMULATIVE_ARGS 659 for a call to a function whose data type is FNTYPE. 660 For a library call, FNTYPE is 0. 661 662 On the H8/300, the offset starts at 0. */ 663 664 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \ 665 ((CUM).nbytes = 0, (CUM).libcall = LIBNAME) 666 667 /* Update the data in CUM to advance over an argument 668 of mode MODE and data type TYPE. 669 (TYPE is null for libcalls where that information may not be available.) */ 670 671 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \ 672 ((CUM).nbytes += ((MODE) != BLKmode \ 673 ? (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD \ 674 : (int_size_in_bytes (TYPE) + UNITS_PER_WORD - 1) & -UNITS_PER_WORD)) 675 676 /* Define where to put the arguments to a function. 677 Value is zero to push the argument on the stack, 678 or a hard register in which to store the argument. 679 680 MODE is the argument's machine mode. 681 TYPE is the data type of the argument (as a tree). 682 This is null for libcalls where that information may 683 not be available. 684 CUM is a variable of type CUMULATIVE_ARGS which gives info about 685 the preceding args and about the function being called. 686 NAMED is nonzero if this argument is a named parameter 687 (otherwise it is an extra parameter matching an ellipsis). */ 688 689 /* On the H8/300 all normal args are pushed, unless -mquickcall in which 690 case the first 3 arguments are passed in registers. 691 See function `function_arg'. */ 692 693 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \ 694 function_arg (&CUM, MODE, TYPE, NAMED) 695 696 /* Output assembler code to FILE to increment profiler label # LABELNO 697 for profiling a function entry. */ 698 699 #define FUNCTION_PROFILER(FILE, LABELNO) \ 700 fprintf (FILE, "\t%s\t#LP%d,%s\n\tjsr @mcount\n", \ 701 h8_mov_op, (LABELNO), h8_reg_names[0]); 702 703 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function, 704 the stack pointer does not matter. The value is tested only in 705 functions that have frame pointers. 706 No definition is equivalent to always zero. */ 707 708 #define EXIT_IGNORE_STACK 0 709 710 /* We emit the entire trampoline with INITIALIZE_TRAMPOLINE. 711 Depending on the pointer size, we use a different trampoline. 712 713 Pmode == HImode 714 vvvv context 715 1 0000 7903xxxx mov.w #0x1234,r3 716 2 0004 5A00xxxx jmp @0x1234 717 ^^^^ function 718 719 Pmode == SImode 720 vvvvvvvv context 721 2 0000 7A03xxxxxxxx mov.l #0x12345678,er3 722 3 0006 5Axxxxxx jmp @0x123456 723 ^^^^^^ function 724 */ 725 726 /* Length in units of the trampoline for entering a nested function. */ 727 728 #define TRAMPOLINE_SIZE ((Pmode == HImode) ? 8 : 12) 729 730 /* Emit RTL insns to build a trampoline. 731 FNADDR is an RTX for the address of the function's pure code. 732 CXT is an RTX for the static chain value for the function. */ 733 734 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \ 735 do \ 736 { \ 737 if (Pmode == HImode) \ 738 { \ 739 emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7903)); \ 740 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \ 741 (CXT)); \ 742 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 4)), \ 743 GEN_INT (0x5a00)); \ 744 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \ 745 (FNADDR)); \ 746 } \ 747 else \ 748 { \ 749 rtx tem = gen_reg_rtx (Pmode); \ 750 \ 751 emit_move_insn (gen_rtx_MEM (HImode, (TRAMP)), GEN_INT (0x7a03)); \ 752 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 2)), \ 753 (CXT)); \ 754 emit_move_insn (tem, (FNADDR)); \ 755 emit_insn (gen_andsi3 (tem, tem, GEN_INT (0x00ffffff))); \ 756 emit_insn (gen_iorsi3 (tem, tem, GEN_INT (0x5a000000))); \ 757 emit_move_insn (gen_rtx_MEM (Pmode, plus_constant ((TRAMP), 6)), \ 758 tem); \ 759 } \ 760 } \ 761 while (0) 762 763 /* Addressing modes, and classification of registers for them. */ 764 765 #define HAVE_POST_INCREMENT 1 766 #define HAVE_PRE_DECREMENT 1 767 768 /* Macros to check register numbers against specific register classes. */ 769 770 /* These assume that REGNO is a hard or pseudo reg number. 771 They give nonzero only if REGNO is a hard reg of the suitable class 772 or a pseudo reg currently allocated to a suitable hard reg. 773 Since they use reg_renumber, they are safe only once reg_renumber 774 has been allocated, which happens in local-alloc.c. */ 775 776 #define REGNO_OK_FOR_INDEX_P(regno) 0 777 778 #define REGNO_OK_FOR_BASE_P(regno) \ 779 (((regno) < FIRST_PSEUDO_REGISTER && regno != MAC_REG) \ 780 || reg_renumber[regno] >= 0) 781 782 /* Maximum number of registers that can appear in a valid memory address. */ 783 784 #define MAX_REGS_PER_ADDRESS 1 785 786 /* 1 if X is an rtx for a constant that is a valid address. */ 787 788 #define CONSTANT_ADDRESS_P(X) \ 789 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \ 790 || (GET_CODE (X) == CONST_INT \ 791 /* We handle signed and unsigned offsets here. */ \ 792 && INTVAL (X) > (TARGET_H8300 ? -0x10000 : -0x1000000) \ 793 && INTVAL (X) < (TARGET_H8300 ? 0x10000 : 0x1000000)) \ 794 || (GET_CODE (X) == HIGH || GET_CODE (X) == CONST)) 795 796 /* Nonzero if the constant value X is a legitimate general operand. 797 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */ 798 799 #define LEGITIMATE_CONSTANT_P(X) (1) 800 801 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx 802 and check its validity for a certain class. 803 We have two alternate definitions for each of them. 804 The usual definition accepts all pseudo regs; the other rejects 805 them unless they have been allocated suitable hard regs. 806 The symbol REG_OK_STRICT causes the latter definition to be used. 807 808 Most source files want to accept pseudo regs in the hope that 809 they will get allocated to the class that the insn wants them to be in. 810 Source files for reload pass need to be strict. 811 After reload, it makes no difference, since pseudo regs have 812 been eliminated by then. */ 813 814 #ifndef REG_OK_STRICT 815 816 /* Nonzero if X is a hard reg that can be used as an index 817 or if it is a pseudo reg. */ 818 #define REG_OK_FOR_INDEX_P(X) 0 819 /* Nonzero if X is a hard reg that can be used as a base reg 820 or if it is a pseudo reg. */ 821 /* Don't use REGNO_OK_FOR_BASE_P here because it uses reg_renumber. */ 822 #define REG_OK_FOR_BASE_P(X) \ 823 (REGNO (X) >= FIRST_PSEUDO_REGISTER || REGNO (X) != 8) 824 #define REG_OK_FOR_INDEX_P_STRICT(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 825 #define REG_OK_FOR_BASE_P_STRICT(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 826 #define STRICT 0 827 828 #else 829 830 /* Nonzero if X is a hard reg that can be used as an index. */ 831 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X)) 832 /* Nonzero if X is a hard reg that can be used as a base reg. */ 833 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X)) 834 #define STRICT 1 835 836 #endif 837 838 /* Extra constraints. */ 839 840 #define OK_FOR_R(OP) \ 841 (GET_CODE (OP) == CONST_INT \ 842 ? !h8300_shift_needs_scratch_p (INTVAL (OP), QImode) \ 843 : 0) 844 845 #define OK_FOR_S(OP) \ 846 (GET_CODE (OP) == CONST_INT \ 847 ? !h8300_shift_needs_scratch_p (INTVAL (OP), HImode) \ 848 : 0) 849 850 #define OK_FOR_T(OP) \ 851 (GET_CODE (OP) == CONST_INT \ 852 ? !h8300_shift_needs_scratch_p (INTVAL (OP), SImode) \ 853 : 0) 854 855 /* 'U' if valid for a bset destination; 856 i.e. a register, register indirect, or the eightbit memory region 857 (a SYMBOL_REF with an SYMBOL_REF_FLAG set). 858 859 On the H8S 'U' can also be a 16bit or 32bit absolute. */ 860 #define OK_FOR_U(OP) \ 861 ((GET_CODE (OP) == REG && REG_OK_FOR_BASE_P (OP)) \ 862 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == REG \ 863 && REG_OK_FOR_BASE_P (XEXP (OP, 0))) \ 864 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == SYMBOL_REF \ 865 && TARGET_H8300S) \ 866 || (GET_CODE (OP) == MEM && GET_CODE (XEXP (OP, 0)) == CONST \ 867 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == PLUS \ 868 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 0)) == SYMBOL_REF \ 869 && GET_CODE (XEXP (XEXP (XEXP (OP, 0), 0), 1)) == CONST_INT \ 870 && (TARGET_H8300S \ 871 || SYMBOL_REF_FLAG (XEXP (XEXP (XEXP (OP, 0), 0), 0)))) \ 872 || (GET_CODE (OP) == MEM \ 873 && h8300_eightbit_constant_address_p (XEXP (OP, 0))) \ 874 || (GET_CODE (OP) == MEM && TARGET_H8300S \ 875 && GET_CODE (XEXP (OP, 0)) == CONST_INT)) 876 877 #define EXTRA_CONSTRAINT(OP, C) \ 878 ((C) == 'R' ? OK_FOR_R (OP) : \ 879 (C) == 'S' ? OK_FOR_S (OP) : \ 880 (C) == 'T' ? OK_FOR_T (OP) : \ 881 (C) == 'U' ? OK_FOR_U (OP) : \ 882 0) 883 884 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression 885 that is a valid memory address for an instruction. 886 The MODE argument is the machine mode for the MEM expression 887 that wants to use this address. 888 889 The other macros defined here are used only in GO_IF_LEGITIMATE_ADDRESS, 890 except for CONSTANT_ADDRESS_P which is actually 891 machine-independent. 892 893 On the H8/300, a legitimate address has the form 894 REG, REG+CONSTANT_ADDRESS or CONSTANT_ADDRESS. */ 895 896 /* Accept either REG or SUBREG where a register is valid. */ 897 898 #define RTX_OK_FOR_BASE_P(X) \ 899 ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \ 900 || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X)) \ 901 && REG_OK_FOR_BASE_P (SUBREG_REG (X)))) 902 903 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \ 904 if (RTX_OK_FOR_BASE_P (X)) goto ADDR; \ 905 if (CONSTANT_ADDRESS_P (X)) goto ADDR; \ 906 if (GET_CODE (X) == PLUS \ 907 && CONSTANT_ADDRESS_P (XEXP (X, 1)) \ 908 && RTX_OK_FOR_BASE_P (XEXP (X, 0))) goto ADDR; 909 910 /* Try machine-dependent ways of modifying an illegitimate address 911 to be legitimate. If we find one, return the new, valid address. 912 This macro is used in only one place: `memory_address' in explow.c. 913 914 OLDX is the address as it was before break_out_memory_refs was called. 915 In some cases it is useful to look at this to decide what needs to be done. 916 917 MODE and WIN are passed so that this macro can use 918 GO_IF_LEGITIMATE_ADDRESS. 919 920 It is always safe for this macro to do nothing. It exists to recognize 921 opportunities to optimize the output. 922 923 For the H8/300, don't do anything. */ 924 925 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) {} 926 927 /* Go to LABEL if ADDR (a legitimate address expression) 928 has an effect that depends on the machine mode it is used for. 929 930 On the H8/300, the predecrement and postincrement address depend thus 931 (the amount of decrement or increment being the length of the operand). */ 932 933 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \ 934 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == PRE_DEC) goto LABEL; 935 936 /* Specify the machine mode that this machine uses 937 for the index in the tablejump instruction. */ 938 #define CASE_VECTOR_MODE Pmode 939 940 /* Define as C expression which evaluates to nonzero if the tablejump 941 instruction expects the table to contain offsets from the address of the 942 table. 943 Do not define this if the table should contain absolute addresses. */ 944 /*#define CASE_VECTOR_PC_RELATIVE 1 */ 945 946 /* Define this as 1 if `char' should by default be signed; else as 0. 947 948 On the H8/300, sign extension is expensive, so we'll say that chars 949 are unsigned. */ 950 #define DEFAULT_SIGNED_CHAR 0 951 952 /* This flag, if defined, says the same insns that convert to a signed fixnum 953 also convert validly to an unsigned one. */ 954 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC 955 956 /* Max number of bytes we can move from memory to memory 957 in one reasonably fast instruction. */ 958 #define MOVE_MAX (TARGET_H8300H || TARGET_H8300S ? 4 : 2) 959 #define MAX_MOVE_MAX 4 960 961 /* Nonzero if access to memory by bytes is slow and undesirable. */ 962 #define SLOW_BYTE_ACCESS TARGET_SLOWBYTE 963 964 /* Define if shifts truncate the shift count 965 which implies one can omit a sign-extension or zero-extension 966 of a shift count. */ 967 /* #define SHIFT_COUNT_TRUNCATED */ 968 969 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits 970 is done just by pretending it is already truncated. */ 971 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1 972 973 /* Specify the machine mode that pointers have. 974 After generation of rtl, the compiler makes no further distinction 975 between pointers and any other objects of this machine mode. */ 976 #define Pmode \ 977 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? SImode : HImode) 978 979 /* ANSI C types. 980 We use longs for the H8/300H and the H8S because ints can be 16 or 32. 981 GCC requires SIZE_TYPE to be the same size as pointers. */ 982 #define SIZE_TYPE \ 983 (TARGET_H8300 || TARGET_NORMAL_MODE ? "unsigned int" : "long unsigned int") 984 #define PTRDIFF_TYPE \ 985 (TARGET_H8300 || TARGET_NORMAL_MODE ? "int" : "long int") 986 987 #define POINTER_SIZE \ 988 ((TARGET_H8300H || TARGET_H8300S) && !TARGET_NORMAL_MODE ? 32 : 16) 989 990 #define WCHAR_TYPE "short unsigned int" 991 #define WCHAR_TYPE_SIZE 16 992 #define MAX_WCHAR_TYPE_SIZE 16 993 994 /* A function address in a call instruction 995 is a byte address (for indexing purposes) 996 so give the MEM rtx a byte's mode. */ 997 #define FUNCTION_MODE QImode 998 999 #define BRANCH_COST 0 1000 1001 /* Tell final.c how to eliminate redundant test instructions. */ 1002 1003 /* Here we define machine-dependent flags and fields in cc_status 1004 (see `conditions.h'). No extra ones are needed for the h8300. */ 1005 1006 /* Store in cc_status the expressions 1007 that the condition codes will describe 1008 after execution of an instruction whose pattern is EXP. 1009 Do not alter them if the instruction would not alter the cc's. */ 1010 1011 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc (EXP, INSN) 1012 1013 /* The add insns don't set overflow in a usable way. */ 1014 #define CC_OVERFLOW_UNUSABLE 01000 1015 /* The mov,and,or,xor insns don't set carry. That's OK though as the 1016 Z bit is all we need when doing unsigned comparisons on the result of 1017 these insns (since they're always with 0). However, conditions.h has 1018 CC_NO_OVERFLOW defined for this purpose. Rename it to something more 1019 understandable. */ 1020 #define CC_NO_CARRY CC_NO_OVERFLOW 1021 1022 /* Control the assembler format that we output. */ 1023 1024 /* Output to assembler file text saying following lines 1025 may contain character constants, extra white space, comments, etc. */ 1026 1027 #define ASM_APP_ON "; #APP\n" 1028 1029 /* Output to assembler file text saying following lines 1030 no longer contain unusual constructs. */ 1031 1032 #define ASM_APP_OFF "; #NO_APP\n" 1033 1034 #define FILE_ASM_OP "\t.file\n" 1035 1036 /* The assembler op to get a word, 2 bytes for the H8/300, 4 for H8/300H. */ 1037 #define ASM_WORD_OP \ 1038 (TARGET_H8300 || TARGET_NORMAL_MODE ? "\t.word\t" : "\t.long\t") 1039 1040 #define TEXT_SECTION_ASM_OP "\t.section .text" 1041 #define DATA_SECTION_ASM_OP "\t.section .data" 1042 #define BSS_SECTION_ASM_OP "\t.section .bss" 1043 1044 #undef DO_GLOBAL_CTORS_BODY 1045 #define DO_GLOBAL_CTORS_BODY \ 1046 { \ 1047 extern func_ptr __ctors[]; \ 1048 extern func_ptr __ctors_end[]; \ 1049 func_ptr *p; \ 1050 for (p = __ctors_end; p > __ctors; ) \ 1051 { \ 1052 (*--p)(); \ 1053 } \ 1054 } 1055 1056 #undef DO_GLOBAL_DTORS_BODY 1057 #define DO_GLOBAL_DTORS_BODY \ 1058 { \ 1059 extern func_ptr __dtors[]; \ 1060 extern func_ptr __dtors_end[]; \ 1061 func_ptr *p; \ 1062 for (p = __dtors; p < __dtors_end; p++) \ 1063 { \ 1064 (*p)(); \ 1065 } \ 1066 } 1067 1068 /* How to refer to registers in assembler output. 1069 This sequence is indexed by compiler's hard-register-number (see above). */ 1070 1071 #define REGISTER_NAMES \ 1072 { "r0", "r1", "r2", "r3", "r4", "r5", "r6", "sp", "mac", "ap", "rap" } 1073 1074 #define ADDITIONAL_REGISTER_NAMES \ 1075 { {"er0", 0}, {"er1", 1}, {"er2", 2}, {"er3", 3}, {"er4", 4}, \ 1076 {"er5", 5}, {"er6", 6}, {"er7", 7}, {"r7", 7} } 1077 1078 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) 1079 1080 /* Globalizing directive for a label. */ 1081 #define GLOBAL_ASM_OP "\t.global " 1082 1083 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \ 1084 ASM_OUTPUT_LABEL (FILE, NAME) 1085 1086 /* The prefix to add to user-visible assembler symbols. */ 1087 1088 #define USER_LABEL_PREFIX "_" 1089 1090 /* This is how to store into the string LABEL 1091 the symbol_ref name of an internal numbered label where 1092 PREFIX is the class of label and NUM is the number within the class. 1093 This is suitable for output with `assemble_name'. 1094 1095 N.B.: The h8300.md branch_true and branch_false patterns also know 1096 how to generate internal labels. */ 1097 #define ASM_GENERATE_INTERNAL_LABEL(LABEL, PREFIX, NUM) \ 1098 sprintf (LABEL, "*.%s%lu", PREFIX, (unsigned long)(NUM)) 1099 1100 /* This is how to output an insn to push a register on the stack. 1101 It need not be very fast code. */ 1102 1103 #define ASM_OUTPUT_REG_PUSH(FILE, REGNO) \ 1104 fprintf (FILE, "\t%s\t%s\n", h8_push_op, h8_reg_names[REGNO]) 1105 1106 /* This is how to output an insn to pop a register from the stack. 1107 It need not be very fast code. */ 1108 1109 #define ASM_OUTPUT_REG_POP(FILE, REGNO) \ 1110 fprintf (FILE, "\t%s\t%s\n", h8_pop_op, h8_reg_names[REGNO]) 1111 1112 /* This is how to output an element of a case-vector that is absolute. */ 1113 1114 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \ 1115 fprintf (FILE, "%s.L%d\n", ASM_WORD_OP, VALUE) 1116 1117 /* This is how to output an element of a case-vector that is relative. */ 1118 1119 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \ 1120 fprintf (FILE, "%s.L%d-.L%d\n", ASM_WORD_OP, VALUE, REL) 1121 1122 /* This is how to output an assembler line 1123 that says to advance the location counter 1124 to a multiple of 2**LOG bytes. */ 1125 1126 #define ASM_OUTPUT_ALIGN(FILE, LOG) \ 1127 if ((LOG) != 0) \ 1128 fprintf (FILE, "\t.align %d\n", (LOG)) 1129 1130 #define ASM_OUTPUT_SKIP(FILE, SIZE) \ 1131 fprintf (FILE, "\t.space %d\n", (int)(SIZE)) 1132 1133 /* This says how to output an assembler line 1134 to define a global common symbol. */ 1135 1136 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \ 1137 ( fputs ("\t.comm ", (FILE)), \ 1138 assemble_name ((FILE), (NAME)), \ 1139 fprintf ((FILE), ",%lu\n", (unsigned long)(SIZE))) 1140 1141 /* This says how to output the assembler to define a global 1142 uninitialized but not common symbol. 1143 Try to use asm_output_bss to implement this macro. */ 1144 1145 #define ASM_OUTPUT_BSS(FILE, DECL, NAME, SIZE, ROUNDED) \ 1146 asm_output_bss ((FILE), (DECL), (NAME), (SIZE), (ROUNDED)) 1147 1148 /* This says how to output an assembler line 1149 to define a local common symbol. */ 1150 1151 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \ 1152 ( fputs ("\t.lcomm ", (FILE)), \ 1153 assemble_name ((FILE), (NAME)), \ 1154 fprintf ((FILE), ",%d\n", (int)(SIZE))) 1155 1156 #define ASM_PN_FORMAT "%s___%lu" 1157 1158 /* Print an instruction operand X on file FILE. 1159 Look in h8300.c for details. */ 1160 1161 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) \ 1162 ((CODE) == '#') 1163 1164 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE) 1165 1166 /* Print a memory operand whose address is X, on file FILE. 1167 This uses a function in h8300.c. */ 1168 1169 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR) 1170 1171 /* H8300 specific pragmas. */ 1172 #define REGISTER_TARGET_PRAGMAS() \ 1173 do \ 1174 { \ 1175 c_register_pragma (0, "saveall", h8300_pr_saveall); \ 1176 c_register_pragma (0, "interrupt", h8300_pr_interrupt); \ 1177 } \ 1178 while (0) 1179 1180 #define FINAL_PRESCAN_INSN(insn, operand, nop) \ 1181 final_prescan_insn (insn, operand, nop) 1182 1183 /* Define this macro if GCC should generate calls to the System V 1184 (and ANSI C) library functions `memcpy' and `memset' rather than 1185 the BSD functions `bcopy' and `bzero'. */ 1186 1187 #define TARGET_MEM_FUNCTIONS 1188 1189 #define MOVE_RATIO 3 1190 1191 /* Define the codes that are matched by predicates in h8300.c. */ 1192 1193 #define PREDICATE_CODES \ 1194 {"general_operand_src", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ 1195 LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, \ 1196 {"general_operand_dst", {CONST_INT, CONST_DOUBLE, CONST, SYMBOL_REF, \ 1197 LABEL_REF, SUBREG, REG, MEM, ADDRESSOF}}, \ 1198 {"single_one_operand", {CONST_INT}}, \ 1199 {"single_zero_operand", {CONST_INT}}, \ 1200 {"call_insn_operand", {MEM}}, \ 1201 {"small_call_insn_operand", {MEM}}, \ 1202 {"jump_address_operand", {REG, MEM}}, \ 1203 {"two_insn_adds_subs_operand", {CONST_INT}}, \ 1204 {"bit_operand", {REG, SUBREG, MEM}}, \ 1205 {"bit_memory_operand", {MEM}}, \ 1206 {"stack_pointer_operand", {REG}}, \ 1207 {"const_int_gt_2_operand", {CONST_INT}}, \ 1208 {"const_int_ge_8_operand", {CONST_INT}}, \ 1209 {"const_int_qi_operand", {CONST_INT}}, \ 1210 {"const_int_hi_operand", {CONST_INT}}, \ 1211 {"incdec_operand", {CONST_INT}}, \ 1212 {"bit_operator", {XOR, AND, IOR}}, \ 1213 {"nshift_operator", {ASHIFTRT, LSHIFTRT, ASHIFT}}, \ 1214 {"eqne_operator", {EQ, NE}}, \ 1215 {"gtle_operator", {GT, LE, GTU, LEU}}, \ 1216 {"gtuleu_operator", {GTU, LEU}}, \ 1217 {"iorxor_operator", {IOR, XOR}}, 1218 1219 #endif /* ! GCC_H8300_H */ 1220