1# frv testcase for ftilt $FCCi_2,$GRi,$s12 2# mach: all 3 4 .include "testutils.inc" 5 6 start 7 8 .global ftilt 9ftilt: 10 and_spr_immed -4081,tbr ; clear tbr.tt 11 set_gr_spr tbr,gr7 12 inc_gr_immed 2112,gr7 ; address of exception handler 13 set_bctrlr_0_0 gr7 ; bctrlr 0,0 14 15 set_spr_immed 128,lcr 16 set_gr_immed 0,gr7 17 18 set_spr_addr bad,lr 19 set_fcc 0x0 0 20 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 21 22 set_spr_addr bad,lr 23 set_fcc 0x1 0 24 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 25 26 set_spr_addr bad,lr 27 set_fcc 0x2 0 28 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 29 30 set_spr_addr bad,lr 31 set_fcc 0x3 0 32 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 33 34 set_psr_et 1 35 set_spr_addr ok4,lr 36 set_fcc 0x4 0 37 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 38 fail 39ok4: 40 set_psr_et 1 41 set_spr_addr ok5,lr 42 set_fcc 0x5 0 43 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 44 fail 45ok5: 46 set_psr_et 1 47 set_spr_addr ok6,lr 48 set_fcc 0x6 0 49 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 50 fail 51ok6: 52 set_psr_et 1 53 set_spr_addr ok7,lr 54 set_fcc 0x7 0 55 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 56 fail 57ok7: 58 set_spr_addr bad,lr 59 set_fcc 0x8 0 60 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 61 62 set_spr_addr bad,lr 63 set_fcc 0x9 0 64 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 65 66 set_spr_addr bad,lr 67 set_fcc 0xa 0 68 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 69 70 set_spr_addr bad,lr 71 set_fcc 0xb 0 72 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 73 74 set_psr_et 1 75 set_spr_addr okc,lr 76 set_fcc 0xc 0 77 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 78 fail 79okc: 80 set_psr_et 1 81 set_spr_addr okd,lr 82 set_fcc 0xd 0 83 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 84 fail 85okd: 86 set_psr_et 1 87 set_spr_addr oke,lr 88 set_fcc 0xe 0 89 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 90 fail 91oke: 92 set_psr_et 1 93 set_spr_addr okf,lr 94 set_fcc 0xf 0 95 ftilt fcc0,gr7,4 ; should branch to tbr + (128 + 4)*16 96 fail 97okf: 98 pass 99bad: 100 fail 101