1# frv testcase for mqcpxru $GRi,$GRj,$GRk 2# mach: all 3 4 .include "testutils.inc" 5 6 start 7 8 .global mqcpxru 9mqcpxru: 10 set_fr_iimmed 4,2,fr8 ; multiply small numbers 11 set_fr_iimmed 5,3,fr10 12 set_fr_iimmed 1,2,fr9 ; multiply by 1 13 set_fr_iimmed 3,1,fr11 14 mqcpxru fr8,fr10,acc0 15 test_accg_immed 0,accg0 16 test_acc_immed 14,acc0 17 test_accg_immed 0,accg1 18 test_acc_immed 1,acc1 19 20 set_fr_iimmed 0,2,fr8 ; multiply by 0 21 set_fr_iimmed 2,0,fr10 22 set_fr_iimmed 0x3fff,1,fr9 ; 15 bit result 23 set_fr_iimmed 2,0x0001,fr11 24 mqcpxru fr8,fr10,acc0 25 test_accg_immed 0,accg0 26 test_acc_immed 0,acc0 27 test_accg_immed 0,accg1 28 test_acc_limmed 0x0000,0x7ffd,acc1 29 30 set_fr_iimmed 0x4000,1,fr8 ; 16 bit result 31 set_fr_iimmed 4,0x0001,fr10 32 set_fr_iimmed 0x8000,1,fr9 ; 17 bit result 33 set_fr_iimmed 4,0x0001,fr11 34 mqcpxru fr8,fr10,acc0 35 test_accg_immed 0,accg0 36 test_acc_limmed 0x0000,0xffff,acc0 37 test_accg_immed 0,accg1 38 test_acc_immed 0x0001ffff,acc1 39 40 set_fr_iimmed 0x7fff,0x0000,fr8 ; max positive result 41 set_fr_iimmed 0x7fff,0x7fff,fr10 42 set_fr_iimmed 0x8000,0x8000,fr9 ; max positive result 43 set_fr_iimmed 0x8000,0x0000,fr11 44 mqcpxru fr8,fr10,acc0 45 test_accg_immed 0,accg0 46 test_acc_immed 0x3fff0001,acc0 47 test_accg_immed 0,accg1 48 test_acc_limmed 0x4000,0x0000,acc1 49 50 set_fr_iimmed 0xffff,0x0000,fr8 ; max positive result 51 set_fr_iimmed 0xffff,0xffff,fr10 52 set_fr_iimmed 0x0000,0x0001,fr9 ; saturation 53 set_fr_iimmed 0xffff,0x0001,fr11 54 mqcpxru fr8,fr10,acc0 55 test_spr_bits 0x3c,2,0x4,msr0 ; msr0.sie is set 56 test_spr_bits 2,1,1,msr0 ; msr0.ovf is set 57 test_spr_bits 1,0,1,msr0 ; msr0.aovf is set 58 test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt is set 59 test_accg_immed 0,accg0 60 test_acc_limmed 0xfffe,0x0001,acc0 61 test_accg_immed 0,accg1 62 test_acc_immed 0,acc1 63 64 set_fr_iimmed 0x0000,0xffff,fr8 ; saturation 65 set_fr_iimmed 0xffff,0xffff,fr10 66 set_fr_iimmed 0xfffe,0xffff,fr9 ; saturation 67 set_fr_iimmed 0xffff,0xffff,fr11 68 mqcpxru fr8,fr10,acc0 69 test_spr_bits 0x3c,2,0xc,msr0 ; msr0.sie is set 70 test_spr_bits 2,1,1,msr0 ; msr0.ovf is set 71 test_spr_bits 1,0,1,msr0 ; msr0.aovf is set 72 test_spr_bits 0x7000,12,1,msr0 ; msr0.mtt is set 73 test_accg_immed 0,accg0 74 test_acc_immed 0,acc0 75 test_accg_immed 0,accg1 76 test_acc_immed 0,acc1 77 78 pass 79