1 #ifndef UAE_PICASSO96_H 2 #define UAE_PICASSO96_H 3 4 #include "uae/types.h" 5 #include "traps.h" 6 7 void picasso96_alloc (TrapContext* ctx); 8 uae_u32 picasso_demux (uae_u32 arg, TrapContext *ctx); 9 10 #ifdef FSUAE // NL 11 12 #include "picasso96_win.h" 13 14 #else 15 16 #ifdef WIN32 17 18 #include "picasso96_win.h" 19 20 #else 21 /* 22 * UAE - The U*nix Amiga Emulator 23 * 24 * Picasso96 Support Module Header 25 * 26 * Copyright 1997 Brian King <Brian_King@Mitel.com, Brian_King@Cloanto.com> 27 */ 28 29 #if defined PICASSO96_SUPPORTED 30 31 #define PICASSO96 32 33 34 /* Seems the same routines copy back and forth ;-) */ 35 #define PIC_READ (S_READ|S_WRITE) 36 #define PIC_WRITE (S_READ|S_WRITE) 37 38 #define JAM1 0 39 #define JAM2 1 40 #define COMP 2 41 #define INVERS 4 42 43 typedef enum { 44 BLIT_FALSE, 45 BLIT_NOR, 46 BLIT_ONLYDST, 47 BLIT_NOTSRC, 48 BLIT_ONLYSRC, 49 BLIT_NOTDST, 50 BLIT_EOR, 51 BLIT_NAND, 52 BLIT_AND, 53 BLIT_NEOR, 54 BLIT_DST, 55 BLIT_NOTONLYSRC, 56 BLIT_SRC, 57 BLIT_NOTONLYDST, 58 BLIT_OR, 59 BLIT_TRUE, 60 BLIT_LAST 61 } BLIT_OPCODE; 62 63 /************************************************************************/ 64 /* Types for BoardType Identification 65 */ 66 typedef enum { 67 BT_NoBoard, 68 BT_oMniBus, 69 BT_Graffity, 70 BT_CyberVision, 71 BT_Domino, 72 BT_Merlin, 73 BT_PicassoII, 74 BT_Piccolo, 75 BT_RetinaBLT, 76 BT_Spectrum, 77 BT_PicassoIV, 78 BT_PiccoloSD64, 79 BT_A2410, 80 BT_Pixel64, 81 BT_uaegfx, 82 BT_CVision3D, 83 BT_Altais, 84 BT_Prototype1, 85 BT_Prototype2, 86 BT_Prototype3, 87 BT_Prototype4, 88 BT_Prototype5, 89 BT_MaxBoardTypes 90 } BTYPE; 91 92 struct ScreenResolution 93 { 94 uae_u32 width; /* in pixels */ 95 uae_u32 height; /* in pixels */ 96 }; 97 98 #define MAX_PICASSO_MODES 64 99 100 struct PicassoResolution 101 { 102 struct Resolutions *next; 103 struct ScreenResolution res; 104 int depth; 105 int refresh; 106 char name[25]; 107 }; 108 extern struct PicassoResolution DisplayModes[MAX_PICASSO_MODES]; 109 110 111 /* Types for RGBFormat used */ 112 typedef enum { 113 RGBFB_NONE, /* no valid RGB format (should not happen) */ 114 RGBFB_CLUT, /* palette mode, set colors when opening screen using 115 tags or use SetRGB32/LoadRGB32(...) */ 116 RGBFB_R8G8B8, /* TrueColor RGB (8 bit each) */ 117 RGBFB_B8G8R8, /* TrueColor BGR (8 bit each) */ 118 RGBFB_R5G6B5PC, /* HiColor16 (5 bit R, 6 bit G, 5 bit B), 119 format: gggbbbbbrrrrrggg */ 120 RGBFB_R5G5B5PC, /* HiColor15 (5 bit each), format: gggbbbbb0rrrrrgg */ 121 RGBFB_A8R8G8B8, /* 4 Byte TrueColor ARGB (A unused alpha channel) */ 122 RGBFB_A8B8G8R8, /* 4 Byte TrueColor ABGR (A unused alpha channel) */ 123 RGBFB_R8G8B8A8, /* 4 Byte TrueColor RGBA (A unused alpha channel) */ 124 RGBFB_B8G8R8A8, /* 4 Byte TrueColor BGRA (A unused alpha channel) */ 125 RGBFB_R5G6B5, /* HiColor16 (5 bit R, 6 bit G, 5 bit B), 126 format: rrrrrggggggbbbbb */ 127 RGBFB_R5G5B5, /* HiColor15 (5 bit each), format: 0rrrrrgggggbbbbb */ 128 RGBFB_B5G6R5PC, /* HiColor16 (5 bit R, 6 bit G, 5 bit B), 129 format: gggrrrrrbbbbbggg */ 130 RGBFB_B5G5R5PC, /* HiColor15 (5 bit each), format: gggrrrrr0bbbbbbgg */ 131 132 /* By now, the following formats are for use with a hardware window only 133 (bitmap operations may be implemented incompletely) */ 134 135 RGBFB_Y4U2V2, /* 2 Byte TrueColor YUV (CCIR recommendation CCIR601). 136 Each two-pixel unit is stored as one longword 137 containing luminance (Y) for each of the two pixels, 138 and chrominance (U,V) for alternate pixels. 139 The missing chrominance values are generated by 140 interpolation. (Y1-U0-Y0-V0) */ 141 RGBFB_Y4U1V1, /* 1 Byte TrueColor ACCUPAK. Four adjacent pixels form 142 a packet of 5 bits Y (luminance) each pixel and 6 bits 143 U and V (chrominance) shared by the four pixels */ 144 145 RGBFB_MaxFormats 146 } RGBFTYPE; 147 148 #define RGBFF_NONE (1<<RGBFB_NONE) 149 #define RGBFF_CLUT (1<<RGBFB_CLUT) 150 #define RGBFF_R8G8B8 (1<<RGBFB_R8G8B8) 151 #define RGBFF_B8G8R8 (1<<RGBFB_B8G8R8) 152 #define RGBFF_R5G6B5PC (1<<RGBFB_R5G6B5PC) 153 #define RGBFF_R5G5B5PC (1<<RGBFB_R5G5B5PC) 154 #define RGBFF_A8R8G8B8 (1<<RGBFB_A8R8G8B8) 155 #define RGBFF_A8B8G8R8 (1<<RGBFB_A8B8G8R8) 156 #define RGBFF_R8G8B8A8 (1<<RGBFB_R8G8B8A8) 157 #define RGBFF_B8G8R8A8 (1<<RGBFB_B8G8R8A8) 158 #define RGBFF_R5G6B5 (1<<RGBFB_R5G6B5) 159 #define RGBFF_R5G5B5 (1<<RGBFB_R5G5B5) 160 #define RGBFF_B5G6R5PC (1<<RGBFB_B5G6R5PC) 161 #define RGBFF_B5G5R5PC (1<<RGBFB_B5G5R5PC) 162 #define RGBFF_Y4U2V2 (1<<RGBFB_Y4U2V2) 163 #define RGBFF_Y4U1V1 (1<<RGBFB_Y4U1V1) 164 165 #define RGBMASK_8BIT RGBFF_CLUT 166 #define RGBMASK_16BIT (RGBFF_R5G6B5PC | RGBFF_B5G6R5PC | RGBFF_R5G6B5) 167 #define RGBMASK_15BIT (RGBFF_R5G5B5PC | RGBFF_B5G5R5PC | RGBFF_R5G5B5) 168 #define RGBMASK_24BIT (RGBFF_R8G8B8 | RGBFF_B8G8R8) 169 #define RGBMASK_32BIT (RGBFF_A8R8G8B8 | RGBFF_A8B8G8R8 | RGBFF_R8G8B8A8 | RGBFF_B8G8R8A8) 170 171 /************************************************************************/ 172 173 #define RGBFF_PLANAR RGBFF_NONE 174 #define RGBFF_CHUNKY RGBFF_CLUT 175 176 #define RGBFB_PLANAR RGBFB_NONE 177 #define RGBFB_CHUNKY RGBFB_CLUT 178 179 /************************************************************************/ 180 181 enum { 182 PLANAR, 183 CHUNKY, 184 HICOLOR, 185 TRUECOLOR, 186 TRUEALPHA, 187 MAXMODES 188 }; 189 190 /************************************************************************/ 191 struct MyCLUTEntry { 192 uae_u8 Red; 193 uae_u8 Green; 194 uae_u8 Blue; 195 uae_u8 Pad; 196 }; 197 198 struct ColorIndexMapping { 199 uae_u32 ColorMask; 200 uae_u32 Colors[256]; 201 }; 202 203 struct CLUTEntry { 204 uae_u8 Red; 205 uae_u8 Green; 206 uae_u8 Blue; 207 }; 208 209 #define PSSO_BitMap_BytesPerRow 0 210 #define PSSO_BitMap_Rows 2 211 #define PSSO_BitMap_Flags 4 212 #define PSSO_BitMap_Depth 5 213 #define PSSO_BitMap_pad 6 214 #define PSSO_BitMap_Planes 8 215 #define PSSO_BitMap_sizeof 40 216 217 struct BitMap 218 { 219 uae_u16 BytesPerRow; 220 uae_u16 Rows; 221 uae_u8 Flags; 222 uae_u8 Depth; 223 uae_u16 pad; 224 uae_u8 *Planes[8]; 225 }; 226 227 /************************************************************************/ 228 229 #define SETTINGSNAMEMAXCHARS 30 230 #define BOARDNAMEMAXCHARS 30 231 232 struct Settings { 233 uae_u32 BoardType; 234 /* a value discribing assignment to nth board local to boardtype 235 * to be used for reassignment when boards are added or removed. */ 236 uae_u16 LocalOrdering; 237 uae_s16 LastSelected; 238 char NameField[SETTINGSNAMEMAXCHARS]; 239 /* neu! */ 240 char *BoardName; 241 }; 242 243 #define MAXRESOLUTIONNAMELENGTH 22 244 245 /******************************** 246 * only used within rtg.library * 247 ********************************/ 248 249 #define PSSO_LibResolution_P96ID 14 250 #define PSSO_LibResolution_Name 20 251 #define PSSO_LibResolution_DisplayID 42 /* Name + MAXRESOLUTIONNAMELENGTH */ 252 #define PSSO_LibResolution_Width 46 253 #define PSSO_LibResolution_Height 48 254 #define PSSO_LibResolution_Flags 50 255 #define PSSO_LibResolution_Modes 52 256 #define PSSO_LibResolution_BoardInfo (52 + MAXMODES*4) 257 #define PSSO_LibResolution_sizeof (60 + MAXMODES*4) 258 259 struct LibResolution { 260 char P96ID[6]; 261 char Name[MAXRESOLUTIONNAMELENGTH]; 262 uae_u32 DisplayID; 263 uae_u16 Width; 264 uae_u16 Height; 265 uae_u16 Flags; 266 uaecptr Modes[MAXMODES]; 267 uaecptr BoardInfo; 268 }; 269 270 #define P96B_FAMILY 0 /* obsolete (Resolution is an entire family) */ 271 #define P96B_PUBLIC 1 /* Resolution should be added to the public */ 272 #define P96B_MONITOOL 2 273 274 #define P96F_FAMILY (1<<P96B_FAMILY) /* obsolete */ 275 #define P96F_PUBLIC (1<<P96B_PUBLIC) 276 #define P96F_MONITOOL (1<<P96B_MONITOOL) 277 278 #define PSSO_ModeInfo_OpenCount 14 279 #define PSSO_ModeInfo_Active 16 280 #define PSSO_ModeInfo_Width 18 281 #define PSSO_ModeInfo_Height 20 282 #define PSSO_ModeInfo_Depth 22 283 #define PSSO_ModeInfo_Flags 23 284 #define PSSO_ModeInfo_HorTotal 24 285 #define PSSO_ModeInfo_HorBlankSize 26 286 #define PSSO_ModeInfo_HorSyncStart 28 287 #define PSSO_ModeInfo_HorSyncSize 30 288 #define PSSO_ModeInfo_HorSyncSkew 32 289 #define PSSO_ModeInfo_HorEnableSkew 33 290 #define PSSO_ModeInfo_VerTotal 34 291 #define PSSO_ModeInfo_VerBlankSize 36 292 #define PSSO_ModeInfo_VerSyncStart 38 293 #define PSSO_ModeInfo_VerSyncSize 40 294 #define PSSO_ModeInfo_first_union 42 295 #define PSSO_ModeInfo_second_union 43 296 #define PSSO_ModeInfo_PixelClock 44 297 #define PSSO_ModeInfo_sizeof 48 298 299 #define PSSO_RenderInfo_Memory 0 300 #define PSSO_RenderInfo_BytesPerRow 4 301 #define PSSO_RenderInfo_pad 6 302 #define PSSO_RenderInfo_RGBFormat 8 303 #define PSSO_RenderInfo_sizeof 12 304 305 struct RenderInfo { 306 uae_u8 *Memory; 307 uae_s16 BytesPerRow; 308 uae_s16 pad; 309 RGBFTYPE RGBFormat; 310 uaecptr AMemory; 311 }; 312 313 #define PSSO_Pattern_Memory 0 314 #define PSSO_Pattern_XOffset 4 315 #define PSSO_Pattern_YOffset 6 316 #define PSSO_Pattern_FgPen 8 317 #define PSSO_Pattern_BgPen 12 318 #define PSSO_Pattern_Size 16 319 #define PSSO_Pattern_DrawMode 17 320 #define PSSO_Pattern_sizeof 18 321 struct Pattern { 322 char *Memory; 323 uae_u16 XOffset, YOffset; 324 uae_u32 FgPen, BgPen; 325 uae_u8 Size; /* Width: 16, Height: (1<<pat_Size) */ 326 uae_u8 DrawMode; 327 }; 328 329 #define PSSO_Template_Memory 0 330 #define PSSO_Template_BytesPerRow 4 331 #define PSSO_Template_XOffset 6 332 #define PSSO_Template_DrawMode 7 333 #define PSSO_Template_FgPen 8 334 #define PSSO_Template_BgPen 12 335 #define PSSO_Template_sizeof 16 336 337 struct Template { 338 char *Memory; 339 uae_s16 BytesPerRow; 340 uae_u8 XOffset; 341 uae_u8 DrawMode; 342 uae_u32 FgPen; 343 uae_u32 BgPen; 344 }; 345 346 #define PSSO_BitMapExtra_BoardNode 0 347 #define PSSO_BitMapExtra_HashChain 8 /* BoardNode is 8-bytes */ 348 #define PSSO_BitMapExtra_Match 12 349 #define PSSO_BitMapExtra_BitMap 16 350 #define PSSO_BitMapExtra_BoardInfo 20 351 #define PSSO_BitMapExtra_MemChunk 24 352 #define PSSO_BitMapExtra_RenderInfo 28 353 #define PSSO_BitMapExtra_Width 40 /* RenderInfo is 12-bytes */ 354 #define PSSO_BitMapExtra_Height 42 355 #define PSSO_BitMapExtra_Flags 44 356 #define PSSO_BitMapExtra_BaseLevel 46 357 #define PSSO_BitMapExtra_CurrentLevel 48 358 #define PSSO_BitMapExtra_CompanionMaster 50 359 #define PSSO_BitMapExtra_Last 54 360 361 #define PSSO_BoardInfo_RegisterBase 0 362 #define PSSO_BoardInfo_MemoryBase PSSO_BoardInfo_RegisterBase + 4 363 #define PSSO_BoardInfo_MemoryIOBase PSSO_BoardInfo_MemoryBase + 4 364 #define PSSO_BoardInfo_MemorySize PSSO_BoardInfo_MemoryIOBase + 4 365 #define PSSO_BoardInfo_BoardName PSSO_BoardInfo_MemorySize + 4 366 #define PSSO_BoardInfo_VBIName PSSO_BoardInfo_BoardName + 4 367 #define PSSO_BoardInfo_CardBase PSSO_BoardInfo_VBIName + 32 368 #define PSSO_BoardInfo_ChipBase PSSO_BoardInfo_CardBase + 4 369 #define PSSO_BoardInfo_ExecBase PSSO_BoardInfo_ChipBase + 4 370 #define PSSO_BoardInfo_UtilBase PSSO_BoardInfo_ExecBase + 4 371 #define PSSO_BoardInfo_HardInterrupt PSSO_BoardInfo_UtilBase + 4 372 #define PSSO_BoardInfo_SoftInterrupt PSSO_BoardInfo_HardInterrupt + 22 /* The HardInterrupt is 22-bytes */ 373 #define PSSO_BoardInfo_BoardLock PSSO_BoardInfo_SoftInterrupt + 22 /* The SoftInterrupt is 22-bytes */ 374 #define PSSO_BoardInfo_ResolutionsList PSSO_BoardInfo_BoardLock + 46 /* On the BoardLock, we were having some fun... */ 375 #define PSSO_BoardInfo_BoardType PSSO_BoardInfo_ResolutionsList + 12 /* The ResolutionsList is 12-bytes */ 376 #define PSSO_BoardInfo_PaletteChipType PSSO_BoardInfo_BoardType + 4 377 #define PSSO_BoardInfo_GraphicsControllerType PSSO_BoardInfo_PaletteChipType + 4 378 #define PSSO_BoardInfo_MoniSwitch PSSO_BoardInfo_GraphicsControllerType + 4 379 #define PSSO_BoardInfo_BitsPerCannon PSSO_BoardInfo_MoniSwitch + 2 380 #define PSSO_BoardInfo_Flags PSSO_BoardInfo_BitsPerCannon + 2 381 #define PSSO_BoardInfo_SoftSpriteFlags PSSO_BoardInfo_Flags + 4 382 #define PSSO_BoardInfo_ChipFlags PSSO_BoardInfo_SoftSpriteFlags + 2 383 #define PSSO_BoardInfo_CardFlags PSSO_BoardInfo_ChipFlags + 2 384 #define PSSO_BoardInfo_BoardNum PSSO_BoardInfo_CardFlags + 4 385 #define PSSO_BoardInfo_RGBFormats PSSO_BoardInfo_BoardNum + 2 386 #define PSSO_BoardInfo_MaxHorValue PSSO_BoardInfo_RGBFormats + 2 387 #define PSSO_BoardInfo_MaxVerValue PSSO_BoardInfo_MaxHorValue + MAXMODES*2 388 #define PSSO_BoardInfo_MaxHorResolution PSSO_BoardInfo_MaxVerValue + MAXMODES*2 389 #define PSSO_BoardInfo_MaxVerResolution PSSO_BoardInfo_MaxHorResolution + MAXMODES*2 390 #define PSSO_BoardInfo_MaxMemorySize PSSO_BoardInfo_MaxVerResolution + MAXMODES*2 391 #define PSSO_BoardInfo_MaxChunkSize PSSO_BoardInfo_MaxMemorySize + 4 392 #define PSSO_BoardInfo_MemoryClock PSSO_BoardInfo_MaxChunkSize + 4 393 #define PSSO_BoardInfo_PixelClockCount PSSO_BoardInfo_MemoryClock + 4 394 #define PSSO_BoardInfo_AllocCardMem PSSO_BoardInfo_PixelClockCount + MAXMODES*4 395 #define PSSO_BoardInfo_SpecialFeatures PSSO_BoardInfo_AllocCardMem + 68*4 /* 68 function pointers */ 396 #define PSSO_BoardInfo_ModeInfo PSSO_BoardInfo_SpecialFeatures + 12 /* SpecialFeatures is 12-bytes */ 397 #define PSSO_BoardInfo_RGBFormat PSSO_BoardInfo_ModeInfo + 4 398 #define PSSO_BoardInfo_XOffset PSSO_BoardInfo_RGBFormat + 4 399 #define PSSO_BoardInfo_YOffset PSSO_BoardInfo_XOffset + 2 400 #define PSSO_BoardInfo_Depth PSSO_BoardInfo_YOffset + 2 401 #define PSSO_BoardInfo_ClearMask PSSO_BoardInfo_Depth + 1 402 #define PSSO_BoardInfo_Border PSSO_BoardInfo_ClearMask + 1 403 #define PSSO_BoardInfo_Mask PSSO_BoardInfo_Border + 2 /* BOOL type is only 2-bytes! */ 404 #define PSSO_BoardInfo_CLUT PSSO_BoardInfo_Mask + 4 405 #define PSSO_BoardInfo_ViewPort PSSO_BoardInfo_CLUT + 3*256 406 #define PSSO_BoardInfo_VisibleBitMap PSSO_BoardInfo_ViewPort + 4 407 #define PSSO_BoardInfo_BitMapExtra PSSO_BoardInfo_VisibleBitMap + 4 408 #define PSSO_BoardInfo_BitMapList PSSO_BoardInfo_BitMapExtra + 4 409 #define PSSO_BoardInfo_MemList PSSO_BoardInfo_BitMapList + 12 /* BitMapList is 12-bytes */ 410 #define PSSO_BoardInfo_MouseX PSSO_BoardInfo_MemList + 12 /* MemList is 12-bytes */ 411 #define PSSO_BoardInfo_MouseY PSSO_BoardInfo_MouseX + 2 412 #define PSSO_BoardInfo_MouseWidth PSSO_BoardInfo_MouseY + 2 413 #define PSSO_BoardInfo_MouseHeight PSSO_BoardInfo_MouseWidth + 1 414 #define PSSO_BoardInfo_MouseXOffset PSSO_BoardInfo_MouseHeight + 1 415 #define PSSO_BoardInfo_MouseYOffset PSSO_BoardInfo_MouseXOffset + 1 416 #define PSSO_BoardInfo_MouseImage PSSO_BoardInfo_MouseYOffset + 1 417 #define PSSO_BoardInfo_MousePens PSSO_BoardInfo_MouseImage + 4 418 #define PSSO_BoardInfo_MouseRect PSSO_BoardInfo_MousePens + 4 419 #define PSSO_BoardInfo_MouseChunky PSSO_BoardInfo_MouseRect + 8 /* MouseRect is 8-bytes */ 420 #define PSSO_BoardInfo_MouseRendered PSSO_BoardInfo_MouseChunky + 4 421 #define PSSO_BoardInfo_MouseSaveBuffer PSSO_BoardInfo_MouseRendered + 4 422 423 struct BoardInfo { 424 uae_u8 *RegisterBase, *MemoryBase, *MemoryIOBase; 425 uae_u32 MemorySize; 426 char *BoardName, VBIName[32]; 427 428 uae_u16 MoniSwitch; 429 uae_u16 BitsPerCannon; 430 uae_u32 Flags; 431 uae_u16 SoftSpriteFlags; 432 uae_u16 ChipFlags; /* private, chip specific, not touched by RTG */ 433 uae_u32 CardFlags; /* private, card specific, not touched by RTG */ 434 435 uae_u16 BoardNum; 436 uae_s16 RGBFormats; 437 438 uae_u16 MaxHorValue[MAXMODES]; 439 uae_u16 MaxVerValue[MAXMODES]; 440 uae_u16 MaxHorResolution[MAXMODES]; 441 uae_u16 MaxVerResolution[MAXMODES]; 442 uae_u32 MaxMemorySize, MaxChunkSize; 443 }; 444 445 /* BoardInfo flags */ 446 /* 0-15: hardware flags */ 447 /* 16-31: user flags */ 448 #define BIB_HARDWARESPRITE 0 /* board has hardware sprite */ 449 #define BIB_NOMEMORYMODEMIX 1 /* board does not support modifying planar bitmaps while displaying chunky and vice versa */ 450 #define BIB_NEEDSALIGNMENT 2 /* bitmaps have to be aligned (not yet supported!) */ 451 #define BIB_DBLSCANDBLSPRITEY 8 /* hardware sprite y position is doubled on doublescan display modes */ 452 #define BIB_ILACEHALFSPRITEY 9 /* hardware sprite y position is halved on interlace display modes */ 453 #define BIB_ILACEDBLROWOFFSET 10 /* doubled row offset in interlaced display modes needs additional horizontal bit */ 454 455 #define BIB_FLICKERFIXER 12 /* board can flicker fix Amiga RGB signal */ 456 #define BIB_VIDEOCAPTURE 13 /* board can capture video data to a memory area */ 457 #define BIB_VIDEOWINDOW 14 /* board can display a second mem area as a pip */ 458 #define BIB_BLITTER 15 /* board has blitter */ 459 460 #define BIB_HIRESSPRITE 16 /* mouse sprite has double resolution */ 461 #define BIB_BIGSPRITE 17 /* user wants big mouse sprite */ 462 #define BIB_BORDEROVERRIDE 18 /* user wants to override system overscan border prefs */ 463 #define BIB_BORDERBLANK 19 /* user wants border blanking */ 464 #define BIB_INDISPLAYCHAIN 20 /* board switches Amiga signal */ 465 #define BIB_QUIET 21 /* not yet implemented */ 466 #define BIB_NOMASKBLITS 22 /* perform blits without taking care of mask */ 467 #define BIB_NOC2PBLITS 23 /* use CPU for planar to chunky conversions */ 468 #define BIB_NOBLITTER 24 /* disable all blitter functions */ 469 470 #define BIB_IGNOREMASK BIB_NOMASKBLITS 471 472 #define BIF_HARDWARESPRITE (1<<BIB_HARDWARESPRITE) 473 #define BIF_NOMEMORYMODEMIX (1<<BIB_NOMEMORYMODEMIX) 474 #define BIF_NEEDSALIGNMENT (1<<BIB_NEEDSALIGNMENT) 475 #define BIF_DBLSCANDBLSPRITEY (1<<BIB_DBLSCANDBLSPRITEY) 476 #define BIF_ILACEHALFSPRITEY (1<<BIB_ILACEHALFSPRITEY) 477 #define BIF_ILACEDBLROWOFFSET (1<<BIB_ILACEDBLROWOFFSET) 478 #define BIF_FLICKERFIXER (1<<BIB_FLICKERFIXER) 479 #define BIF_VIDEOCAPTURE (1<<BIB_VIDEOCAPTURE) 480 #define BIF_VIDEOWINDOW (1<<BIB_VIDEOWINDOW) 481 #define BIF_BLITTER (1<<BIB_BLITTER) 482 #define BIF_HIRESSPRITE (1<<BIB_HIRESSPRITE) 483 #define BIF_BIGSPRITE (1<<BIB_BIGSPRITE) 484 #define BIF_BORDEROVERRIDE (1<<BIB_BORDEROVERRIDE) 485 #define BIF_BORDERBLANK (1<<BIB_BORDERBLANK) 486 #define BIF_INDISPLAYCHAIN (1<<BIB_INDISPLAYCHAIN) 487 #define BIF_QUIET (1<<BIB_QUIET) 488 #define BIF_NOMASKBLITS (1<<BIB_NOMASKBLITS) 489 #define BIF_NOC2PBLITS (1<<BIB_NOC2PBLITS) 490 #define BIF_NOBLITTER (1<<BIB_NOBLITTER) 491 492 #define BIF_IGNOREMASK BIF_NOMASKBLITS 493 494 /************************************************************************/ 495 struct picasso96_state_struct 496 { 497 uae_u32 RGBFormat; /* true-colour, CLUT, hi-colour, etc. */ 498 struct MyCLUTEntry CLUT[256]; /* Duh! */ 499 uaecptr Address; /* Active screen address (Amiga-side) */ 500 uaecptr Extent; /* End address of screen (Amiga-side) */ 501 uae_u16 Width; /* Active display width (From SetGC) */ 502 uae_u16 VirtualWidth;/* Total screen width (From SetPanning) */ 503 uae_u16 BytesPerRow; /* Total screen width in bytes (From SetGC) */ 504 uae_u16 Height; /* Active display height (From SetGC) */ 505 uae_u16 VirtualHeight; /* Total screen height */ 506 uae_u8 GC_Depth; /* From SetGC() */ 507 uae_u8 GC_Flags; /* From SetGC() */ 508 long XOffset; /* From SetPanning() */ 509 long YOffset; /* From SetPanning() */ 510 uae_u8 SwitchState; /* From SetSwitch() - 0 is Amiga, 1 is Picasso */ 511 uae_u8 BytesPerPixel; 512 uae_u8 CardFound; 513 }; 514 515 extern void InitPicasso96 (void); 516 517 extern uae_u32 picasso_SetDisplay (void); 518 extern uae_u32 picasso_WaitVerticalSync (void); 519 extern uae_u32 picasso_CalculateBytesPerRow (void); 520 extern uae_u32 picasso_FillRect (void); 521 extern uae_u32 picasso_BlitRect (void); 522 extern uae_u32 picasso_InvertRect (void); 523 extern uae_u32 picasso_SetPanning (void); 524 extern uae_u32 picasso_SetGC (void); 525 extern uae_u32 picasso_SetDAC (void); 526 extern uae_u32 picasso_SetColorArray (void); 527 extern uae_u32 picasso_SetSwitch (void); 528 extern uae_u32 picasso_SetSwitch (void); 529 extern uae_u32 picasso_FindCard (void); 530 extern uae_u32 picasso_InitCard (void); 531 extern uae_u32 picasso_BlitPlanar2Chunky (void); 532 extern uae_u32 picasso_BlitPlanar2Direct (void); 533 extern uae_u32 picasso_BlitTemplate (void); 534 extern uae_u32 picasso_BlitPattern (void); 535 extern uae_u32 picasso_BlitRectNoMaskComplete (void); 536 537 extern uae_u32 gfxmem_mask; 538 extern uae_u8 *gfxmemory; 539 540 extern int uaegfx_card_found; 541 542 extern struct picasso96_state_struct picasso96_state; 543 544 #ifdef _WIN32 545 extern unsigned int timer_id; 546 #endif 547 548 extern int DX_Fill (int dstx, int dsty, int width, int height, uae_u32 color, RGBFTYPE rgbtype); 549 extern int DX_Blit (int srcx, int srcy, int dstx, int dsty, int width, int height, BLIT_OPCODE opcode); 550 extern void DX_BlitRectFromBuffer (struct RenderInfo *ri, uae_u8* buffer, uae_u16 dstx, uae_u16 dsty, uae_u16 w, uae_u16 h); 551 extern void DX_InvertRect (struct RenderInfo *ri, uae_u16 X, uae_u16 Y, uae_u16 Width, uae_u16 Height); 552 extern void DX_SetPalette (int start, int count); 553 extern void DX_SetPalette_vsync (void); 554 extern int DX_FillResolutions (uae_u16 *); 555 extern int DX_BitsPerCannon (void); 556 extern void DX_Invalidate (int first, int last); 557 extern void picasso_enablescreen (int on); 558 extern void picasso_refresh (int call_setpalette); 559 extern void picasso_handle_vsync (void); 560 561 extern uae_u8 *gfxmemory; 562 563 /* This structure describes the UAE-side framebuffer for the Picasso 564 * screen. */ 565 struct picasso_vidbuf_description { 566 int width, height, depth; 567 int rowbytes, pixbytes; 568 int extra_mem; /* nonzero if there's a second buffer that must be updated */ 569 uae_u32 rgbformat; 570 uae_u32 selected_rgbformat; 571 uae_u32 clut[256]; 572 }; 573 574 extern struct picasso_vidbuf_description picasso_vidinfo; 575 576 extern void gfx_set_picasso_modeinfo (int w, int h, int d, int rgbfmt); 577 extern void gfx_set_picasso_baseaddr (uaecptr); 578 extern void gfx_set_picasso_state (int on); 579 extern uae_u8 *gfx_lock_picasso (void); 580 extern void gfx_unlock_picasso (bool); 581 extern int picasso_display_mode_index (uae_u32 x, uae_u32 y, uae_u32 d); 582 extern int picasso_nr_resolutions (void); 583 extern void picasso_clip_mouse (int *, int *); 584 585 extern int NDX_InvertRect(struct RenderInfo* ri, unsigned long X, unsigned long Y, unsigned long Width, unsigned long Height, uae_u32 mask, int Bpp); 586 extern int NDX_BlitPattern(struct RenderInfo* ri,struct Pattern* pat,unsigned long X, unsigned long Y, unsigned long W, unsigned long H, uae_u8 Mask, uae_u32 RGBFmt); 587 extern int NDX_BlitTemplate(struct RenderInfo* ri, struct Template* tmp, unsigned long X, unsigned long Y, unsigned long W, unsigned long H, uae_u16 Mask); 588 extern int NDX_BlitPlanar2Chunky(struct RenderInfo* ri, struct BitMap* bm, unsigned long srcx, unsigned long srcy, unsigned long dstx, unsigned long dsty, unsigned long width, unsigned long height, uae_u8 minterm, uae_u8 mask); 589 extern int NDX_BlitPlanar2Direct(struct RenderInfo* ri, struct BitMap* bm, unsigned long srcx, unsigned long srcy, unsigned long dstx, unsigned long dsty, unsigned long width, unsigned long height, uae_u8 minterm, uae_u8 Mask); 590 extern int NDX_FillRect(struct RenderInfo* ri, unsigned long X, unsigned long Y, unsigned long Width, unsigned long Height, uae_u32 Pen, uae_u8 Mask, uae_u32 RGBFormat); 591 extern int NDX_BlitRect(struct RenderInfo* ri, unsigned long srcx, unsigned long srcy, unsigned long dstx, unsigned long dsty, unsigned long width, unsigned long height, uae_u8 Mask); 592 extern int NDX_BlitRectNoMaskComplete(struct RenderInfo* sri,struct RenderInfo* dri, unsigned long srcx, unsigned long srcy, unsigned long dstx, unsigned long dsty, unsigned long width, unsigned long height, uae_u8 OpCode, uae_u32 RGBFmt); 593 594 extern int picasso_is_special; 595 extern int picasso_is_special_read; 596 597 extern int p96hack_vpos2; 598 extern int p96refresh_active; 599 #endif 600 601 #endif 602 #endif 603 604 #endif /* UAE_PICASSO96_H */ 605