1 // license:BSD-3-Clause 2 // copyright-holders:Curt Coder, hap 3 /********************************************************************** 4 5 Tasc Final ChessCard cartridge emulation 6 7 **********************************************************************/ 8 9 #ifndef MAME_BUS_C64_FCC_H 10 #define MAME_BUS_C64_FCC_H 11 12 #pragma once 13 14 #include "exp.h" 15 #include "cpu/m6502/m65sc02.h" 16 #include "machine/gen_latch.h" 17 18 19 20 //************************************************************************** 21 // TYPE DEFINITIONS 22 //************************************************************************** 23 24 // ======================> c64_final_chesscard_device 25 26 class c64_final_chesscard_device : public device_t, 27 public device_c64_expansion_card_interface, 28 public device_nvram_interface 29 { 30 public: 31 // construction/destruction 32 c64_final_chesscard_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 33 34 protected: 35 // device-level overrides 36 virtual void device_start() override; 37 virtual void device_reset() override; 38 39 // optional information overrides 40 virtual void device_add_mconfig(machine_config &config) override; 41 virtual ioport_constructor device_input_ports() const override; 42 43 // device_nvram_interface overrides nvram_default()44 virtual void nvram_default() override { } nvram_read(emu_file & file)45 virtual void nvram_read(emu_file &file) override { if (m_nvram != nullptr) { file.read(m_nvram, m_nvram.bytes()); } } nvram_write(emu_file & file)46 virtual void nvram_write(emu_file &file) override { if (m_nvram != nullptr) { file.write(m_nvram, m_nvram.bytes()); } } 47 48 // device_c64_expansion_card_interface overrides 49 virtual uint8_t c64_cd_r(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override; 50 virtual void c64_cd_w(offs_t offset, uint8_t data, int sphi2, int ba, int roml, int romh, int io1, int io2) override; 51 52 private: 53 required_device<m65sc02_device> m_maincpu; 54 required_device<generic_latch_8_device> m_mainlatch; 55 required_device<generic_latch_8_device> m_sublatch; 56 57 uint8_t m_bank; 58 int m_hidden; 59 DECLARE_WRITE_LINE_MEMBER(mainlatch_int)60 DECLARE_WRITE_LINE_MEMBER(mainlatch_int) { m_slot->nmi_w(state); } rom_r(offs_t offset)61 uint8_t rom_r(offs_t offset) { return m_romx[offset]; } // cartridge cpu rom nvram_r(offs_t offset)62 uint8_t nvram_r(offs_t offset) { return m_nvram[offset & m_nvram.mask()]; } nvram_w(offs_t offset,uint8_t data)63 void nvram_w(offs_t offset, uint8_t data) { m_nvram[offset & m_nvram.mask()] = data; } 64 65 void c64_fcc_map(address_map &map); 66 }; 67 68 69 // device type definition 70 DECLARE_DEVICE_TYPE(C64_FCC, c64_final_chesscard_device) 71 72 73 #endif // MAME_BUS_C64_FCC_H 74