1 // license:BSD-3-Clause
2 // copyright-holders:Alex Pasadyn,Zsolt Vasvari
3 /***************************************************************************
4
5 TMS34010: Portable Texas Instruments TMS34010 emulator
6
7 Copyright Alex Pasadyn/Zsolt Vasvari
8 Parts based on code by Aaron Giles
9
10 ***************************************************************************/
11
12 #ifndef MAME_CPU_TMS34010_TMS34010_H
13 #define MAME_CPU_TMS34010_TMS34010_H
14
15 #pragma once
16
17
18 /* register indexes for get_reg and set_reg */
19 enum
20 {
21 TMS34010_PC,
22 TMS34010_SP,
23 TMS34010_ST,
24 TMS34010_A0,
25 TMS34010_A1,
26 TMS34010_A2,
27 TMS34010_A3,
28 TMS34010_A4,
29 TMS34010_A5,
30 TMS34010_A6,
31 TMS34010_A7,
32 TMS34010_A8,
33 TMS34010_A9,
34 TMS34010_A10,
35 TMS34010_A11,
36 TMS34010_A12,
37 TMS34010_A13,
38 TMS34010_A14,
39 TMS34010_B0,
40 TMS34010_B1,
41 TMS34010_B2,
42 TMS34010_B3,
43 TMS34010_B4,
44 TMS34010_B5,
45 TMS34010_B6,
46 TMS34010_B7,
47 TMS34010_B8,
48 TMS34010_B9,
49 TMS34010_B10,
50 TMS34010_B11,
51 TMS34010_B12,
52 TMS34010_B13,
53 TMS34010_B14
54 };
55
56
57 /***************************************************************************
58 INTERNAL I/O CONSTANTS
59 ***************************************************************************/
60
61 enum
62 {
63 REG_HESYNC = 0,
64 REG_HEBLNK,
65 REG_HSBLNK,
66 REG_HTOTAL,
67 REG_VESYNC,
68 REG_VEBLNK,
69 REG_VSBLNK,
70 REG_VTOTAL,
71 REG_DPYCTL,
72 REG_DPYSTRT,
73 REG_DPYINT,
74 REG_CONTROL,
75 REG_HSTDATA,
76 REG_HSTADRL,
77 REG_HSTADRH,
78 REG_HSTCTLL,
79
80 REG_HSTCTLH,
81 REG_INTENB,
82 REG_INTPEND,
83 REG_CONVSP,
84 REG_CONVDP,
85 REG_PSIZE,
86 REG_PMASK,
87 REG_UNK23,
88 REG_UNK24,
89 REG_UNK25,
90 REG_UNK26,
91 REG_DPYTAP,
92 REG_HCOUNT,
93 REG_VCOUNT,
94 REG_DPYADR,
95 REG_REFCNT
96 };
97
98 /* Interrupts that are generated by the processor internally */
99 #define TMS34010_INT1 0x0002 /* External Interrupt 1 */
100 #define TMS34010_INT2 0x0004 /* External Interrupt 2 */
101 #define TMS34010_HI 0x0200 /* Host Interrupt */
102 #define TMS34010_DI 0x0400 /* Display Interrupt */
103 #define TMS34010_WV 0x0800 /* Window Violation Interrupt */
104
105
106 #define TMS340X0_SCANLINE_IND16_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_ind16 &bitmap, int scanline, const tms340x0_device::display_params *params)
107 #define TMS340X0_SCANLINE_RGB32_CB_MEMBER(_name) void _name(screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const tms340x0_device::display_params *params)
108 #define TMS340X0_TO_SHIFTREG_CB_MEMBER(_name) void _name(offs_t address, uint16_t *shiftreg)
109 #define TMS340X0_FROM_SHIFTREG_CB_MEMBER(_name) void _name(offs_t address, uint16_t *shiftreg)
110
111
112 class tms340x0_device : public cpu_device,
113 public device_video_interface
114 {
115 public:
116 // Configuration structure
117 struct display_params
118 {
119 uint16_t vcount; /* most recent VCOUNT */
120 uint16_t veblnk, vsblnk; /* start/end of VBLANK */
121 uint16_t heblnk, hsblnk; /* start/end of HBLANK */
122 uint16_t rowaddr, coladdr; /* row/column addresses */
123 uint8_t yoffset; /* y offset from addresses */
124 uint8_t enabled; /* video enabled */
125 };
126
127 typedef device_delegate<void (screen_device &screen, bitmap_ind16 &bitmap, int scanline, const display_params *params)> scanline_ind16_cb_delegate;
128 typedef device_delegate<void (screen_device &screen, bitmap_rgb32 &bitmap, int scanline, const display_params *params)> scanline_rgb32_cb_delegate;
129 typedef device_delegate<void (offs_t address, uint16_t *shiftreg)> shiftreg_in_cb_delegate;
130 typedef device_delegate<void (offs_t address, uint16_t *shiftreg)> shiftreg_out_cb_delegate;
131
set_halt_on_reset(bool halt_on_reset)132 void set_halt_on_reset(bool halt_on_reset) { m_halt_on_reset = halt_on_reset; }
set_pixel_clock(uint32_t pixclock)133 void set_pixel_clock(uint32_t pixclock) { m_pixclock = pixclock; }
set_pixel_clock(const XTAL & xtal)134 void set_pixel_clock(const XTAL &xtal) { set_pixel_clock(xtal.value()); }
set_pixels_per_clock(int pixperclock)135 void set_pixels_per_clock(int pixperclock) { m_pixperclock = pixperclock; }
136
output_int()137 auto output_int() { return m_output_int_cb.bind(); }
ioreg_pre_write()138 auto ioreg_pre_write() { return m_ioreg_pre_write_cb.bind(); }
139
140 // Setter for ind16 scanline callback
141 template <typename... T>
set_scanline_ind16_callback(T &&...args)142 void set_scanline_ind16_callback(T &&... args)
143 {
144 m_scanline_ind16_cb.set(std::forward<T>(args)...);
145 }
146
147 // Setter for rgb32 scanline callback
148 template <typename... T>
set_scanline_rgb32_callback(T &&...args)149 void set_scanline_rgb32_callback(T &&... args)
150 {
151 m_scanline_rgb32_cb.set(std::forward<T>(args)...);
152 }
153
154 // Setter for shift register input callback
155 template <typename... T>
set_shiftreg_in_callback(T &&...args)156 void set_shiftreg_in_callback(T &&... args)
157 {
158 m_to_shiftreg_cb.set(std::forward<T>(args)...);
159 }
160
161 // Setters for shift register output callback
162 template <typename... T>
set_shiftreg_out_callback(T &&...args)163 void set_shiftreg_out_callback(T &&... args)
164 {
165 m_from_shiftreg_cb.set(std::forward<T>(args)...);
166 }
167
168 void get_display_params(display_params *params);
169
170 uint32_t tms340x0_ind16(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
171 uint32_t tms340x0_rgb32(screen_device &screen, bitmap_rgb32 &bitmap, const rectangle &cliprect);
172
173 virtual void io_register_w(offs_t offset, u16 data, u16 mem_mask = ~u16(0)) = 0;
174 virtual u16 io_register_r(offs_t offset) = 0;
175
176 void host_w(offs_t offset, u16 data, u16 mem_mask = ~u16(0));
177 u16 host_r(offs_t offset);
178
179 TIMER_CALLBACK_MEMBER(internal_interrupt_callback);
180 TIMER_CALLBACK_MEMBER(scanline_callback);
181
182 protected:
183 enum
184 {
185 REG020_VESYNC,
186 REG020_HESYNC,
187 REG020_VEBLNK,
188 REG020_HEBLNK,
189 REG020_VSBLNK,
190 REG020_HSBLNK,
191 REG020_VTOTAL,
192 REG020_HTOTAL,
193 REG020_DPYCTL, /* matches 010 */
194 REG020_DPYSTRT, /* matches 010 */
195 REG020_DPYINT, /* matches 010 */
196 REG020_CONTROL, /* matches 010 */
197 REG020_HSTDATA, /* matches 010 */
198 REG020_HSTADRL, /* matches 010 */
199 REG020_HSTADRH, /* matches 010 */
200 REG020_HSTCTLL, /* matches 010 */
201
202 REG020_HSTCTLH, /* matches 010 */
203 REG020_INTENB, /* matches 010 */
204 REG020_INTPEND, /* matches 010 */
205 REG020_CONVSP, /* matches 010 */
206 REG020_CONVDP, /* matches 010 */
207 REG020_PSIZE, /* matches 010 */
208 REG020_PMASKL,
209 REG020_PMASKH,
210 REG020_CONVMP,
211 REG020_CONTROL2,
212 REG020_CONFIG,
213 REG020_DPYTAP, /* matches 010 */
214 REG020_VCOUNT,
215 REG020_HCOUNT,
216 REG020_DPYADR, /* matches 010 */
217 REG020_REFADR,
218
219 REG020_DPYSTL,
220 REG020_DPYSTH,
221 REG020_DPYNXL,
222 REG020_DPYNXH,
223 REG020_DINCL,
224 REG020_DINCH,
225 REG020_RES0,
226 REG020_HESERR,
227 REG020_RES1,
228 REG020_RES2,
229 REG020_RES3,
230 REG020_RES4,
231 REG020_SCOUNT,
232 REG020_BSFLTST,
233 REG020_DPYMSK,
234 REG020_RES5,
235
236 REG020_SETVCNT,
237 REG020_SETHCNT,
238 REG020_BSFLTDL,
239 REG020_BSFLTDH,
240 REG020_RES6,
241 REG020_RES7,
242 REG020_RES8,
243 REG020_RES9,
244 REG020_IHOST1L,
245 REG020_IHOST1H,
246 REG020_IHOST2L,
247 REG020_IHOST2H,
248 REG020_IHOST3L,
249 REG020_IHOST3H,
250 REG020_IHOST4L,
251 REG020_IHOST4H
252 };
253
254 // construction/destruction
255 tms340x0_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock, address_map_constructor internal_regs_map, bool is_34020);
256
257 // device-level overrides
258 virtual void device_start() override;
259 virtual void device_reset() override;
260 virtual void device_post_load() override;
261
262 // device_execute_interface overrides
execute_min_cycles()263 virtual uint32_t execute_min_cycles() const noexcept override { return 1; }
execute_max_cycles()264 virtual uint32_t execute_max_cycles() const noexcept override { return 10000; }
execute_input_lines()265 virtual uint32_t execute_input_lines() const noexcept override { return 2; }
266 virtual void execute_run() override;
267 virtual void execute_set_input(int inputnum, int state) override;
268
269 // device_memory_interface overrides
270 virtual space_config_vector memory_space_config() const override;
271
272 // device_state_interface overrides
273 virtual void state_string_export(const device_state_entry &entry, std::string &str) const override;
274
275 typedef void (tms340x0_device::*pixel_write_func)(offs_t offset, uint32_t data);
276 typedef uint32_t (tms340x0_device::*pixel_read_func)(offs_t offset);
277 typedef uint32_t (tms340x0_device::*raster_op_func)(uint32_t newpix, uint32_t oldpix);
278 typedef void (tms340x0_device::*wfield_func)(offs_t offset, uint32_t data);
279 typedef uint32_t (tms340x0_device::*rfield_func)(offs_t offset);
280 typedef void (tms340x0_device::*opcode_func)(uint16_t op);
281 typedef uint32_t (tms340x0_device::*pixel_op_func)(uint32_t, uint32_t, uint32_t);
282 typedef void (tms340x0_device::*pixblt_op_func)(int, int);
283 typedef void (tms340x0_device::*pixblt_b_op_func)(int);
284 typedef void (tms340x0_device::*word_write_func)(offs_t offset, uint16_t data);
285 typedef uint16_t (tms340x0_device::*word_read_func)(offs_t offset);
286
287 static const wfield_func s_wfield_functions[32];
288 static const rfield_func s_rfield_functions[64];
289 static const opcode_func s_opcode_table[65536 >> 4];
290 static const pixel_op_func s_pixel_op_table[32];
291 static const uint8_t s_pixel_op_timing_table[33];
292 static const pixblt_op_func s_pixblt_op_table[];
293 static const pixblt_op_func s_pixblt_r_op_table[];
294 static const pixblt_b_op_func s_pixblt_b_op_table[];
295 static const pixblt_b_op_func s_fill_op_table[];
296 static const pixel_write_func s_pixel_write_ops[4][6];
297 static const pixel_read_func s_pixel_read_ops[6];
298 static const raster_op_func s_raster_ops[32];
299
300 address_space_config m_program_config;
301
302 uint32_t m_pc;
303 uint32_t m_ppc;
304 uint32_t m_st;
305 pixel_write_func m_pixel_write;
306 pixel_read_func m_pixel_read;
307 raster_op_func m_raster_op;
308 pixel_op_func m_pixel_op;
309 uint32_t m_pixel_op_timing;
310 uint32_t m_convsp;
311 uint32_t m_convdp;
312 uint32_t m_convmp;
313 int32_t m_gfxcycles;
314 uint8_t m_pixelshift;
315 const bool m_is_34020;
316 bool m_reset_deferred;
317 bool m_halt_on_reset; /* /HCS pin, which determines HALT state after reset */
318 uint8_t m_hblank_stable;
319 uint8_t m_external_host_access;
320 uint8_t m_executing;
321
322 uint32_t m_pixclock; /* the pixel clock (0 means don't adjust screen size) */
323 int m_pixperclock; /* pixels per clock */
324 emu_timer *m_scantimer;
325 int m_icount;
326
327 scanline_ind16_cb_delegate m_scanline_ind16_cb;
328 scanline_rgb32_cb_delegate m_scanline_rgb32_cb;
329 devcb_write_line m_output_int_cb; /* output interrupt callback */
330 devcb_write16 m_ioreg_pre_write_cb;
331 shiftreg_in_cb_delegate m_to_shiftreg_cb; /* shift register write */
332 shiftreg_out_cb_delegate m_from_shiftreg_cb; /* shift register read */
333
334 struct XY
335 {
336 #ifdef LSB_FIRST
337 int16_t x;
338 int16_t y;
339 #else
340 int16_t y;
341 int16_t x;
342 #endif
343 };
344
345 /* A registers 0-15 map to regs[0]-regs[15] */
346 /* B registers 0-15 map to regs[30]-regs[15] */
347 union
348 {
349 int32_t reg;
350 XY xy;
351 } m_regs[31];
352
353 uint16_t m_IOregs[64];
354 uint16_t m_shiftreg[(8 * 512 * sizeof(uint16_t))/2];
355
356
357 virtual uint32_t TMS34010_RDMEM_WORD(offs_t A) = 0;
358 virtual uint32_t TMS34010_RDMEM_DWORD(offs_t A) = 0;
359 virtual void TMS34010_WRMEM_WORD(offs_t A, uint32_t V) = 0;
360 virtual void TMS34010_WRMEM_DWORD(offs_t A, uint32_t V) = 0;
361 void SET_ST(uint32_t st);
362 void RESET_ST();
363 virtual uint32_t ROPCODE() = 0;
364 virtual int16_t PARAM_WORD() = 0;
365 virtual int32_t PARAM_LONG() = 0;
366 virtual int16_t PARAM_WORD_NO_INC() = 0;
367 virtual int32_t PARAM_LONG_NO_INC() = 0;
368 uint32_t RBYTE(offs_t offset);
369 void WBYTE(offs_t offset, uint32_t data);
370 uint32_t RLONG(offs_t offset);
371 void WLONG(offs_t offset, uint32_t data);
372 void PUSH(uint32_t data);
373 int32_t POP();
374 uint32_t read_pixel_1(offs_t offset);
375 uint32_t read_pixel_2(offs_t offset);
376 uint32_t read_pixel_4(offs_t offset);
377 uint32_t read_pixel_8(offs_t offset);
378 uint32_t read_pixel_16(offs_t offset);
379 uint32_t read_pixel_32(offs_t offset);
380 uint32_t read_pixel_shiftreg(offs_t offset);
381 void write_pixel_1(offs_t offset, uint32_t data);
382 void write_pixel_2(offs_t offset, uint32_t data);
383 void write_pixel_4(offs_t offset, uint32_t data);
384 void write_pixel_8(offs_t offset, uint32_t data);
385 void write_pixel_16(offs_t offset, uint32_t data);
386 void write_pixel_32(offs_t offset, uint32_t data);
387 void write_pixel_t_1(offs_t offset, uint32_t data);
388 void write_pixel_t_2(offs_t offset, uint32_t data);
389 void write_pixel_t_4(offs_t offset, uint32_t data);
390 void write_pixel_t_8(offs_t offset, uint32_t data);
391 void write_pixel_t_16(offs_t offset, uint32_t data);
392 void write_pixel_t_32(offs_t offset, uint32_t data);
393 void write_pixel_r_1(offs_t offset, uint32_t data);
394 void write_pixel_r_2(offs_t offset, uint32_t data);
395 void write_pixel_r_4(offs_t offset, uint32_t data);
396 void write_pixel_r_8(offs_t offset, uint32_t data);
397 void write_pixel_r_16(offs_t offset, uint32_t data);
398 void write_pixel_r_32(offs_t offset, uint32_t data);
399 void write_pixel_r_t_1(offs_t offset, uint32_t data);
400 void write_pixel_r_t_2(offs_t offset, uint32_t data);
401 void write_pixel_r_t_4(offs_t offset, uint32_t data);
402 void write_pixel_r_t_8(offs_t offset, uint32_t data);
403 void write_pixel_r_t_16(offs_t offset, uint32_t data);
404 void write_pixel_r_t_32(offs_t offset, uint32_t data);
405 void write_pixel_shiftreg(offs_t offset, uint32_t data);
406 uint32_t raster_op_1(uint32_t newpix, uint32_t oldpix);
407 uint32_t raster_op_2(uint32_t newpix, uint32_t oldpix);
408 uint32_t raster_op_3(uint32_t newpix, uint32_t oldpix);
409 uint32_t raster_op_4(uint32_t newpix, uint32_t oldpix);
410 uint32_t raster_op_5(uint32_t newpix, uint32_t oldpix);
411 uint32_t raster_op_6(uint32_t newpix, uint32_t oldpix);
412 uint32_t raster_op_7(uint32_t newpix, uint32_t oldpix);
413 uint32_t raster_op_8(uint32_t newpix, uint32_t oldpix);
414 uint32_t raster_op_9(uint32_t newpix, uint32_t oldpix);
415 uint32_t raster_op_10(uint32_t newpix, uint32_t oldpix);
416 uint32_t raster_op_11(uint32_t newpix, uint32_t oldpix);
417 uint32_t raster_op_12(uint32_t newpix, uint32_t oldpix);
418 uint32_t raster_op_13(uint32_t newpix, uint32_t oldpix);
419 uint32_t raster_op_14(uint32_t newpix, uint32_t oldpix);
420 uint32_t raster_op_15(uint32_t newpix, uint32_t oldpix);
421 uint32_t raster_op_16(uint32_t newpix, uint32_t oldpix);
422 uint32_t raster_op_17(uint32_t newpix, uint32_t oldpix);
423 uint32_t raster_op_18(uint32_t newpix, uint32_t oldpix);
424 uint32_t raster_op_19(uint32_t newpix, uint32_t oldpix);
425 uint32_t raster_op_20(uint32_t newpix, uint32_t oldpix);
426 uint32_t raster_op_21(uint32_t newpix, uint32_t oldpix);
427 void wfield_01(offs_t offset, uint32_t data);
428 void wfield_02(offs_t offset, uint32_t data);
429 void wfield_03(offs_t offset, uint32_t data);
430 void wfield_04(offs_t offset, uint32_t data);
431 void wfield_05(offs_t offset, uint32_t data);
432 void wfield_06(offs_t offset, uint32_t data);
433 void wfield_07(offs_t offset, uint32_t data);
434 void wfield_08(offs_t offset, uint32_t data);
435 void wfield_09(offs_t offset, uint32_t data);
436 void wfield_10(offs_t offset, uint32_t data);
437 void wfield_11(offs_t offset, uint32_t data);
438 void wfield_12(offs_t offset, uint32_t data);
439 void wfield_13(offs_t offset, uint32_t data);
440 void wfield_14(offs_t offset, uint32_t data);
441 void wfield_15(offs_t offset, uint32_t data);
442 void wfield_16(offs_t offset, uint32_t data);
443 void wfield_17(offs_t offset, uint32_t data);
444 void wfield_18(offs_t offset, uint32_t data);
445 void wfield_19(offs_t offset, uint32_t data);
446 void wfield_20(offs_t offset, uint32_t data);
447 void wfield_21(offs_t offset, uint32_t data);
448 void wfield_22(offs_t offset, uint32_t data);
449 void wfield_23(offs_t offset, uint32_t data);
450 void wfield_24(offs_t offset, uint32_t data);
451 void wfield_25(offs_t offset, uint32_t data);
452 void wfield_26(offs_t offset, uint32_t data);
453 void wfield_27(offs_t offset, uint32_t data);
454 void wfield_28(offs_t offset, uint32_t data);
455 void wfield_29(offs_t offset, uint32_t data);
456 void wfield_30(offs_t offset, uint32_t data);
457 void wfield_31(offs_t offset, uint32_t data);
458 void wfield_32(offs_t offset, uint32_t data);
459 uint32_t rfield_z_01(offs_t offset);
460 uint32_t rfield_z_02(offs_t offset);
461 uint32_t rfield_z_03(offs_t offset);
462 uint32_t rfield_z_04(offs_t offset);
463 uint32_t rfield_z_05(offs_t offset);
464 uint32_t rfield_z_06(offs_t offset);
465 uint32_t rfield_z_07(offs_t offset);
466 uint32_t rfield_z_08(offs_t offset);
467 uint32_t rfield_z_09(offs_t offset);
468 uint32_t rfield_z_10(offs_t offset);
469 uint32_t rfield_z_11(offs_t offset);
470 uint32_t rfield_z_12(offs_t offset);
471 uint32_t rfield_z_13(offs_t offset);
472 uint32_t rfield_z_14(offs_t offset);
473 uint32_t rfield_z_15(offs_t offset);
474 uint32_t rfield_z_16(offs_t offset);
475 uint32_t rfield_z_17(offs_t offset);
476 uint32_t rfield_z_18(offs_t offset);
477 uint32_t rfield_z_19(offs_t offset);
478 uint32_t rfield_z_20(offs_t offset);
479 uint32_t rfield_z_21(offs_t offset);
480 uint32_t rfield_z_22(offs_t offset);
481 uint32_t rfield_z_23(offs_t offset);
482 uint32_t rfield_z_24(offs_t offset);
483 uint32_t rfield_z_25(offs_t offset);
484 uint32_t rfield_z_26(offs_t offset);
485 uint32_t rfield_z_27(offs_t offset);
486 uint32_t rfield_z_28(offs_t offset);
487 uint32_t rfield_z_29(offs_t offset);
488 uint32_t rfield_z_30(offs_t offset);
489 uint32_t rfield_z_31(offs_t offset);
490 uint32_t rfield_32(offs_t offset);
491 uint32_t rfield_s_01(offs_t offset);
492 uint32_t rfield_s_02(offs_t offset);
493 uint32_t rfield_s_03(offs_t offset);
494 uint32_t rfield_s_04(offs_t offset);
495 uint32_t rfield_s_05(offs_t offset);
496 uint32_t rfield_s_06(offs_t offset);
497 uint32_t rfield_s_07(offs_t offset);
498 uint32_t rfield_s_08(offs_t offset);
499 uint32_t rfield_s_09(offs_t offset);
500 uint32_t rfield_s_10(offs_t offset);
501 uint32_t rfield_s_11(offs_t offset);
502 uint32_t rfield_s_12(offs_t offset);
503 uint32_t rfield_s_13(offs_t offset);
504 uint32_t rfield_s_14(offs_t offset);
505 uint32_t rfield_s_15(offs_t offset);
506 uint32_t rfield_s_16(offs_t offset);
507 uint32_t rfield_s_17(offs_t offset);
508 uint32_t rfield_s_18(offs_t offset);
509 uint32_t rfield_s_19(offs_t offset);
510 uint32_t rfield_s_20(offs_t offset);
511 uint32_t rfield_s_21(offs_t offset);
512 uint32_t rfield_s_22(offs_t offset);
513 uint32_t rfield_s_23(offs_t offset);
514 uint32_t rfield_s_24(offs_t offset);
515 uint32_t rfield_s_25(offs_t offset);
516 uint32_t rfield_s_26(offs_t offset);
517 uint32_t rfield_s_27(offs_t offset);
518 uint32_t rfield_s_28(offs_t offset);
519 uint32_t rfield_s_29(offs_t offset);
520 uint32_t rfield_s_30(offs_t offset);
521 uint32_t rfield_s_31(offs_t offset);
522 void unimpl(uint16_t op);
523 void pixblt_l_l(uint16_t op); /* 0f00 */
524 void pixblt_l_xy(uint16_t op); /* 0f20 */
525 void pixblt_xy_l(uint16_t op); /* 0f40 */
526 void pixblt_xy_xy(uint16_t op); /* 0f60 */
527 void pixblt_b_l(uint16_t op); /* 0f80 */
528 void pixblt_b_xy(uint16_t op); /* 0fa0 */
529 void fill_l(uint16_t op); /* 0fc0 */
530 void fill_xy(uint16_t op); /* 0fe0 */
531 void line(uint16_t op); /* df10/df90 */
532 void add_xy_a(uint16_t op); /* e000/e100 */
533 void add_xy_b(uint16_t op); /* e000/e100 */
534 void sub_xy_a(uint16_t op); /* e200/e300 */
535 void sub_xy_b(uint16_t op); /* e200/e300 */
536 void cmp_xy_a(uint16_t op); /* e400/e500 */
537 void cmp_xy_b(uint16_t op); /* e400/e500 */
538 void cpw_a(uint16_t op); /* e600/e700 */
539 void cpw_b(uint16_t op); /* e600/e700 */
540 void cvxyl_a(uint16_t op); /* e800/e900 */
541 void cvxyl_b(uint16_t op); /* e800/e900 */
542 void movx_a(uint16_t op); /* ec00/ed00 */
543 void movx_b(uint16_t op); /* ec00/ed00 */
544 void movy_a(uint16_t op); /* ee00/ef00 */
545 void movy_b(uint16_t op); /* ee00/ef00 */
546 void pixt_ri_a(uint16_t op); /* f800/f900 */
547 void pixt_ri_b(uint16_t op); /* f800/f900 */
548 void pixt_rixy_a(uint16_t op); /* f000/f100 */
549 void pixt_rixy_b(uint16_t op); /* f000/f100 */
550 void pixt_ir_a(uint16_t op); /* fa00/fb00 */
551 void pixt_ir_b(uint16_t op); /* fa00/fb00 */
552 void pixt_ii_a(uint16_t op); /* fc00/fd00 */
553 void pixt_ii_b(uint16_t op); /* fc00/fd00 */
554 void pixt_ixyr_a(uint16_t op); /* f200/f300 */
555 void pixt_ixyr_b(uint16_t op); /* f200/f300 */
556 void pixt_ixyixy_a(uint16_t op); /* f400/f500 */
557 void pixt_ixyixy_b(uint16_t op); /* f400/f500 */
558 void drav_a(uint16_t op); /* f600/f700 */
559 void drav_b(uint16_t op); /* f600/f700 */
560 void abs_a(uint16_t op); /* 0380 */
561 void abs_b(uint16_t op); /* 0390 */
562 void add_a(uint16_t op); /* 4000/4100 */
563 void add_b(uint16_t op); /* 4000/4100 */
564 void addc_a(uint16_t op); /* 4200/4200 */
565 void addc_b(uint16_t op); /* 4200/4200 */
566 void addi_w_a(uint16_t op); /* 0b00 */
567 void addi_w_b(uint16_t op); /* 0b10 */
568 void addi_l_a(uint16_t op); /* 0b20 */
569 void addi_l_b(uint16_t op); /* 0b30 */
570 void addk_a(uint16_t op); /* 1000-1300 */
571 void addk_b(uint16_t op); /* 1000-1300 */
572 void and_a(uint16_t op); /* 5000/5100 */
573 void and_b(uint16_t op); /* 5000/5100 */
574 void andi_a(uint16_t op); /* 0b80 */
575 void andi_b(uint16_t op); /* 0b90 */
576 void andn_a(uint16_t op); /* 5200-5300 */
577 void andn_b(uint16_t op); /* 5200-5300 */
578 void btst_k_a(uint16_t op); /* 1c00-1f00 */
579 void btst_k_b(uint16_t op); /* 1c00-1f00 */
580 void btst_r_a(uint16_t op); /* 4a00-4b00 */
581 void btst_r_b(uint16_t op); /* 4a00-4b00 */
582 void clrc(uint16_t op); /* 0320 */
583 void cmp_a(uint16_t op); /* 4800/4900 */
584 void cmp_b(uint16_t op); /* 4800/4900 */
585 void cmpi_w_a(uint16_t op); /* 0b40 */
586 void cmpi_w_b(uint16_t op); /* 0b50 */
587 void cmpi_l_a(uint16_t op); /* 0b60 */
588 void cmpi_l_b(uint16_t op); /* 0b70 */
589 void dint(uint16_t op);
590 void divs_a(uint16_t op); /* 5800/5900 */
591 void divs_b(uint16_t op); /* 5800/5900 */
592 void divu_a(uint16_t op); /* 5a00/5b00 */
593 void divu_b(uint16_t op); /* 5a00/5b00 */
594 void eint(uint16_t op);
595 void exgf0_a(uint16_t op); /* d500 */
596 void exgf0_b(uint16_t op); /* d510 */
597 void exgf1_a(uint16_t op); /* d700 */
598 void exgf1_b(uint16_t op); /* d710 */
599 void lmo_a(uint16_t op); /* 6a00/6b00 */
600 void lmo_b(uint16_t op); /* 6a00/6b00 */
601 void mmfm_a(uint16_t op); /* 09a0 */
602 void mmfm_b(uint16_t op); /* 09b0 */
603 void mmtm_a(uint16_t op); /* 0980 */
604 void mmtm_b(uint16_t op); /* 0990 */
605 void mods_a(uint16_t op); /* 6c00/6d00 */
606 void mods_b(uint16_t op); /* 6c00/6d00 */
607 void modu_a(uint16_t op); /* 6e00/6f00 */
608 void modu_b(uint16_t op); /* 6e00/6f00 */
609 void mpys_a(uint16_t op); /* 5c00/5d00 */
610 void mpys_b(uint16_t op); /* 5c00/5d00 */
611 void mpyu_a(uint16_t op); /* 5e00/5e00 */
612 void mpyu_b(uint16_t op); /* 5e00/5f00 */
613 void neg_a(uint16_t op); /* 03a0 */
614 void neg_b(uint16_t op); /* 03b0 */
615 void negb_a(uint16_t op); /* 03c0 */
616 void negb_b(uint16_t op); /* 03d0 */
617 void nop(uint16_t op); /* 0300 */
618 void not_a(uint16_t op); /* 03e0 */
619 void not_b(uint16_t op); /* 03f0 */
620 void or_a(uint16_t op); /* 5400-5500 */
621 void or_b(uint16_t op); /* 5400-5500 */
622 void ori_a(uint16_t op); /* 0ba0 */
623 void ori_b(uint16_t op); /* 0bb0 */
624 void rl_k_a(uint16_t op); /* 3000-3300 */
625 void rl_k_b(uint16_t op); /* 3000-3300 */
626 void rl_r_a(uint16_t op); /* 6800/6900 */
627 void rl_r_b(uint16_t op); /* 6800/6900 */
628 void setc(uint16_t op); /* 0de0 */
629 void setf0(uint16_t op);
630 void setf1(uint16_t op);
631 void sext0_a(uint16_t op); /* 0500 */
632 void sext0_b(uint16_t op); /* 0510 */
633 void sext1_a(uint16_t op); /* 0700 */
634 void sext1_b(uint16_t op); /* 0710 */
635 void sla_k_a(uint16_t op); /* 2000-2300 */
636 void sla_k_b(uint16_t op); /* 2000-2300 */
637 void sla_r_a(uint16_t op); /* 6000/6100 */
638 void sla_r_b(uint16_t op); /* 6000/6100 */
639 void sll_k_a(uint16_t op); /* 2400-2700 */
640 void sll_k_b(uint16_t op); /* 2400-2700 */
641 void sll_r_a(uint16_t op); /* 6200/6300 */
642 void sll_r_b(uint16_t op); /* 6200/6300 */
643 void sra_k_a(uint16_t op); /* 2800-2b00 */
644 void sra_k_b(uint16_t op); /* 2800-2b00 */
645 void sra_r_a(uint16_t op); /* 6400/6500 */
646 void sra_r_b(uint16_t op); /* 6400/6500 */
647 void srl_k_a(uint16_t op); /* 2c00-2f00 */
648 void srl_k_b(uint16_t op); /* 2c00-2f00 */
649 void srl_r_a(uint16_t op); /* 6600/6700 */
650 void srl_r_b(uint16_t op); /* 6600/6700 */
651 void sub_a(uint16_t op); /* 4400/4500 */
652 void sub_b(uint16_t op); /* 4400/4500 */
653 void subb_a(uint16_t op); /* 4600/4700 */
654 void subb_b(uint16_t op); /* 4600/4700 */
655 void subi_w_a(uint16_t op); /* 0be0 */
656 void subi_w_b(uint16_t op); /* 0bf0 */
657 void subi_l_a(uint16_t op); /* 0d00 */
658 void subi_l_b(uint16_t op); /* 0d10 */
659 void subk_a(uint16_t op); /* 1400-1700 */
660 void subk_b(uint16_t op); /* 1400-1700 */
661 void xor_a(uint16_t op); /* 5600-5700 */
662 void xor_b(uint16_t op); /* 5600-5700 */
663 void xori_a(uint16_t op); /* 0bc0 */
664 void xori_b(uint16_t op); /* 0bd0 */
665 void zext0_a(uint16_t op); /* 0520 */
666 void zext0_b(uint16_t op); /* 0530 */
667 void zext1_a(uint16_t op); /* 0720 */
668 void zext1_b(uint16_t op); /* 0720 */
669 void movi_w_a(uint16_t op);
670 void movi_w_b(uint16_t op);
671 void movi_l_a(uint16_t op);
672 void movi_l_b(uint16_t op);
673 void movk_a(uint16_t op);
674 void movk_b(uint16_t op);
675 void movb_rn_a(uint16_t op); /* 8c00-8d00 */
676 void movb_rn_b(uint16_t op); /* 8c00-8d00 */
677 void movb_nr_a(uint16_t op); /* 8e00-8f00 */
678 void movb_nr_b(uint16_t op); /* 8e00-8f00 */
679 void movb_nn_a(uint16_t op); /* 9c00-9d00 */
680 void movb_nn_b(uint16_t op); /* 9c00-9d00 */
681 void movb_r_no_a(uint16_t op); /* ac00-ad00 */
682 void movb_r_no_b(uint16_t op); /* ac00-ad00 */
683 void movb_no_r_a(uint16_t op); /* ae00-af00 */
684 void movb_no_r_b(uint16_t op); /* ae00-af00 */
685 void movb_no_no_a(uint16_t op); /* bc00-bd00 */
686 void movb_no_no_b(uint16_t op); /* bc00-bd00 */
687 void movb_ra_a(uint16_t op);
688 void movb_ra_b(uint16_t op);
689 void movb_ar_a(uint16_t op);
690 void movb_ar_b(uint16_t op);
691 void movb_aa(uint16_t op);
692 void move_rr_a(uint16_t op); /* 4c00/d00 */
693 void move_rr_b(uint16_t op); /* 4c00/d00 */
694 void move_rr_ax(uint16_t op); /* 4e00/f00 */
695 void move_rr_bx(uint16_t op); /* 4e00/f00 */
696 void move0_rn_a(uint16_t op); /* 8000 */
697 void move0_rn_b(uint16_t op);
698 void move1_rn_a(uint16_t op);
699 void move1_rn_b(uint16_t op);
700 void move0_r_dn_a(uint16_t op); /* a000 */
701 void move0_r_dn_b(uint16_t op);
702 void move1_r_dn_a(uint16_t op);
703 void move1_r_dn_b(uint16_t op);
704 void move0_r_ni_a(uint16_t op); /* 9000 */
705 void move0_r_ni_b(uint16_t op);
706 void move1_r_ni_a(uint16_t op);
707 void move1_r_ni_b(uint16_t op);
708 void move0_nr_a(uint16_t op); /* 8400-500 */
709 void move0_nr_b(uint16_t op); /* 8400-500 */
710 void move1_nr_a(uint16_t op); /* 8600-700 */
711 void move1_nr_b(uint16_t op); /* 8600-700 */
712 void move0_dn_r_a(uint16_t op); /* A400-500 */
713 void move0_dn_r_b(uint16_t op); /* A400-500 */
714 void move1_dn_r_a(uint16_t op); /* A600-700 */
715 void move1_dn_r_b(uint16_t op); /* A600-700 */
716 void move0_ni_r_a(uint16_t op); /* 9400-500 */
717 void move0_ni_r_b(uint16_t op); /* 9400-500 */
718 void move1_ni_r_a(uint16_t op); /* 9600-700 */
719 void move1_ni_r_b(uint16_t op); /* 9600-700 */
720 void move0_nn_a(uint16_t op); /* 8800 */
721 void move0_nn_b(uint16_t op);
722 void move1_nn_a(uint16_t op);
723 void move1_nn_b(uint16_t op);
724 void move0_dn_dn_a(uint16_t op); /* a800 */
725 void move0_dn_dn_b(uint16_t op);
726 void move1_dn_dn_a(uint16_t op);
727 void move1_dn_dn_b(uint16_t op);
728 void move0_ni_ni_a(uint16_t op); /* 9800 */
729 void move0_ni_ni_b(uint16_t op);
730 void move1_ni_ni_a(uint16_t op);
731 void move1_ni_ni_b(uint16_t op);
732 void move0_r_no_a(uint16_t op); /* b000 */
733 void move0_r_no_b(uint16_t op);
734 void move1_r_no_a(uint16_t op);
735 void move1_r_no_b(uint16_t op);
736 void move0_no_r_a(uint16_t op); /* b400 */
737 void move0_no_r_b(uint16_t op);
738 void move1_no_r_a(uint16_t op);
739 void move1_no_r_b(uint16_t op);
740 void move0_no_ni_a(uint16_t op); /* d000 */
741 void move0_no_ni_b(uint16_t op);
742 void move1_no_ni_a(uint16_t op);
743 void move1_no_ni_b(uint16_t op);
744 void move0_no_no_a(uint16_t op); /* b800 */
745 void move0_no_no_b(uint16_t op);
746 void move1_no_no_a(uint16_t op);
747 void move1_no_no_b(uint16_t op);
748 void move0_ra_a(uint16_t op);
749 void move0_ra_b(uint16_t op);
750 void move1_ra_a(uint16_t op);
751 void move1_ra_b(uint16_t op);
752 void move0_ar_a(uint16_t op);
753 void move0_ar_b(uint16_t op);
754 void move1_ar_a(uint16_t op);
755 void move1_ar_b(uint16_t op);
756 void move0_a_ni_a(uint16_t op); /* d400 */
757 void move0_a_ni_b(uint16_t op); /* d410 */
758 void move1_a_ni_a(uint16_t op); /* d600 */
759 void move1_a_ni_b(uint16_t op); /* d610 */
760 void move0_aa(uint16_t op); /* 05c0 */
761 void move1_aa(uint16_t op); /* 07c0 */
762 void call_a(uint16_t op); /* 0920 */
763 void call_b(uint16_t op); /* 0930 */
764 void callr(uint16_t op); /* 0d3f */
765 void calla(uint16_t op); /* 0d5f */
766 void dsj_a(uint16_t op); /* 0d80 */
767 void dsj_b(uint16_t op); /* 0d90 */
768 void dsjeq_a(uint16_t op); /* 0da0 */
769 void dsjeq_b(uint16_t op); /* 0db0 */
770 void dsjne_a(uint16_t op); /* 0dc0 */
771 void dsjne_b(uint16_t op); /* 0dd0 */
772 void dsjs_a(uint16_t op);
773 void dsjs_b(uint16_t op);
774 void emu(uint16_t op); /* 0100 */
775 void exgpc_a(uint16_t op); /* 0120 */
776 void exgpc_b(uint16_t op); /* 0130 */
777 void getpc_a(uint16_t op); /* 0140 */
778 void getpc_b(uint16_t op); /* 0150 */
779 void getst_a(uint16_t op); /* 0180 */
780 void getst_b(uint16_t op); /* 0190 */
781 void j_UC_0(uint16_t op);
782 void j_UC_8(uint16_t op);
783 void j_UC_x(uint16_t op);
784 void j_P_0(uint16_t op);
785 void j_P_8(uint16_t op);
786 void j_P_x(uint16_t op);
787 void j_LS_0(uint16_t op);
788 void j_LS_8(uint16_t op);
789 void j_LS_x(uint16_t op);
790 void j_HI_0(uint16_t op);
791 void j_HI_8(uint16_t op);
792 void j_HI_x(uint16_t op);
793 void j_LT_0(uint16_t op);
794 void j_LT_8(uint16_t op);
795 void j_LT_x(uint16_t op);
796 void j_GE_0(uint16_t op);
797 void j_GE_8(uint16_t op);
798 void j_GE_x(uint16_t op);
799 void j_LE_0(uint16_t op);
800 void j_LE_8(uint16_t op);
801 void j_LE_x(uint16_t op);
802 void j_GT_0(uint16_t op);
803 void j_GT_8(uint16_t op);
804 void j_GT_x(uint16_t op);
805 void j_C_0(uint16_t op);
806 void j_C_8(uint16_t op);
807 void j_C_x(uint16_t op);
808 void j_NC_0(uint16_t op);
809 void j_NC_8(uint16_t op);
810 void j_NC_x(uint16_t op);
811 void j_EQ_0(uint16_t op);
812 void j_EQ_8(uint16_t op);
813 void j_EQ_x(uint16_t op);
814 void j_NE_0(uint16_t op);
815 void j_NE_8(uint16_t op);
816 void j_NE_x(uint16_t op);
817 void j_V_0(uint16_t op);
818 void j_V_8(uint16_t op);
819 void j_V_x(uint16_t op);
820 void j_NV_0(uint16_t op);
821 void j_NV_8(uint16_t op);
822 void j_NV_x(uint16_t op);
823 void j_N_0(uint16_t op);
824 void j_N_8(uint16_t op);
825 void j_N_x(uint16_t op);
826 void j_NN_0(uint16_t op);
827 void j_NN_8(uint16_t op);
828 void j_NN_x(uint16_t op);
829 void jump_a(uint16_t op); /* 0160 */
830 void jump_b(uint16_t op); /* 0170 */
831 void popst(uint16_t op); /* 01c0 */
832 void pushst(uint16_t op); /* 01e0 */
833 void putst_a(uint16_t op); /* 01a0 */
834 void putst_b(uint16_t op); /* 01b0 */
835 void reti(uint16_t op); /* 0940 */
836 void rets(uint16_t op); /* 0960/70 */
837 void rev_a(uint16_t op); /* 0020 */
838 void rev_b(uint16_t op); /* 0030 */
839 void trap(uint16_t op); /* 0900/10 */
840 void addxyi_a(uint16_t op);
841 void addxyi_b(uint16_t op);
842 void blmove(uint16_t op);
843 void cexec_l(uint16_t op);
844 void cexec_s(uint16_t op);
845 void clip(uint16_t op);
846 void cmovcg_a(uint16_t op);
847 void cmovcg_b(uint16_t op);
848 void cmovcm_f(uint16_t op);
849 void cmovcm_b(uint16_t op);
850 void cmovgc_a(uint16_t op);
851 void cmovgc_b(uint16_t op);
852 void cmovgc_a_s(uint16_t op);
853 void cmovgc_b_s(uint16_t op);
854 void cmovmc_f(uint16_t op);
855 void cmovmc_f_va(uint16_t op);
856 void cmovmc_f_vb(uint16_t op);
857 void cmovmc_b(uint16_t op);
858 void cmp_k_a(uint16_t op);
859 void cmp_k_b(uint16_t op);
860 void cvdxyl_a(uint16_t op);
861 void cvdxyl_b(uint16_t op);
862 void cvmxyl_a(uint16_t op);
863 void cvmxyl_b(uint16_t op);
864 void cvsxyl_a(uint16_t op);
865 void cvsxyl_b(uint16_t op);
866 void exgps_a(uint16_t op);
867 void exgps_b(uint16_t op);
868 void fline(uint16_t op);
869 void fpixeq(uint16_t op);
870 void fpixne(uint16_t op);
871 void getps_a(uint16_t op);
872 void getps_b(uint16_t op);
873 void idle(uint16_t op);
874 void linit(uint16_t op);
875 void mwait(uint16_t op);
876 void pfill_xy(uint16_t op);
877 void pixblt_l_m_l(uint16_t op);
878 void retm(uint16_t op);
879 void rmo_a(uint16_t op);
880 void rmo_b(uint16_t op);
881 void rpix_a(uint16_t op);
882 void rpix_b(uint16_t op);
883 void setcdp(uint16_t op);
884 void setcmp(uint16_t op);
885 void setcsp(uint16_t op);
886 void swapf_a(uint16_t op);
887 void swapf_b(uint16_t op);
888 void tfill_xy(uint16_t op);
889 void trapl(uint16_t op);
890 void vblt_b_l(uint16_t op);
891 void vfill_l(uint16_t op);
892 void vlcol(uint16_t op);
893 int apply_window(const char *inst_name,int srcbpp, uint32_t *srcaddr, XY *dst, int *dx, int *dy);
894 int compute_fill_cycles(int left_partials, int right_partials, int full_words, int op_timing);
895 int compute_pixblt_cycles(int left_partials, int right_partials, int full_words, int op_timing);
896 int compute_pixblt_b_cycles(int left_partials, int right_partials, int full_words, int rows, int op_timing, int bpp);
897 void memory_w(offs_t offset, uint16_t data);
898 uint16_t memory_r(offs_t offset);
899 void shiftreg_w(offs_t offset, uint16_t data);
900 uint16_t shiftreg_r(offs_t offset);
901 uint16_t dummy_shiftreg_r(offs_t offset);
902 uint32_t pixel_op00(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
903 uint32_t pixel_op01(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
904 uint32_t pixel_op02(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
905 uint32_t pixel_op03(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
906 uint32_t pixel_op04(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
907 uint32_t pixel_op05(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
908 uint32_t pixel_op06(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
909 uint32_t pixel_op07(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
910 uint32_t pixel_op08(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
911 uint32_t pixel_op09(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
912 uint32_t pixel_op10(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
913 uint32_t pixel_op11(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
914 uint32_t pixel_op12(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
915 uint32_t pixel_op13(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
916 uint32_t pixel_op14(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
917 uint32_t pixel_op15(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
918 uint32_t pixel_op16(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
919 uint32_t pixel_op17(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
920 uint32_t pixel_op18(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
921 uint32_t pixel_op19(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
922 uint32_t pixel_op20(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
923 uint32_t pixel_op21(uint32_t dstpix, uint32_t mask, uint32_t srcpix);
924 void pixblt_1_op0(int src_is_linear, int dst_is_linear);
925 void pixblt_2_op0(int src_is_linear, int dst_is_linear);
926 void pixblt_4_op0(int src_is_linear, int dst_is_linear);
927 void pixblt_8_op0(int src_is_linear, int dst_is_linear);
928 void pixblt_16_op0(int src_is_linear, int dst_is_linear);
929 void pixblt_r_1_op0(int src_is_linear, int dst_is_linear);
930 void pixblt_r_2_op0(int src_is_linear, int dst_is_linear);
931 void pixblt_r_4_op0(int src_is_linear, int dst_is_linear);
932 void pixblt_r_8_op0(int src_is_linear, int dst_is_linear);
933 void pixblt_r_16_op0(int src_is_linear, int dst_is_linear);
934 void pixblt_b_1_op0(int dst_is_linear);
935 void pixblt_b_2_op0(int dst_is_linear);
936 void pixblt_b_4_op0(int dst_is_linear);
937 void pixblt_b_8_op0(int dst_is_linear);
938 void pixblt_b_16_op0(int dst_is_linear);
939 void fill_1_op0(int dst_is_linear);
940 void fill_2_op0(int dst_is_linear);
941 void fill_4_op0(int dst_is_linear);
942 void fill_8_op0(int dst_is_linear);
943 void fill_16_op0(int dst_is_linear);
944 void pixblt_1_op0_trans(int src_is_linear, int dst_is_linear);
945 void pixblt_2_op0_trans(int src_is_linear, int dst_is_linear);
946 void pixblt_4_op0_trans(int src_is_linear, int dst_is_linear);
947 void pixblt_8_op0_trans(int src_is_linear, int dst_is_linear);
948 void pixblt_16_op0_trans(int src_is_linear, int dst_is_linear);
949 void pixblt_r_1_op0_trans(int src_is_linear, int dst_is_linear);
950 void pixblt_r_2_op0_trans(int src_is_linear, int dst_is_linear);
951 void pixblt_r_4_op0_trans(int src_is_linear, int dst_is_linear);
952 void pixblt_r_8_op0_trans(int src_is_linear, int dst_is_linear);
953 void pixblt_r_16_op0_trans(int src_is_linear, int dst_is_linear);
954 void pixblt_b_1_op0_trans(int dst_is_linear);
955 void pixblt_b_2_op0_trans(int dst_is_linear);
956 void pixblt_b_4_op0_trans(int dst_is_linear);
957 void pixblt_b_8_op0_trans(int dst_is_linear);
958 void pixblt_b_16_op0_trans(int dst_is_linear);
959 void fill_1_op0_trans(int dst_is_linear);
960 void fill_2_op0_trans(int dst_is_linear);
961 void fill_4_op0_trans(int dst_is_linear);
962 void fill_8_op0_trans(int dst_is_linear);
963 void fill_16_op0_trans(int dst_is_linear);
964 void pixblt_1_opx(int src_is_linear, int dst_is_linear);
965 void pixblt_2_opx(int src_is_linear, int dst_is_linear);
966 void pixblt_4_opx(int src_is_linear, int dst_is_linear);
967 void pixblt_8_opx(int src_is_linear, int dst_is_linear);
968 void pixblt_16_opx(int src_is_linear, int dst_is_linear);
969 void pixblt_r_1_opx(int src_is_linear, int dst_is_linear);
970 void pixblt_r_2_opx(int src_is_linear, int dst_is_linear);
971 void pixblt_r_4_opx(int src_is_linear, int dst_is_linear);
972 void pixblt_r_8_opx(int src_is_linear, int dst_is_linear);
973 void pixblt_r_16_opx(int src_is_linear, int dst_is_linear);
974 void pixblt_b_1_opx(int dst_is_linear);
975 void pixblt_b_2_opx(int dst_is_linear);
976 void pixblt_b_4_opx(int dst_is_linear);
977 void pixblt_b_8_opx(int dst_is_linear);
978 void pixblt_b_16_opx(int dst_is_linear);
979 void fill_1_opx(int dst_is_linear);
980 void fill_2_opx(int dst_is_linear);
981 void fill_4_opx(int dst_is_linear);
982 void fill_8_opx(int dst_is_linear);
983 void fill_16_opx(int dst_is_linear);
984 void pixblt_1_opx_trans(int src_is_linear, int dst_is_linear);
985 void pixblt_2_opx_trans(int src_is_linear, int dst_is_linear);
986 void pixblt_4_opx_trans(int src_is_linear, int dst_is_linear);
987 void pixblt_8_opx_trans(int src_is_linear, int dst_is_linear);
988 void pixblt_16_opx_trans(int src_is_linear, int dst_is_linear);
989 void pixblt_r_1_opx_trans(int src_is_linear, int dst_is_linear);
990 void pixblt_r_2_opx_trans(int src_is_linear, int dst_is_linear);
991 void pixblt_r_4_opx_trans(int src_is_linear, int dst_is_linear);
992 void pixblt_r_8_opx_trans(int src_is_linear, int dst_is_linear);
993 void pixblt_r_16_opx_trans(int src_is_linear, int dst_is_linear);
994 void pixblt_b_1_opx_trans(int dst_is_linear);
995 void pixblt_b_2_opx_trans(int dst_is_linear);
996 void pixblt_b_4_opx_trans(int dst_is_linear);
997 void pixblt_b_8_opx_trans(int dst_is_linear);
998 void pixblt_b_16_opx_trans(int dst_is_linear);
999 void fill_1_opx_trans(int dst_is_linear);
1000 void fill_2_opx_trans(int dst_is_linear);
1001 void fill_4_opx_trans(int dst_is_linear);
1002 void fill_8_opx_trans(int dst_is_linear);
1003 void fill_16_opx_trans(int dst_is_linear);
1004 void check_interrupt();
1005 void set_pixel_function();
1006 void set_raster_op();
1007
1008 };
1009
1010
1011 class tms34010_device : public tms340x0_device
1012 {
1013 public:
1014 tms34010_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
1015
1016 /* Reads & writes to the 34010 I/O registers; place at 0xc0000000 */
1017 virtual void io_register_w(offs_t offset, u16 data, u16 mem_mask = ~u16(0)) override;
1018 virtual u16 io_register_r(offs_t offset) override;
1019
1020 protected:
1021 // device-level overrides
1022 virtual void device_start() override;
1023
execute_clocks_to_cycles(uint64_t clocks)1024 virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 8 - 1) / 8; }
execute_cycles_to_clocks(uint64_t cycles)1025 virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 8); }
1026 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
1027 void internal_regs_map(address_map &map);
1028
1029 virtual uint32_t ROPCODE() override;
1030 virtual int16_t PARAM_WORD() override;
1031 virtual int32_t PARAM_LONG() override;
1032 virtual int16_t PARAM_WORD_NO_INC() override;
1033 virtual int32_t PARAM_LONG_NO_INC() override;
1034 virtual uint32_t TMS34010_RDMEM_WORD(offs_t A) override;
1035 virtual uint32_t TMS34010_RDMEM_DWORD(offs_t A) override;
1036 virtual void TMS34010_WRMEM_WORD(offs_t A, uint32_t V) override;
1037 virtual void TMS34010_WRMEM_DWORD(offs_t A, uint32_t V) override;
1038
1039 private:
1040 memory_access<32, 1, 3, ENDIANNESS_LITTLE>::cache m_cache;
1041 memory_access<32, 1, 3, ENDIANNESS_LITTLE>::specific m_program;
1042 };
1043
DECLARE_DEVICE_TYPE(TMS34010,tms34010_device)1044 DECLARE_DEVICE_TYPE(TMS34010, tms34010_device)
1045
1046 class tms34020_device : public tms340x0_device
1047 {
1048 public:
1049 tms34020_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
1050
1051 /* Reads & writes to the 34020 I/O registers; place at 0xc0000000 */
1052 virtual void io_register_w(offs_t offset, u16 data, u16 mem_mask = ~u16(0)) override;
1053 virtual u16 io_register_r(offs_t offset) override;
1054
1055 protected:
1056 // device-level overrides
1057 virtual void device_start() override;
1058
1059 virtual uint64_t execute_clocks_to_cycles(uint64_t clocks) const noexcept override { return (clocks + 4 - 1) / 4; }
1060 virtual uint64_t execute_cycles_to_clocks(uint64_t cycles) const noexcept override { return (cycles * 4); }
1061 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override;
1062 void internal_regs_map(address_map &map);
1063
1064 virtual uint32_t ROPCODE() override;
1065 virtual int16_t PARAM_WORD() override;
1066 virtual int32_t PARAM_LONG() override;
1067 virtual int16_t PARAM_WORD_NO_INC() override;
1068 virtual int32_t PARAM_LONG_NO_INC() override;
1069 virtual uint32_t TMS34010_RDMEM_WORD(offs_t A) override;
1070 virtual uint32_t TMS34010_RDMEM_DWORD(offs_t A) override;
1071 virtual void TMS34010_WRMEM_WORD(offs_t A, uint32_t V) override;
1072 virtual void TMS34010_WRMEM_DWORD(offs_t A, uint32_t V) override;
1073
1074 private:
1075 memory_access<32, 2, 3, ENDIANNESS_LITTLE>::cache m_cache;
1076 memory_access<32, 2, 3, ENDIANNESS_LITTLE>::specific m_program;
1077 };
1078
1079 DECLARE_DEVICE_TYPE(TMS34020, tms34020_device)
1080
1081
1082
1083 /* Host control interface */
1084 #define TMS34010_HOST_ADDRESS_L 0
1085 #define TMS34010_HOST_ADDRESS_H 1
1086 #define TMS34010_HOST_DATA 2
1087 #define TMS34010_HOST_CONTROL 3
1088
1089 #endif // MAME_CPU_TMS34010_TMS34010_H
1090