1 // license:BSD-3-Clause
2 // copyright-holders:Couriersud
3 #include "emu.h"
4 #include "includes/mario.h"
5
6 #include "cpu/mcs48/mcs48.h"
7 #include "cpu/z80/z80.h"
8 #include "sound/ay8910.h"
9 #include "speaker.h"
10
11 #if !OLD_SOUND
12 #include "audio/nl_mario.h"
13 #endif
14
15 /****************************************************************
16 *
17 * Defines and Macros
18 *
19 ****************************************************************/
20
21 #define RUN_VCO_VOLTAGE (0.0) /* 5 in schematics */
22
23 #define USE_8039 (0) /* set to 1 to try 8039 hack */
24
25 #define ACTIVELOW_PORT_BIT(P,A,D) ((P & (~(1 << A))) | ((D ^ 1) << A))
26 #define ACTIVEHIGH_PORT_BIT(P,A,D) ((P & (~(1 << A))) | (D << A))
27
28 #define I8035_T_R(N) ((m_soundlatch2->read() >> (N)) & 1)
29 #define I8035_T_W_AH(N,D) do { m_portT = ACTIVEHIGH_PORT_BIT(m_portT,N,D); m_soundlatch2->write(m_portT); } while (0)
30
31 #define I8035_P1_R() (m_soundlatch3->read())
32 #define I8035_P2_R() (m_soundlatch4->read())
33 #define I8035_P1_W(D) m_soundlatch3->write(D)
34
35 #if (USE_8039)
36 #define I8035_P2_W(D) do { m_soundlatch4->write(D); } while (0)
37 #else
38 #define I8035_P2_W(D) do { set_ea(((D) & 0x20) ? 0 : 1); m_soundlatch4->write(D); } while (0)
39 #endif
40
41 #define I8035_P1_W_AH(B,D) I8035_P1_W(ACTIVEHIGH_PORT_BIT(I8035_P1_R(),B,(D)))
42 #define I8035_P2_W_AH(B,D) I8035_P2_W(ACTIVEHIGH_PORT_BIT(I8035_P2_R(),B,(D)))
43
44
45 #if OLD_SOUND
46 /****************************************************************
47 *
48 * Discrete Sound defines
49 *
50 ****************************************************************/
51
52 /* Discrete sound inputs */
53
54 #define DS_SOUND0_INV NODE_01
55 #define DS_SOUND1_INV NODE_02
56 #define DS_SOUND7_INV NODE_05
57 #define DS_DAC NODE_07
58
59 #define DS_SOUND0 NODE_208
60 #define DS_SOUND1 NODE_209
61 #define DS_SOUND7 NODE_212
62
63 #define DS_OUT_SOUND0 NODE_241
64 #define DS_OUT_SOUND1 NODE_242
65 #define DS_OUT_SOUND7 NODE_248
66 #define DS_OUT_DAC NODE_250
67
68 /* Input definitions for write handlers */
69
70 #define DS_SOUND0_INP DS_SOUND0_INV
71 #define DS_SOUND1_INP DS_SOUND1_INV
72 #define DS_SOUND7_INP DS_SOUND7_INV
73
74 /* General defines */
75
76 #define VSS 5.0
77 #define TTL_HIGH 4.0
78 #define GND 0.0
79
80 /****************************************************************
81 *
82 * Mario Discrete Sound Interface
83 *
84 * Parts verified against a real TMA1-04-CPU Board.
85 ****************************************************************/
86
87 #define MR_R6 RES_K(4.7) /* verified */
88 #define MR_R7 RES_K(4.7) /* verified */
89 #define MR_R17 RES_K(27) /* 20 according to parts list */
90 /* 27 verified, 30K in schematics */
91 #define MR_R18 RES_K(27) /* 20 according to parts list */
92 /* 27 verified, 30K in schematics */
93 #define MR_R19 RES_K(22) /* verified */
94 #define MR_R20 RES_K(22) /* verified */
95 #define MR_R34 RES_M(2) /* */
96 #define MR_R35 RES_M(1) /* */
97 #define MR_R36 RES_M(1.8) /* */
98 #define MR_R40 RES_K(22) /* verified */
99 #define MR_R41 RES_K(100) /* verified */
100 #define MR_R42 RES_K(43) /* verified */
101 #define MR_R43 RES_K(100) /* verified */
102 #define MR_R61 RES_K(47) /* verified */
103 #define MR_R64 RES_K(20) /* verified */
104 #define MR_R65 RES_K(10) /* verified */
105
106 #define MR_C3 CAP_U(10) /* verified */
107 #define MR_C4 CAP_U(4.7) /* verified */
108 #define MR_C5 CAP_N(39) /* verified */
109 #define MR_C6 CAP_N(3.9) /* verified */
110 #define MR_C14 CAP_U(4.7) /* verified */
111 #define MR_C15 CAP_U(4.7) /* verified */
112 #define MR_C16 CAP_N(6.8) /* verified */
113 #define MR_C17 CAP_N(22) /* verified */
114 #define MR_C30 CAP_P(100) /* verified */
115 #define MR_C31 CAP_U(0.022) /* verified */
116 #define MR_C32 CAP_U(1) /* verified */
117 #define MR_C39 CAP_N(4.7) /* verified */
118 #define MR_C40 CAP_N(22) /* verified */
119 #define MR_C41 CAP_U(4.7) /* verified */
120 #define MR_C43 CAP_U(3.3) /* verified */
121 #define MR_C44 CAP_U(3.3) /* verified */
122
123 #define MR_MIXER_RPAR RES_4_PARALLEL(MR_R20, MR_R19, MR_R41, MR_R40)
124
125
126 /* KT = 0.25 for diode circuit, 0.33 else */
127
128 #define DISCRETE_LS123(_N, _T, _R, _C) \
129 DISCRETE_ONESHOTR(_N, 0, _T, 1, (0.25 * (_R) * (_C) * (1.0+700./(_R))), DISC_ONESHOT_RETRIG | DISC_ONESHOT_REDGE)
130 #define DISCRETE_LS123_INV(_N, _T, _R, _C) \
131 DISCRETE_ONESHOTR(_N, 0, _T, 1, (0.25 * (_R) * (_C) * (1.0+700./(_R))), DISC_ONESHOT_RETRIG | DISC_ONESHOT_REDGE | DISC_OUT_ACTIVE_LOW)
132
133
134 static const discrete_op_amp_info mario_dac_amp =
135 {
136 DISC_OP_AMP_IS_NORTON,
137 MR_R34, MR_R36, 0, MR_R35, 0, /* r1, r2, r3, r4, c */
138 0, 5 /* vN, vP */
139 };
140
141 static const discrete_mixer_desc mario_mixer =
142 {
143 DISC_MIXER_IS_RESISTOR,
144 {MR_R20, MR_R19, MR_R41, MR_R40},
145 {0}, {0}, 0, 0, MR_C31, MR_C32, 0, 1 /* r_node{}, c{}, rI, rF, cF, cAmp, vRef, gain*/
146 };
147
148 #define LS629_FREQ_R_IN RES_K(90)
149
150 static DISCRETE_SOUND_START(mario_discrete)
151
152 /************************************************
153 * Input register mapping for mario
154 ************************************************/
155
156 /* DISCRETE_INPUT_DATA */
DISCRETE_INPUT_NOT(DS_SOUND7_INV)157 DISCRETE_INPUT_NOT(DS_SOUND7_INV) /* IC 7L, pin 8 */
158
159 /************************************************
160 * SOUND0
161 ************************************************/
162
163 DISCRETE_TASK_START(1)
164 DISCRETE_INPUT_PULSE(DS_SOUND0_INV, 1) /* IC 4C, pin 15 */
165 DISCRETE_LS123(NODE_10, /* IC 2H, pin 13 */
166 DS_SOUND0_INV, /* IC 2H, pin 2 */
167 MR_R17, MR_C14)
168
169 /* Breadboarded measurements IC 1J, pin 10
170 D.R. Oct 2010
171 V Hz
172 0.115 14470
173 0.250 15190
174 0.500 14980
175 0.750 18150
176 1.000 21690
177 2.000 38790
178 3.000 58580
179 4.000 79890
180 */
181
182 /* Breadboarded measurements IC 2J, pin 10
183 D.R. Oct 2010
184 V Hz
185 0.116 2458
186 0.250 2593
187 0.500 2540
188 0.750 3081
189 1.000 3676
190 2.000 6590
191 3.000 9974
192 4.000 13620
193 */
194
195 /* covert logic to measured voltage */
196 DISCRETE_XTIME_BUFFER(NODE_11, /* IC 1H, pin 10 */
197 NODE_10, /* IC 1H, pin 11 */
198 0.115, 4.0) /* measured Low/High */
199 /* work out cap charge of RC in parallel with 2 74LS629s */
200 DISCRETE_RCFILTER(NODE_12, NODE_11, RES_3_PARALLEL(MR_R6, LS629_FREQ_R_IN, LS629_FREQ_R_IN), MR_C3 )
201 /* work out voltage drop of RC in parallel with 2 74LS629s */
202 DISCRETE_GAIN(NODE_13, NODE_12, RES_VOLTAGE_DIVIDER(MR_R6, RES_2_PARALLEL(LS629_FREQ_R_IN, LS629_FREQ_R_IN)))
203 DISCRETE_74LS624(NODE_14, /* IC 1J, pin 10 */
204 1, /* ENAB */
205 NODE_13, 5, /* VMOD - IC 1J, pin 1; VRNG */
206 MR_C6, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
207 DISC_LS624_OUT_LOGIC_X)
208 DISCRETE_74LS624(NODE_15, /* IC 2J, pin 10 */
209 1, /* ENAB */
210 NODE_13, 5, /* VMOD - IC 2J, pin 1; VRNG */
211 MR_C17, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
212 DISC_LS624_OUT_LOGIC_X)
213 DISCRETE_XTIME_XOR(NODE_16, /* IC IC 1K, pin 6 */
214 NODE_14, NODE_15, /* IC 1K, pin 5; pin 4 */
215 0, 0) /* use x_time logic */
216 DISCRETE_XTIME_AND(DS_OUT_SOUND0, /* IC 2K, pin 6 */
217 NODE_10, NODE_16, /* IC 2K, pin 5; pin 4 */
218 0.066, 3.8) /* LOW; HIGH (varies due to load 3.7 - 4.4) */
219 DISCRETE_TASK_END()
220
221 /************************************************
222 * SOUND1
223 ************************************************/
224
225 DISCRETE_TASK_START(1)
226 DISCRETE_INPUT_PULSE(DS_SOUND1_INV, 1) /* IC 4C, pin 14 */
227 DISCRETE_LS123(NODE_20, /* IC 2H, pin 5 */
228 DS_SOUND1_INV, /* IC 2H, pin 10 */
229 MR_R18, MR_C15)
230
231 /* Breadboarded measurements IC 1J, pin 7
232 D.R. Oct 2010
233 V Hz
234 0.116 1380
235 0.250 1448
236 0.500 1419
237 0.750 1717
238 1.000 2053
239 2.000 3677
240 3.000 5561
241 4.000 7610
242 */
243
244 /* Breadboarded measurements IC 2J, pin 7
245 D.R. Oct 2010
246 V Hz
247 0.112 8030
248 0.250 8490
249 0.500 8326
250 0.750 10030
251 1.000 12000
252 2.000 21460
253 3.000 32540
254 4.000 44300
255 */
256
257 /* covert logic to measured voltage */
258 DISCRETE_XTIME_BUFFER(NODE_21, /* IC 1H, pin 8 */
259 NODE_20, /* IC 1H, pin 9 */
260 0.115, 4.0) /* measured Low/High */
261 /* work out cap charge of RC in parallel with 2 74LS629s */
262 DISCRETE_RCFILTER(NODE_22, NODE_21, RES_3_PARALLEL(MR_R7, LS629_FREQ_R_IN, LS629_FREQ_R_IN), MR_C4 )
263 /* work out voltage drop of RC in parallel with 2 74LS629s */
264 DISCRETE_GAIN(NODE_23, NODE_22, RES_VOLTAGE_DIVIDER(MR_R7, RES_2_PARALLEL(LS629_FREQ_R_IN, LS629_FREQ_R_IN)))
265 DISCRETE_74LS624(NODE_24, /* IC 1J, pin 7 */
266 1, /* ENAB */
267 NODE_23, 5, /* VMOD, VRNG */
268 MR_C5, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
269 DISC_LS624_OUT_LOGIC_X)
270 DISCRETE_74LS624(NODE_25, /* IC 2J, pin 7 */
271 1, /* ENAB */
272 NODE_23, 5, /* VMOD, VRNG */
273 MR_C16, 0, 0, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
274 DISC_LS624_OUT_LOGIC_X)
275 DISCRETE_XTIME_XOR(NODE_26, /* IC IC 1K, pin 3 */
276 NODE_24, NODE_25, /* IC 1K, pin 1; pin 2 */
277 0, 0) /* use x_time logic */
278 DISCRETE_XTIME_AND(DS_OUT_SOUND1, /* IC 2K, pin 3 */
279 NODE_20, NODE_26, /* IC 2K, pin 2; pin 1 */
280 0.066, 3.8) /* LOW; HIGH (varies due to load 3.7 - 4.4) */
281 DISCRETE_TASK_END()
282
283 /************************************************
284 * SOUND7
285 ************************************************/
286
287 DISCRETE_TASK_START(1)
288 DISCRETE_COUNTER(NODE_100, /* IC 3H */
289 1, 0, /* ENAB; RESET */
290 NODE_118, /* CLK - IC 3H, pin 10 */
291 0, 0x3FFF, DISC_COUNT_UP, 0, DISC_CLK_BY_COUNT | DISC_OUT_HAS_XTIME)
292 DISCRETE_BIT_DECODE(NODE_102, /* IC 3H, pin 7 */
293 NODE_100, 3, 0) /* output x_time logic */
294 DISCRETE_BIT_DECODE(NODE_104, /* IC 3H, pin 1 */
295 NODE_100, 11, 0) /* output x_time logic */
296
297 DISCRETE_LS123(NODE_110, /* IC 4L, pin 13 */
298 DS_SOUND7_INV, /* IC 4L, pin 2 */
299 MR_R61, MR_C41)
300 DISCRETE_XTIME_INVERTER(NODE_111, /* IC 4J, pin 8 */
301 NODE_110, /* IC 4J, pin 9 */
302 0.151, 4.14) /* measured Low/High */
303
304 /* Breadboarded measurements IC 4K, pin 10
305 D.R. Oct 2010
306 V Hz
307 0.151 3139
308 0.25 2883
309 0.5 2820
310 0.75 3336
311 1 3805
312 2 6498
313 3 9796
314 4 13440
315 4.14 13980
316 */
317
318 DISCRETE_74LS624(NODE_113, /* IC 4K, pin 10 */
319 1, /* ENAB */
320 NODE_111, 5, /* VMOD - IC 4K, pin 1; VRNG */
321 MR_C40, MR_R65, MR_C44, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
322 DISC_LS624_OUT_LOGIC_X)
323
324 DISCRETE_XTIME_XOR(NODE_115, /* IC 6N, pin 3 */
325 NODE_113, NODE_102, /* IC 6N, pin 1; pin 2 */
326 0, 0) /* use x_time logic */
327
328 /* Breadboarded measurements IC 4K, pin 7
329 D.R. Oct 2010
330 V Hz
331 0.135 14450
332 0.25 13320
333 0.5 12980
334 0.75 15150
335 1 17270
336 2 28230
337 3 41910
338 4 56950
339 4.15 59400
340 */
341
342 DISCRETE_XTIME_INVERTER(NODE_117, /* IC 4J, pin 4 */
343 NODE_104, /* IC 4J, pin 3 */
344 0.135, 4.15) /* measured Low/High */
345 DISCRETE_74LS624(NODE_118, /* IC 4K, pin 7 */
346 1, /* ENAB */
347 NODE_117, 5, /* VMOD - IC 4K, pin 2; VRNG */
348 MR_C39, MR_R64, MR_C43, 0, /* C; R_FREQ_IN; C_FREQ_IN; R_RNG_IN */
349 DISC_LS624_OUT_LOGIC_X)
350
351 DISCRETE_XTIME_AND(DS_OUT_SOUND7, /* IC 2K, pin 11 */
352 NODE_110, NODE_115, /* IC 2K, pin 12; pin 13 */
353 0.066, 4.07) /* LOW; HIGH (varies due to load 4.07 is lowest) */
354 DISCRETE_TASK_END()
355
356 /************************************************
357 * DAC
358 ************************************************/
359
360 /* following the resistor DAC are two opamps. The first is a 1:1 amplifier, the second
361 * is a filter circuit. Simulation in LTSPICE shows, that the following is equivalent:
362 */
363
364 DISCRETE_TASK_START(1)
365 DISCRETE_INPUT_BUFFER(DS_DAC, 0)
366 DISCRETE_MULTIPLY(NODE_170, DS_DAC, TTL_HIGH / 256.0) /* MXR1 */
367 /* this stage reduces the gain of the DAC by 50%, so yes the volume is much lower then the walk sound */
368 DISCRETE_OP_AMP(NODE_171, /* IC 3M, pin 5 */
369 1, /* ENAB */
370 NODE_170, 5, /* IN0 - IC 3M, pin 6; IN1 - IC 3M, pin 1 */
371 &mario_dac_amp)
372 /* This provides a close simulation of the IC 3M, pin 10 filter circuit */
373 /* The Measured and SPICEd low freq gain is 1, it then has a high frequency
374 * drop close to the following RC filter. */
375 DISCRETE_RCFILTER_VREF(DS_OUT_DAC, NODE_171, RES_K(750), CAP_P(180), 2.5)
376 DISCRETE_TASK_END()
377
378
379 /************************************************
380 * MIXER
381 ************************************************/
382
383 DISCRETE_TASK_START(2)
384 DISCRETE_MIXER4(NODE_297,
385 1, /* ENAB */
386 DS_OUT_SOUND0, DS_OUT_SOUND1, DS_OUT_SOUND7, DS_OUT_DAC,
387 &mario_mixer)
388 /* approx -0.625V to 0.980V when playing, but turn on sound peaks at 2.38V */
389 /* we will set the full wav range to 1.19V which will cause clipping on the turn on
390 * sound. The real game would do this when the volume is turned up too.
391 * Reducing MAME's master volume to 50% will provide full unclipped volume.
392 */
393 DISCRETE_OUTPUT(NODE_297, 32767.0/1.19)
394 DISCRETE_TASK_END()
395
396 DISCRETE_SOUND_END
397 #endif
398 /****************************************************************
399 *
400 * EA / Banking
401 *
402 ****************************************************************/
403
404 void mario_state::set_ea(int ea)
405 {
406 //printf("ea: %d\n", ea);
407 //m_audiocpu->set_input_line(MCS48_INPUT_EA, (ea) ? ASSERT_LINE : CLEAR_LINE);
408 if (m_eabank != nullptr)
409 membank(m_eabank)->set_entry(ea);
410 }
411
412 /****************************************************************
413 *
414 * Initialization
415 *
416 ****************************************************************/
417
sound_start()418 void mario_state::sound_start()
419 {
420 uint8_t *SND = memregion("audiocpu")->base();
421
422 #if USE_8039
423 SND[0x1001] = 0x01;
424 #endif
425
426 m_eabank = nullptr;
427 if (m_audiocpu->type() != Z80)
428 {
429
430 m_eabank = "bank1";
431 m_audiocpu->space(AS_PROGRAM).install_read_bank(0x000, 0x7ff, "bank1");
432 membank("bank1")->configure_entry(0, &SND[0]);
433 membank("bank1")->configure_entry(1, &SND[0x1000]);
434
435 #if !USE_8039
436 // Hack to bootstrap MCU program into external MB1
437 SND[0x0000] = 0xf5;
438 SND[0x0001] = 0x04;
439 SND[0x0002] = 0x00;
440 #endif
441 }
442
443 save_item(NAME(m_last));
444 save_item(NAME(m_portT));
445 }
446
sound_reset()447 void mario_state::sound_reset()
448 {
449 #if USE_8039
450 set_ea(1);
451 #endif
452
453 /* FIXME: convert to latch8 */
454 m_soundlatch->clear_w();
455 if (m_soundlatch2) m_soundlatch2->clear_w();
456 if (m_soundlatch3) m_soundlatch3->clear_w();
457 if (m_soundlatch4) m_soundlatch4->clear_w();
458 if (m_soundlatch3) I8035_P1_W(0x00); /* Input port */
459 if (m_soundlatch4) I8035_P2_W(0xff); /* Port is in high impedance state after reset */
460
461 m_last = 0;
462 }
463
464 /****************************************************************
465 *
466 * I/O Handlers - static
467 *
468 ****************************************************************/
469
mario_sh_p1_r()470 uint8_t mario_state::mario_sh_p1_r()
471 {
472 return I8035_P1_R();
473 }
474
mario_sh_p2_r()475 uint8_t mario_state::mario_sh_p2_r()
476 {
477 return I8035_P2_R() & 0xEF; /* Bit 4 connected to GND! */
478 }
479
READ_LINE_MEMBER(mario_state::mario_sh_t0_r)480 READ_LINE_MEMBER(mario_state::mario_sh_t0_r)
481 {
482 return I8035_T_R(0);
483 }
484
READ_LINE_MEMBER(mario_state::mario_sh_t1_r)485 READ_LINE_MEMBER(mario_state::mario_sh_t1_r)
486 {
487 return I8035_T_R(1);
488 }
489
mario_sh_tune_r(offs_t offset)490 uint8_t mario_state::mario_sh_tune_r(offs_t offset)
491 {
492 uint8_t *SND = memregion("audiocpu")->base();
493 uint16_t mask = memregion("audiocpu")->bytes()-1;
494 uint8_t p2 = I8035_P2_R();
495
496 if ((p2 >> 7) & 1)
497 return m_soundlatch->read();
498 else
499 return (SND[(0x1000 + (p2 & 0x0f) * 256 + offset) & mask]);
500 }
501
mario_sh_sound_w(uint8_t data)502 void mario_state::mario_sh_sound_w(uint8_t data)
503 {
504 #if OLD_SOUND
505 m_discrete->write(DS_DAC, data);
506 #else
507 m_audio_dac->write(data);
508 #endif
509 }
510
mario_sh_p1_w(uint8_t data)511 void mario_state::mario_sh_p1_w(uint8_t data)
512 {
513 I8035_P1_W(data);
514 }
515
mario_sh_p2_w(uint8_t data)516 void mario_state::mario_sh_p2_w(uint8_t data)
517 {
518 I8035_P2_W(data);
519 }
520
521 /****************************************************************
522 *
523 * I/O Handlers - global
524 *
525 ****************************************************************/
526
masao_sh_irqtrigger_w(uint8_t data)527 void mario_state::masao_sh_irqtrigger_w(uint8_t data)
528 {
529 if (m_last == 1 && data == 0)
530 {
531 /* setting bit 0 high then low triggers IRQ on the sound CPU */
532 m_audiocpu->set_input_line_and_vector(0, HOLD_LINE, 0xff); // Z80
533 }
534
535 m_last = data;
536 }
537
mario_sh_tuneselect_w(uint8_t data)538 void mario_state::mario_sh_tuneselect_w(uint8_t data)
539 {
540 m_soundlatch->write(data);
541 }
542
543 /* Sound 0 and 1 are pulsed !*/
544
545 /* Mario running sample */
mario_sh1_w(uint8_t data)546 void mario_state::mario_sh1_w(uint8_t data)
547 {
548 #if OLD_SOUND
549 m_discrete->write(DS_SOUND0_INP, 0);
550 #else
551 m_audio_snd0->write(data);
552 #endif
553 }
554
555 /* Luigi running sample */
mario_sh2_w(uint8_t data)556 void mario_state::mario_sh2_w(uint8_t data)
557 {
558 #if OLD_SOUND
559 m_discrete->write(DS_SOUND1_INP, 0);
560 #else
561 m_audio_snd1->write(data);
562 #endif
563 }
564
565 /* Misc samples */
mario_sh3_w(offs_t offset,uint8_t data)566 void mario_state::mario_sh3_w(offs_t offset, uint8_t data)
567 {
568 switch (offset)
569 {
570 case 0: /* death */
571 if (data)
572 m_audiocpu->set_input_line(0,ASSERT_LINE);
573 else
574 m_audiocpu->set_input_line(0,CLEAR_LINE);
575 break;
576 case 1: /* get coin */
577 I8035_T_W_AH(0,data & 1);
578 break;
579 case 2: /* ice */
580 I8035_T_W_AH(1, data & 1);
581 break;
582 case 3: /* crab */
583 I8035_P1_W_AH(0, data & 1);
584 break;
585 case 4: /* turtle */
586 I8035_P1_W_AH(1, data & 1);
587 break;
588 case 5: /* fly */
589 I8035_P1_W_AH(2, data & 1);
590 break;
591 case 6: /* coin */
592 I8035_P1_W_AH(3, data & 1);
593 break;
594 case 7: /* skid */
595 #if OLD_SOUND
596 m_discrete->write(space, DS_SOUND7_INP, data & 1);
597 #else
598 m_audio_snd7->write((data & 1) ^ 1);
599 #endif
600 break;
601 }
602 }
603
604 /*************************************
605 *
606 * Sound CPU memory handlers
607 *
608 *************************************/
609
mario_sound_map(address_map & map)610 void mario_state::mario_sound_map(address_map &map)
611 {
612 map(0x0000, 0x07ff).bankr("bank1").region("audiocpu", 0);
613 map(0x0800, 0x0fff).rom();
614 }
615
mario_sound_io_map(address_map & map)616 void mario_state::mario_sound_io_map(address_map &map)
617 {
618 map(0x00, 0xff).r(FUNC(mario_state::mario_sh_tune_r)).w(FUNC(mario_state::mario_sh_sound_w));
619 }
620
masao_sound_map(address_map & map)621 void mario_state::masao_sound_map(address_map &map)
622 {
623 map(0x0000, 0x0fff).rom();
624 map(0x2000, 0x23ff).ram();
625 map(0x4000, 0x4000).rw("aysnd", FUNC(ay8910_device::data_r), FUNC(ay8910_device::data_w));
626 map(0x6000, 0x6000).w("aysnd", FUNC(ay8910_device::address_w));
627 }
628
629
630 /*************************************
631 *
632 * Machine driver
633 *
634 *************************************/
635
mario_audio(machine_config & config)636 void mario_state::mario_audio(machine_config &config)
637 {
638 #if USE_8039
639 i8039_device &audiocpu(I8039(config, "audiocpu", I8035_CLOCK)); /* 730 kHz */
640 #else
641 m58715_device &audiocpu(M58715(config, m_audiocpu, I8035_CLOCK)); /* 730 kHz */
642 #endif
643 audiocpu.set_addrmap(AS_PROGRAM, &mario_state::mario_sound_map);
644 audiocpu.set_addrmap(AS_IO, &mario_state::mario_sound_io_map);
645 audiocpu.p1_in_cb().set(FUNC(mario_state::mario_sh_p1_r));
646 audiocpu.p1_out_cb().set(FUNC(mario_state::mario_sh_p1_w));
647 audiocpu.p2_in_cb().set(FUNC(mario_state::mario_sh_p2_r));
648 audiocpu.p2_out_cb().set(FUNC(mario_state::mario_sh_p2_w));
649 audiocpu.t0_in_cb().set(FUNC(mario_state::mario_sh_t0_r));
650 audiocpu.t1_in_cb().set(FUNC(mario_state::mario_sh_t1_r));
651
652 SPEAKER(config, "mono").front_center();
653
654 GENERIC_LATCH_8(config, m_soundlatch);
655 GENERIC_LATCH_8(config, m_soundlatch2);
656 GENERIC_LATCH_8(config, m_soundlatch3);
657 GENERIC_LATCH_8(config, m_soundlatch4);
658
659 #if OLD_SOUND
660 DISCRETE(config, m_discrete);
661 m_discrete->set_intf(mario_discrete);
662 m_discrete->add_route(ALL_OUTPUTS, "mono", 1);
663 #else
664 NETLIST_SOUND(config, "snd_nl", 48000)
665 .set_source(netlist_mario)
666 .add_route(ALL_OUTPUTS, "mono", 1.0);
667
668 NETLIST_LOGIC_INPUT(config, m_audio_snd0, "SOUND0.IN", 0);
669 NETLIST_LOGIC_INPUT(config, m_audio_snd1, "SOUND1.IN", 0);
670 NETLIST_LOGIC_INPUT(config, m_audio_snd7, "SOUND7.IN", 0);
671 NETLIST_INT_INPUT(config, m_audio_dac, "DAC.VAL", 0, 255);
672
673 NETLIST_STREAM_OUTPUT(config, "snd_nl:cout0", 0, "ROUT.1").set_mult_offset(150000.0 / 32768.0, 0.0);
674 #endif
675 }
676
masao_audio(machine_config & config)677 void mario_state::masao_audio(machine_config &config)
678 {
679 Z80(config, m_audiocpu, 24576000/16); /* ???? */
680 m_audiocpu->set_addrmap(AS_PROGRAM, &mario_state::masao_sound_map);
681
682 SPEAKER(config, "mono").front_center();
683
684 GENERIC_LATCH_8(config, m_soundlatch);
685
686 ay8910_device &aysnd(AY8910(config, "aysnd", 14318000/6));
687 aysnd.port_a_read_callback().set(m_soundlatch, FUNC(generic_latch_8_device::read));
688 aysnd.add_route(ALL_OUTPUTS, "mono", 0.50);
689 }
690