1 // license:BSD-3-Clause
2 // copyright-holders:Pierpaolo Prazzoli
3 /********************************************************************
4 
5 Pasha Pasha 2
6 Dong Sung, 1998
7 
8 3PLAY
9 |--------------------------------------------------|
10 |      DA1311    UM53   AD-65    DREAM  9.6MHz     |
11 |KA22065  TL062  UM51   AD-65          RESET_SW    |
12 |   VOL1   VOL2                  1MHz   TL7705     |
13 |                                                  |
14 |    DSW2(8)            20MHz    GM71C18163        |
15 |     93C46                                   UM2  |
16 |           PAL                                    |
17 |J                                                 |
18 |A                                                 |
19 |M                      E1-16XT             AT89C52|
20 |M                                                 |
21 |A                                  U102           |
22 |           6116                                   |
23 |           6116       U3           U101           |
24 |                                                  |
25 |                                                  |
26 |                                             12MHz|
27 |                    A42MX16                       |
28 |    DSW1(8)                                       |
29 | UCN5801                                          |
30 | UCN5801                                          |
31 |         16MHz                                    |
32 |--------------------------------------------------|
33 Notes:
34       U3         - 27C040 EPROM (DIP32)
35       UM2/UM51/53- 29F040 EPROM (PLCC32)
36       U101/102   - Each location contains a small adapter board plugged into a DIP42 socket. Each
37                    adapter board holds 2x Intel E28F016S5 TSOP40 16M FlashROMs. On the PCB under the ROMs
38                    it's marked '32MASK'. However, the adapter boards are not standard. If you try to read
39                    the ROMs while they are _ON-THE-ADAPTER_ as a 32M DIP42 EPROM (such as 27C322), the
40                    FlashROMs are damaged and the PCB no longer works :(
41                    Thus, the FlashROMs must be removed and read separately!
42                    The small adapter boards with their respective FlashROMs are laid out like this........
43 
44                    |------------------------------|
45                    |                              |
46                    |       U2           U1        |  U102
47                    |                              |
48                    |------------------------------|
49 
50                    |------------------------------|
51                    |                              |
52                    |       U2           U1        |  U101
53                    |                              |
54                    |------------------------------|
55 
56       A42MX16    - Actel A42MX16 FPGA (QFP160)
57       AT89C52    - Atmel AT89C52 Microcontroller w/8k internal FlashROM, clock 12MHz (DIP40)
58       E1-16XT    - Hyperstone E1-16XT CPU, clock 20MHz
59       DREAM      - ATMEL DREAM SAM9773 Single Chip Synthesizer/MIDI with Effects and Serial Interface, clock 9.6MHz (TQFP80)
60       AD-65      - Oki compatible M6295 sound chip, clock 1MHz
61       5493R45    - ISSI 5493R45-001 128k x8 SRAM (SOJ32)
62       GM71C18163 - Hynix 1M x16 DRAM (SOJ42)
63       VSync      - 60Hz
64       HSync      - 15.15kHz
65 
66  driver by Pierpaolo Prazzoli
67 
68  TODO:
69  - eeprom - is it used?
70  - irq2 - sound related? reads the 2 unmapped input registers.
71  - irq3 - it only writes a 0 into memory and changes a registe
72  - simulate music (DREAM chip)
73 
74 *********************************************************************/
75 
76 #include "emu.h"
77 #include "cpu/mcs51/mcs51.h"
78 #include "cpu/e132xs/e132xs.h"
79 #include "machine/eepromser.h"
80 #include "sound/okim6295.h"
81 #include "emupal.h"
82 #include "screen.h"
83 #include "speaker.h"
84 
85 #include "pasha2.lh"
86 
87 
88 class pasha2_state : public driver_device
89 {
90 public:
pasha2_state(const machine_config & mconfig,device_type type,const char * tag)91 	pasha2_state(const machine_config &mconfig, device_type type, const char *tag)
92 		: driver_device(mconfig, type, tag)
93 		, m_wram(*this, "wram")
94 		, m_paletteram(*this, "paletteram")
95 		, m_mainbank(*this, "mainbank")
96 		, m_lamps_r(*this, "lamp_p%u_r", 1U)
97 		, m_lamps_g(*this, "lamp_p%u_g", 1U)
98 		, m_lamps_b(*this, "lamp_p%u_b", 1U)
99 		, m_maincpu(*this, "maincpu")
100 		, m_audiocpu(*this, "audiocpu")
101 		, m_oki(*this, "oki%u", 1U)
102 		, m_palette(*this, "palette")
103 	{ }
104 
105 	void pasha2(machine_config &config);
106 
107 	void init_pasha2();
108 
109 private:
110 	/* memory pointers */
111 	required_shared_ptr<uint16_t> m_wram;
112 	required_shared_ptr<uint16_t> m_paletteram;
113 
114 	required_memory_bank m_mainbank;
115 
116 	output_finder<3> m_lamps_r;
117 	output_finder<3> m_lamps_g;
118 	output_finder<3> m_lamps_b;
119 
120 	/* video-related */
121 	int m_vbuffer;
122 
123 	/* memory */
124 	std::unique_ptr<uint8_t[]> m_bitmap0[2];
125 	std::unique_ptr<uint8_t[]> m_bitmap1[2];
126 	void pasha2_misc_w(offs_t offset, uint16_t data);
127 	void pasha2_palette_w(offs_t offset, uint16_t data, uint16_t mem_mask = ~0);
128 	void vbuffer_set_w(uint16_t data);
129 	void vbuffer_clear_w(uint16_t data);
130 	void bitmap_0_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
131 	void bitmap_1_w(offs_t offset, uint8_t data, uint8_t mem_mask = ~0);
132 	void pasha2_lamps_w(uint16_t data);
133 	uint16_t pasha2_speedup_r(offs_t offset);
134 	template<int Chip> void oki_bank_w(offs_t offset, uint16_t data);
135 	virtual void machine_start() override;
136 	virtual void machine_reset() override;
137 	virtual void video_start() override;
138 	uint32_t screen_update_pasha2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect);
139 	required_device<cpu_device> m_maincpu;
140 	required_device<at89c52_device> m_audiocpu;
141 	required_device_array<okim6295_device, 2> m_oki;
142 	required_device<palette_device> m_palette;
143 	void pasha2_io(address_map &map);
144 	void pasha2_map(address_map &map);
145 };
146 
147 
pasha2_misc_w(offs_t offset,uint16_t data)148 void pasha2_state::pasha2_misc_w(offs_t offset, uint16_t data)
149 {
150 	if (offset)
151 	{
152 		if (data & 0x0800)
153 		{
154 			int bank = data & 0xf000;
155 
156 			switch (bank)
157 			{
158 				case 0x8000:
159 				case 0x9000:
160 				case 0xa000:
161 				case 0xb000:
162 				case 0xc000:
163 				case 0xd000:
164 					m_mainbank->set_entry((bank>>12) & 7); break;
165 			}
166 		}
167 	}
168 }
169 
pasha2_palette_w(offs_t offset,uint16_t data,uint16_t mem_mask)170 void pasha2_state::pasha2_palette_w(offs_t offset, uint16_t data, uint16_t mem_mask)
171 {
172 	int color;
173 
174 	COMBINE_DATA(&m_paletteram[offset]);
175 
176 	offset &= 0xff;
177 
178 	color = (m_paletteram[offset] >> 8) | (m_paletteram[offset + 0x100] & 0xff00);
179 	m_palette->set_pen_color(offset * 2 + 0, pal5bit(color), pal5bit(color >> 5), pal5bit(color >> 10));
180 
181 	color = (m_paletteram[offset] & 0xff) | ((m_paletteram[offset + 0x100] & 0xff) << 8);
182 	m_palette->set_pen_color(offset * 2 + 1, pal5bit(color), pal5bit(color >> 5), pal5bit(color >> 10));
183 }
184 
vbuffer_set_w(uint16_t data)185 void pasha2_state::vbuffer_set_w(uint16_t data)
186 {
187 	m_vbuffer = 1;
188 }
189 
vbuffer_clear_w(uint16_t data)190 void pasha2_state::vbuffer_clear_w(uint16_t data)
191 {
192 	m_vbuffer = 0;
193 }
194 
bitmap_0_w(offs_t offset,uint8_t data,uint8_t mem_mask)195 void pasha2_state::bitmap_0_w(offs_t offset, uint8_t data, uint8_t mem_mask)
196 {
197 	COMBINE_DATA(&m_bitmap0[m_vbuffer][offset]);
198 }
199 
bitmap_1_w(offs_t offset,uint8_t data,uint8_t mem_mask)200 void pasha2_state::bitmap_1_w(offs_t offset, uint8_t data, uint8_t mem_mask)
201 {
202 	// handle overlapping pixels without writing them
203 	if ((data & 0xff) == 0xff)
204 		return;
205 
206 	COMBINE_DATA(&m_bitmap1[m_vbuffer][offset]);
207 }
208 
209 template<int Chip>
oki_bank_w(offs_t offset,uint16_t data)210 void pasha2_state::oki_bank_w(offs_t offset, uint16_t data)
211 {
212 	if (offset)
213 		m_oki[Chip]->set_rom_bank(data & 1);
214 }
215 
pasha2_lamps_w(uint16_t data)216 void pasha2_state::pasha2_lamps_w(uint16_t data)
217 {
218 	for (int p = 0; p < 3; p++)
219 	{
220 		m_lamps_r[p] = BIT(data, (p << 2) | 0);
221 		m_lamps_g[p] = BIT(data, (p << 2) | 1);
222 		m_lamps_b[p] = BIT(data, (p << 2) | 2);
223 	}
224 }
225 
pasha2_map(address_map & map)226 void pasha2_state::pasha2_map(address_map &map)
227 {
228 	map(0x00000000, 0x001fffff).ram().share("wram");
229 	map(0x40000000, 0x4001ffff).ram().w(FUNC(pasha2_state::bitmap_0_w));
230 	map(0x40020000, 0x4003ffff).ram().w(FUNC(pasha2_state::bitmap_1_w));
231 	map(0x40060000, 0x40060001).nopw();
232 	map(0x40064000, 0x40064001).nopw();
233 	map(0x40068000, 0x40068001).nopw();
234 	map(0x4006c000, 0x4006c001).nopw();
235 	map(0x40070000, 0x40070001).w(FUNC(pasha2_state::vbuffer_clear_w));
236 	map(0x40074000, 0x40074001).w(FUNC(pasha2_state::vbuffer_set_w));
237 	map(0x40078000, 0x40078001).nopw(); //once at startup -> to disable the eeprom?
238 	map(0x80000000, 0x803fffff).bankr("mainbank");
239 	map(0xe0000000, 0xe00003ff).ram().w(FUNC(pasha2_state::pasha2_palette_w)).share("paletteram"); //tilemap? palette?
240 	map(0xfff80000, 0xffffffff).rom().region("maincpu", 0);
241 }
242 
pasha2_io(address_map & map)243 void pasha2_state::pasha2_io(address_map &map)
244 {
245 	map(0x08, 0x0b).nopr(); //sound status?
246 	map(0x18, 0x1b).nopr(); //sound status?
247 	map(0x20, 0x23).w(FUNC(pasha2_state::pasha2_lamps_w));
248 	map(0x40, 0x43).portr("COINS");
249 	map(0x60, 0x63).portr("DSW");
250 	map(0x80, 0x83).portr("INPUTS");
251 	map(0xa0, 0xa3).nopw(); //soundlatch?
252 	map(0xc0, 0xc3).w(FUNC(pasha2_state::pasha2_misc_w));
253 	map(0xe3, 0xe3).rw(m_oki[0], FUNC(okim6295_device::read), FUNC(okim6295_device::write));
254 	map(0xe7, 0xe7).rw(m_oki[1], FUNC(okim6295_device::read), FUNC(okim6295_device::write));
255 	map(0xe8, 0xeb).w(FUNC(pasha2_state::oki_bank_w<0>));
256 	map(0xec, 0xef).w(FUNC(pasha2_state::oki_bank_w<1>));
257 }
258 
259 static INPUT_PORTS_START( pasha2 )
260 	PORT_START("COINS")
261 	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_UNKNOWN )
262 	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_UNKNOWN )
263 	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_UNKNOWN )
264 	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_UNKNOWN )
265 	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_UNKNOWN )
266 	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_UNKNOWN )
267 	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_UNKNOWN )
268 	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_UNKNOWN )
269 	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_COIN1 )
270 	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_COIN2 )
271 	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_COIN3 )
272 	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
273 	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_UNKNOWN )
274 	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_UNKNOWN )
275 	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_UNKNOWN )
276 	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_UNKNOWN )
277 
278 	// 2 physical dip-switches
279 	PORT_START("DSW")
DEF_STR(Unknown)280 	PORT_DIPNAME( 0x0001, 0x0001, DEF_STR( Unknown ) )
281 	PORT_DIPSETTING(      0x0001, DEF_STR( Off ) )
282 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
283 	PORT_DIPNAME( 0x0002, 0x0002, DEF_STR( Unknown ) )
284 	PORT_DIPSETTING(      0x0002, DEF_STR( Off ) )
285 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
286 	PORT_DIPNAME( 0x0004, 0x0004, DEF_STR( Unknown ) )
287 	PORT_DIPSETTING(      0x0004, DEF_STR( Off ) )
288 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
289 	PORT_DIPNAME( 0x0018, 0x0008, DEF_STR( Lives ) )
290 	PORT_DIPSETTING(      0x0018, "1" )
291 	PORT_DIPSETTING(      0x0010, "2" )
292 	PORT_DIPSETTING(      0x0008, "3" )
293 	PORT_DIPSETTING(      0x0000, "5" )
294 	PORT_DIPNAME( 0x0060, 0x0060, DEF_STR( Coinage ) )
295 	PORT_DIPSETTING(      0x0000, DEF_STR( 5C_1C ) )
296 	PORT_DIPSETTING(      0x0020, DEF_STR( 3C_1C ) )
297 	PORT_DIPSETTING(      0x0040, DEF_STR( 2C_1C ) )
298 	PORT_DIPSETTING(      0x0060, DEF_STR( 1C_1C ) )
299 	PORT_DIPNAME( 0x0080, 0x0080, DEF_STR( Free_Play ) )
300 	PORT_DIPSETTING(      0x0080, DEF_STR( Off ) )
301 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
302 	PORT_DIPNAME( 0x0100, 0x0100, DEF_STR( Unknown ) )
303 	PORT_DIPSETTING(      0x0100, DEF_STR( Off ) )
304 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
305 	PORT_DIPNAME( 0x0200, 0x0200, DEF_STR( Unknown ) )
306 	PORT_DIPSETTING(      0x0200, DEF_STR( Off ) )
307 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
308 	PORT_DIPNAME( 0x0400, 0x0400, DEF_STR( Unknown ) )
309 	PORT_DIPSETTING(      0x0400, DEF_STR( Off ) )
310 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
311 	PORT_DIPNAME( 0x0800, 0x0800, DEF_STR( Unknown ) )
312 	PORT_DIPSETTING(      0x0800, DEF_STR( Off ) )
313 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
314 	PORT_DIPNAME( 0x1000, 0x1000, DEF_STR( Unknown ) )
315 	PORT_DIPSETTING(      0x1000, DEF_STR( Off ) )
316 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
317 	PORT_DIPNAME( 0x2000, 0x2000, DEF_STR( Unknown ) )
318 	PORT_DIPSETTING(      0x2000, DEF_STR( Off ) )
319 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
320 	PORT_DIPNAME( 0x4000, 0x4000, DEF_STR( Unknown ) )
321 	PORT_DIPSETTING(      0x4000, DEF_STR( Off ) )
322 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
323 	PORT_DIPNAME( 0x8000, 0x8000, DEF_STR( Unknown ) )
324 	PORT_DIPSETTING(      0x8000, DEF_STR( Off ) )
325 	PORT_DIPSETTING(      0x0000, DEF_STR( On ) )
326 
327 	PORT_START("INPUTS")
328 	PORT_BIT( 0x0001, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(1)
329 	PORT_BIT( 0x0002, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(1)
330 	PORT_BIT( 0x0004, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(1)
331 	PORT_BIT( 0x0008, IP_ACTIVE_LOW, IPT_START1 )
332 	PORT_BIT( 0x0010, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(2)
333 	PORT_BIT( 0x0020, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(2)
334 	PORT_BIT( 0x0040, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(2)
335 	PORT_BIT( 0x0080, IP_ACTIVE_LOW, IPT_START2 )
336 	PORT_BIT( 0x0100, IP_ACTIVE_LOW, IPT_UNKNOWN )
337 	PORT_BIT( 0x0200, IP_ACTIVE_LOW, IPT_UNKNOWN )
338 	PORT_BIT( 0x0400, IP_ACTIVE_LOW, IPT_UNKNOWN )
339 	PORT_BIT( 0x0800, IP_ACTIVE_LOW, IPT_UNKNOWN )
340 	PORT_BIT( 0x1000, IP_ACTIVE_LOW, IPT_BUTTON1 ) PORT_PLAYER(3)
341 	PORT_BIT( 0x2000, IP_ACTIVE_LOW, IPT_BUTTON2 ) PORT_PLAYER(3)
342 	PORT_BIT( 0x4000, IP_ACTIVE_LOW, IPT_BUTTON3 ) PORT_PLAYER(3)
343 	PORT_BIT( 0x8000, IP_ACTIVE_LOW, IPT_START3 )
344 INPUT_PORTS_END
345 
346 void pasha2_state::video_start()
347 {
348 	for (int i = 0; i < 2; i++)
349 	{
350 		m_bitmap0[i] = make_unique_clear<uint8_t[]>(0x20000);
351 		m_bitmap1[i] = make_unique_clear<uint8_t[]>(0x20000);
352 		save_pointer(NAME(m_bitmap0[i]), 0x20000, i);
353 		save_pointer(NAME(m_bitmap1[i]), 0x20000, i);
354 	}
355 }
356 
screen_update_pasha2(screen_device & screen,bitmap_ind16 & bitmap,const rectangle & cliprect)357 uint32_t pasha2_state::screen_update_pasha2(screen_device &screen, bitmap_ind16 &bitmap, const rectangle &cliprect)
358 {
359 	/* 2 512x256 bitmaps */
360 
361 	for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
362 	{
363 		int count = cliprect.min_x | (y << 9);
364 		for (int x = cliprect.min_x; x <= cliprect.max_x; x++)
365 		{
366 			bitmap.pix(y, x) = m_bitmap0[(m_vbuffer ^ 1)][count++] | 0x100;
367 		}
368 	}
369 
370 	for (int y = cliprect.min_y; y <= cliprect.max_y; y++)
371 	{
372 		int count = cliprect.min_x | (y << 9);
373 		for (int x = cliprect.min_x; x <= cliprect.max_x; x++)
374 		{
375 			int color = m_bitmap1[(m_vbuffer ^ 1)][count++];
376 			if (color != 0)
377 				bitmap.pix(y, x) = color;
378 
379 		}
380 	}
381 
382 	return 0;
383 }
384 
machine_start()385 void pasha2_state::machine_start()
386 {
387 	m_lamps_r.resolve();
388 	m_lamps_g.resolve();
389 	m_lamps_b.resolve();
390 	save_item(NAME(m_vbuffer));
391 }
392 
machine_reset()393 void pasha2_state::machine_reset()
394 {
395 	m_vbuffer = 0;
396 }
397 
pasha2(machine_config & config)398 void pasha2_state::pasha2(machine_config &config)
399 {
400 	/* basic machine hardware */
401 	E116XT(config, m_maincpu, 20000000*4);     /* 4x internal multiplier */
402 	m_maincpu->set_addrmap(AS_PROGRAM, &pasha2_state::pasha2_map);
403 	m_maincpu->set_addrmap(AS_IO, &pasha2_state::pasha2_io);
404 	m_maincpu->set_vblank_int("screen", FUNC(pasha2_state::irq0_line_hold));
405 
406 	AT89C52(config, m_audiocpu, 12000000);     /* clock from docs */
407 	/* TODO : ports are unimplemented; P0,P1,P2,P3 and Serial Port Used */
408 
409 	EEPROM_93C46_16BIT(config, "eeprom");
410 
411 	/* video hardware */
412 	screen_device &screen(SCREEN(config, "screen", SCREEN_TYPE_RASTER));
413 	screen.set_refresh_hz(60);
414 	screen.set_vblank_time(ATTOSECONDS_IN_USEC(0));
415 	screen.set_size(512, 512);
416 	screen.set_visarea(0, 383, 0, 239);
417 	screen.set_screen_update(FUNC(pasha2_state::screen_update_pasha2));
418 	screen.set_palette(m_palette);
419 
420 	PALETTE(config, m_palette).set_entries(0x200);
421 
422 	/* sound hardware */
423 	SPEAKER(config, "mono").front_center();
424 
425 	OKIM6295(config, m_oki[0], 1000000, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 1.0);
426 
427 	OKIM6295(config, m_oki[1], 1000000, okim6295_device::PIN7_HIGH).add_route(ALL_OUTPUTS, "mono", 1.0);
428 
429 	//and ATMEL DREAM SAM9773
430 }
431 
432 ROM_START( pasha2 )
433 	ROM_REGION16_BE( 0x80000, "maincpu", 0 ) /* Hyperstone CPU Code */
434 	ROM_LOAD( "pp2.u3",       0x00000, 0x80000, CRC(1c701273) SHA1(f465323a1d3f2fd752c51c178fafe4cc866e28d6) )
435 
436 	ROM_REGION16_BE( 0x400000*6, "bankeddata", ROMREGION_ERASEFF ) /* data roms */
437 	ROM_LOAD16_BYTE( "pp2-u2.u101",  0x000000, 0x200000, CRC(85c4a2d0) SHA1(452b24b74bd0b65d2d6852486e2917f94e21ecc8) )
438 	ROM_LOAD16_BYTE( "pp2-u1.u101",  0x000001, 0x200000, CRC(96cbd04e) SHA1(a4e7dd61194584b3c4217674d78ab2fd96b7b2e0) )
439 	ROM_LOAD16_BYTE( "pp2-u2.u102",  0x400000, 0x200000, CRC(2097d88c) SHA1(7597578e6ddca00909feac35d9d7331f783b2bd6) )
440 	ROM_LOAD16_BYTE( "pp2-u1.u102",  0x400001, 0x200000, CRC(7a3492fb) SHA1(de72c4d10e17eaf2b7531f637b42cbb3d07819b5) )
441 	// empty space, but no empty sockets on the pcb
442 
443 	ROM_REGION( 0x2000, "audiocpu", 0 ) /* AT89C52 */
444 	ROM_LOAD( "89c52.bin",  0x0000, 0x2000, CRC(9ce43ce4) SHA1(8027a3549b38e9a2e7bb8f518a0defcaf9743371) ) // music play 1.0
445 
446 	ROM_REGION( 0x80000, "sam9773", 0 ) /* SAM9773 sound data */
447 	ROM_LOAD( "pp2.um2",      0x00000, 0x80000, CRC(86814b37) SHA1(70f8a94410e362669570c39e00492c0d69de6b17) )
448 
449 	ROM_REGION( 0x80000, "oki1", 0 ) /* Oki Samples */
450 	ROM_LOAD( "pp2.um51",     0x00000, 0x80000, CRC(3b1b1a30) SHA1(1ea1266d280a2b96ac4ef9fe8ee7b1a5f7861672) )
451 
452 	ROM_REGION( 0x80000, "oki2", 0 ) /* Oki Samples */
453 	ROM_LOAD( "pp2.um53",     0x00000, 0x80000, CRC(8a29ad03) SHA1(3e9b0c86d8e3bb0b7691f68ad45431f6f9e8edbd) )
454 ROM_END
455 
pasha2_speedup_r(offs_t offset)456 uint16_t pasha2_state::pasha2_speedup_r(offs_t offset)
457 {
458 	if(m_maincpu->pc() == 0x8302)
459 		m_maincpu->spin_until_interrupt();
460 
461 	return m_wram[(0x95744 / 2) + offset];
462 }
463 
init_pasha2()464 void pasha2_state::init_pasha2()
465 {
466 	m_maincpu->space(AS_PROGRAM).install_read_handler(0x95744, 0x95747, read16sm_delegate(*this, FUNC(pasha2_state::pasha2_speedup_r)));
467 
468 	m_mainbank->configure_entries(0, 6, memregion("bankeddata")->base(), 0x400000);
469 	m_mainbank->set_entry(0);
470 }
471 
472 GAMEL( 1998, pasha2, 0, pasha2, pasha2, pasha2_state, init_pasha2, ROT0, "Dong Sung", "Pasha Pasha 2", MACHINE_IMPERFECT_SOUND | MACHINE_SUPPORTS_SAVE, layout_pasha2 )
473