1 // license:BSD-3-Clause
2 // copyright-holders:Aaron Giles
3 /***************************************************************************
4
5 Emulation of various Midway ICs
6
7 ***************************************************************************/
8 #ifndef MAME_MACHINE_MIDWAY_IC_H
9 #define MAME_MACHINE_MIDWAY_IC_H
10
11 #pragma once
12
13
14 #include "audio/cage.h"
15 #include "audio/dcs.h"
16 #include "cpu/pic16c5x/pic16c5x.h"
17
18 /* 1st generation Midway serial PIC - simulation*/
19
20 class midway_serial_pic_device : public device_t
21 {
22 public:
23 // construction/destruction
24 midway_serial_pic_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
25
set_upper(int upper)26 void set_upper(int upper) { m_upper = upper; }
27
28 u8 read();
29 void write(u8 data);
30 u8 status_r();
31 DECLARE_WRITE_LINE_MEMBER( reset_w );
32
33 protected:
34 midway_serial_pic_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
35
36 // device-level overrides
37 virtual void device_start() override;
38 virtual void device_reset() override;
39 virtual ioport_constructor device_input_ports() const override;
40
41 void generate_serial_data(int upper);
42 void serial_register_state();
43
44 required_ioport m_io_serial_digit;
45
46 uint8_t m_data[16]; // reused by other devices
47 int m_upper;
48
49 private:
50 uint8_t m_buff;
51 uint8_t m_idx;
52 uint8_t m_status;
53 uint8_t m_bits;
54 };
55
56
57 // device type definition
DECLARE_DEVICE_TYPE(MIDWAY_SERIAL_PIC,midway_serial_pic_device)58 DECLARE_DEVICE_TYPE(MIDWAY_SERIAL_PIC, midway_serial_pic_device)
59
60 /* 1st generation Midway serial PIC - emulation */
61
62 class midway_serial_pic_emu_device : public device_t
63 {
64 public:
65 // construction/destruction
66 midway_serial_pic_emu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
67
68 u8 read();
69 void write(u8 data);
70 u8 status_r();
71 DECLARE_WRITE_LINE_MEMBER(reset_w);
72
73 protected:
74 midway_serial_pic_emu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
75
76 // device-level overrides
77 virtual void device_add_mconfig(machine_config &config) override;
78 virtual void device_start() override;
79
80 private:
81 required_device<pic16c57_device> m_pic;
82
83 u8 read_c();
84 void write_c(u8 data);
85
86 u8 m_command;
87 u8 m_data_out;
88 u8 m_clk;
89 u8 m_status;
90 };
91
92
93 // device type definition
DECLARE_DEVICE_TYPE(MIDWAY_SERIAL_PIC_EMU,midway_serial_pic_emu_device)94 DECLARE_DEVICE_TYPE(MIDWAY_SERIAL_PIC_EMU, midway_serial_pic_emu_device)
95
96
97
98 /* 2nd generation Midway serial/NVRAM/RTC PIC */
99
100 // ======================> midway_serial_pic2_device
101
102 class midway_serial_pic2_device : public midway_serial_pic_device, public device_nvram_interface
103 {
104 public:
105 // construction/destruction
106 midway_serial_pic2_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
107
108 void set_yearoffs(int yearoffs) { m_yearoffs = yearoffs; }
109
110 u8 read();
111 void write(u8 data);
112 u8 status_r();
113
114 void set_default_nvram(const uint8_t *nvram);
115
116 protected:
117 midway_serial_pic2_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock);
118
119 // device-level overrides
120 virtual void device_start() override;
121
122 // device_nvram_interface overrides
123 virtual void nvram_default() override;
124 virtual void nvram_read(emu_file &file) override;
125 virtual void nvram_write(emu_file &file) override;
126
127 private:
128
129 void pic_register_state();
130 TIMER_CALLBACK_MEMBER( reset_timer );
131
132 uint16_t m_latch;
133 attotime m_latch_expire_time;
134 uint8_t m_state;
135 uint8_t m_index;
136 uint8_t m_total;
137 uint8_t m_nvram_addr;
138 uint8_t m_buffer[0x10];
139 uint8_t m_nvram[0x100];
140 uint8_t m_default_nvram[0x100];
141 uint8_t m_time_buf[8];
142 uint8_t m_time_index;
143 uint8_t m_time_just_written;
144 uint16_t m_yearoffs;
145 emu_timer *m_time_write_timer;
146 };
147
148
149 // device type definition
DECLARE_DEVICE_TYPE(MIDWAY_SERIAL_PIC2,midway_serial_pic2_device)150 DECLARE_DEVICE_TYPE(MIDWAY_SERIAL_PIC2, midway_serial_pic2_device)
151
152 /* I/O ASIC connected to 2nd generation PIC */
153
154 // ======================> midway_ioasic_device
155
156 class midway_ioasic_device : public midway_serial_pic2_device
157 {
158 public:
159 // construction/destruction
160 midway_ioasic_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
161
162 void set_shuffle(uint8_t shuffle) { m_shuffle_type = shuffle; }
163 void set_shuffle_default(uint8_t shuffle) { m_shuffle_default = shuffle; }
164 void set_auto_ack(uint8_t auto_ack) { m_auto_ack = auto_ack; }
165 auto irq_handler() { return m_irq_callback.bind(); }
166 auto serial_tx_handler() { return m_serial_tx_cb.bind(); }
167 auto aux_output_handler() { return m_aux_output_cb.bind(); }
168
169 void set_shuffle_state(int state);
170 void fifo_w(uint16_t data);
171 void fifo_full_w(uint16_t data);
172
173 DECLARE_WRITE_LINE_MEMBER(fifo_reset_w);
174 uint16_t fifo_r();
175 uint16_t fifo_status_r(address_space &space);
176
177 DECLARE_WRITE_LINE_MEMBER(ioasic_input_empty);
178 DECLARE_WRITE_LINE_MEMBER(ioasic_output_full);
179
180 uint32_t read(address_space &space, offs_t offset);
181 void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
182 uint32_t packed_r(address_space &space, offs_t offset, uint32_t mem_mask = ~0);
183 void packed_w(offs_t offset, uint32_t data, uint32_t mem_mask = ~0);
184
185 void cage_irq_handler(uint8_t data);
186
187 void serial_rx_w(u8 data);
188
189 void ioasic_reset();
190
191 protected:
192 // device-level overrides
193 virtual void device_start() override;
194
195 private:
196 void ioasic_register_state();
197 void update_ioasic_irq();
198
199 required_ioport m_io_dips;
200 required_ioport m_io_system;
201 required_ioport m_io_in1;
202 required_ioport m_io_in2;
203
204 devcb_write8 m_serial_tx_cb;
205 devcb_write32 m_aux_output_cb;
206
207 uint32_t m_reg[16];
208 uint8_t m_has_dcs;
209 uint8_t m_has_cage;
210 cpu_device *m_dcs_cpu;
211 uint8_t m_shuffle_type;
212 uint8_t m_shuffle_default;
213 uint8_t m_shuffle_active;
214 const uint8_t * m_shuffle_map;
215 devcb_write8 m_irq_callback;
216 uint8_t m_irq_state;
217 uint16_t m_sound_irq_state;
218 uint8_t m_auto_ack;
219 uint8_t m_force_fifo_full;
220
221 uint16_t m_fifo[512];
222 uint16_t m_fifo_in;
223 uint16_t m_fifo_out;
224 uint16_t m_fifo_bytes;
225 offs_t m_fifo_force_buffer_empty_pc;
226
227 optional_device<atari_cage_device> m_cage;
228 optional_device<dcs_audio_device> m_dcs;
229 };
230
231
232 // device type definition
233 DECLARE_DEVICE_TYPE(MIDWAY_IOASIC, midway_ioasic_device)
234
235 enum
236 {
237 MIDWAY_IOASIC_STANDARD = 0,
238 MIDWAY_IOASIC_BLITZ99,
239 MIDWAY_IOASIC_CARNEVIL,
240 MIDWAY_IOASIC_CALSPEED,
241 MIDWAY_IOASIC_MACE,
242 MIDWAY_IOASIC_GAUNTDL,
243 MIDWAY_IOASIC_VAPORTRX,
244 MIDWAY_IOASIC_SFRUSHRK,
245 MIDWAY_IOASIC_HYPRDRIV
246 };
247
248 #endif // MAME_MACHINE_MIDWAY_IC_H
249