1 // license:BSD-3-Clause 2 // copyright-holders:Ryan Holtz 3 /********************************************************************* 4 5 sgi.h 6 7 Silicon Graphics MC (Memory Controller) code 8 9 *********************************************************************/ 10 11 #ifndef MAME_MACHINE_SGI_H 12 #define MAME_MACHINE_SGI_H 13 14 #pragma once 15 16 #include "machine/eepromser.h" 17 18 class sgi_mc_device : public device_t 19 { 20 public: 21 template <typename T, typename U> sgi_mc_device(const machine_config & mconfig,const char * tag,device_t * owner,T && cpu_tag,U && eeprom_tag)22 sgi_mc_device(const machine_config &mconfig, const char *tag, device_t *owner, T &&cpu_tag, U &&eeprom_tag) 23 : sgi_mc_device(mconfig, tag, owner, (uint32_t)0) 24 { 25 m_maincpu.set_tag(std::forward<T>(cpu_tag)); 26 m_eeprom.set_tag(std::forward<U>(eeprom_tag)); 27 } 28 sgi_mc_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 29 int_dma_done_cb()30 auto int_dma_done_cb() { return m_int_dma_done_cb.bind(); } eisa_present()31 auto eisa_present() { return m_eisa_present.bind(); } 32 33 uint32_t read(offs_t offset, uint32_t mem_mask = ~0); 34 void write(offs_t offset, uint32_t data, uint32_t mem_mask = ~0); 35 36 void set_cpu_buserr(uint32_t address, uint64_t mem_mask); get_mem_config(int channel)37 uint32_t get_mem_config(int channel) const { return m_mem_config[channel]; } 38 39 protected: 40 // device-level overrides 41 virtual void device_resolve_objects() override; 42 virtual void device_start() override; 43 virtual void device_reset() override; 44 virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override; 45 46 static const device_timer_id TIMER_RPSS = 0; 47 static const device_timer_id TIMER_DMA = 1; 48 49 private: 50 enum 51 { 52 MODE_TO_HOST = (1 << 1), 53 MODE_SYNC = (1 << 2), 54 MODE_FILL = (1 << 3), 55 MODE_DIR = (1 << 4), 56 MODE_SNOOP = (1 << 5) 57 }; 58 59 uint32_t dma_translate(uint32_t address); 60 void dma_immediate(); 61 get_line_count()62 uint32_t get_line_count() { return m_dma_size >> 16; } get_line_width()63 uint32_t get_line_width() { return (uint16_t)m_dma_size; } get_line_zoom()64 uint32_t get_line_zoom() { return (m_dma_stride >> 16) & 0x3ff; } get_stride()65 int16_t get_stride() { return (int16_t)m_dma_stride; } get_zoom_count()66 uint32_t get_zoom_count() { return (m_dma_count >> 16) & 0x3ff; } get_byte_count()67 uint32_t get_byte_count() { return (uint16_t)m_dma_count; } 68 69 required_device<cpu_device> m_maincpu; 70 required_device<eeprom_serial_93cxx_device> m_eeprom; 71 72 devcb_write_line m_int_dma_done_cb; 73 devcb_read_line m_eisa_present; 74 75 address_space *m_space; 76 77 emu_timer *m_rpss_timer; 78 emu_timer *m_dma_timer; 79 80 uint32_t m_cpu_control[2]; 81 uint32_t m_watchdog; 82 uint32_t m_sys_id; 83 uint32_t m_rpss_divider; 84 uint32_t m_refcnt_preload; 85 uint32_t m_refcnt; 86 uint32_t m_gio64_arb_param; 87 uint32_t m_arb_cpu_time; 88 uint32_t m_arb_burst_time; 89 uint32_t m_mem_config[2]; 90 uint32_t m_cpu_mem_access_config; 91 uint32_t m_gio_mem_access_config; 92 uint32_t m_cpu_error_addr; 93 uint32_t m_cpu_error_status; 94 uint32_t m_gio_error_addr; 95 uint32_t m_gio_error_status; 96 uint32_t m_sys_semaphore; 97 uint32_t m_gio_lock; 98 uint32_t m_eisa_lock; 99 uint32_t m_gio64_translate_mask; 100 uint32_t m_gio64_substitute_bits; 101 uint32_t m_dma_int_cause; 102 uint32_t m_dma_control; 103 uint32_t m_dma_tlb_entry_hi[4]; 104 uint32_t m_dma_tlb_entry_lo[4]; 105 uint32_t m_rpss_counter; 106 uint32_t m_dma_mem_addr; 107 uint32_t m_dma_size; 108 uint32_t m_dma_stride; 109 uint32_t m_dma_gio64_addr; 110 uint32_t m_dma_mode; 111 uint32_t m_dma_count; 112 uint32_t m_dma_run; 113 uint32_t m_eeprom_ctrl; 114 uint32_t m_semaphore[16]; 115 int m_rpss_divide_counter; 116 int m_rpss_divide_count; 117 uint8_t m_rpss_increment; 118 }; 119 120 DECLARE_DEVICE_TYPE(SGI_MC, sgi_mc_device) 121 122 123 #endif // MAME_MACHINE_SGI_H 124