1 // license:BSD-3-Clause 2 // copyright-holders:Fabio Priuli 3 #ifndef MAME_BUS_NES_NES_SLOT_H 4 #define MAME_BUS_NES_NES_SLOT_H 5 6 #pragma once 7 8 #include "softlist_dev.h" 9 10 11 /*************************************************************************** 12 TYPE DEFINITIONS 13 ***************************************************************************/ 14 15 // uncomment this for *very* verbose logging of most cart accesses 16 //#define NES_PCB_DEBUG 17 18 /* Boards */ 19 enum 20 { 21 STD_NROM = 0, 22 STD_AXROM, STD_AMROM, STD_BXROM, 23 STD_CNROM, STD_CPROM, 24 STD_EXROM, STD_FXROM, STD_GXROM, 25 STD_HKROM, STD_PXROM, 26 STD_SXROM, STD_TXROM, STD_TXSROM, 27 STD_TKROM, STD_TQROM, 28 STD_UXROM, STD_UN1ROM, UXROM_CC, 29 HVC_FAMBASIC, NES_QJ, PAL_ZZ, STD_EVENT, 30 STD_SXROM_A, STD_SOROM, STD_SOROM_A, 31 STD_DISKSYS, 32 STD_NROM368,//homebrew extension of NROM! 33 /* Discrete components boards (by various manufacturer) */ 34 DIS_74X161X138, DIS_74X139X74, 35 DIS_74X377, DIS_74X161X161X32, 36 /* Active Enterprises */ 37 ACTENT_ACT52, 38 /* AGCI */ 39 AGCI_50282, 40 /* AVE */ 41 AVE_NINA01, AVE_NINA06, AVE_MAXI15, 42 /* Bandai */ 43 BANDAI_FJUMP2, BANDAI_PT554, 44 BANDAI_DATACH, BANDAI_KARAOKE, BANDAI_OEKAKIDS, 45 BANDAI_FCG, BANDAI_LZ93, BANDAI_LZ93EX1, BANDAI_LZ93EX2, 46 /* Caltron */ 47 CALTRON_6IN1, 48 /* Camerica */ 49 CAMERICA_BF9093, CAMERICA_BF9096, CAMERICA_ALADDIN, 50 CAMERICA_GOLDENFIVE, GG_NROM, 51 /* Dreamtech */ 52 DREAMTECH_BOARD, 53 /* Irem */ 54 IREM_G101, IREM_H3001, IREM_LROG017, 55 IREM_TAM_S1, IREM_HOLYDIVR, 56 /* Jaleco */ 57 JALECO_SS88006, JALECO_JF11, JALECO_JF13, 58 JALECO_JF16, JALECO_JF17, JALECO_JF17_ADPCM, 59 JALECO_JF19, JALECO_JF19_ADPCM, JALECO_JF23, 60 JALECO_JF24, JALECO_JF29, JALECO_JF33, 61 /* Konami */ 62 KONAMI_VRC1, KONAMI_VRC2, KONAMI_VRC3, 63 KONAMI_VRC4, KONAMI_VRC6, KONAMI_VRC7, 64 /* Namcot */ 65 NAMCOT_163, NAMCOT_175, NAMCOT_340, 66 NAMCOT_3425, NAMCOT_34X3, NAMCOT_3446, 67 /* NTDEC */ 68 NTDEC_ASDER, NTDEC_FIGHTINGHERO, 69 /* Rex Soft */ 70 REXSOFT_SL1632, REXSOFT_DBZ5, 71 /* Sachen */ 72 SACHEN_8259A, SACHEN_8259B, SACHEN_8259C, SACHEN_8259D, 73 SACHEN_SA009, SACHEN_SA0036, SACHEN_SA0037, 74 SACHEN_SA72007, SACHEN_SA72008, SACHEN_TCA01, 75 SACHEN_TCU01, SACHEN_TCU02, SACHEN_SA9602B, 76 SACHEN_74LS374, SACHEN_74LS374_ALT, SACHEN_SHERO, 77 /* Sunsoft */ 78 SUNSOFT_1, SUNSOFT_2, SUNSOFT_3, SUNSOFT_4, 79 SUNSOFT_DCS, SUNSOFT_5, SUNSOFT_FME7, 80 /* Taito */ 81 TAITO_TC0190FMC, TAITO_TC0190FMCP, 82 TAITO_X1_005, TAITO_X1_017, 83 /* Tengen */ 84 TENGEN_800008, TENGEN_800032, TENGEN_800037, 85 /* TXC */ 86 TXC_22211, TXC_DUMARACING, TXC_MJBLOCK, 87 TXC_COMMANDOS, TXC_TW, TXC_STRIKEW, 88 /* Multigame Carts */ 89 BMC_64IN1NR, BMC_190IN1, BMC_A65AS, 90 BMC_HIK8IN1, BMC_NOVEL1, BMC_NOVEL2, BMC_S24IN1SC03, BMC_T262, 91 BMC_WS, BMC_SUPERBIG_7IN1, BMC_SUPERHIK_4IN1, BMC_BALLGAMES_11IN1, 92 BMC_MARIOPARTY_7IN1, BMC_GOLD_7IN1, BMC_SUPER_700IN1, BMC_FAMILY_4646, 93 BMC_36IN1, BMC_21IN1, BMC_150IN1, BMC_35IN1, BMC_64IN1, 94 BMC_15IN1, BMC_SUPERHIK_300IN1, BMC_SUPERGUN_20IN1, 95 BMC_GOLDENCARD_6IN1, BMC_72IN1, BMC_SUPER_42IN1, BMC_76IN1, 96 BMC_31IN1, BMC_22GAMES, BMC_20IN1, BMC_110IN1, 97 BMC_70IN1, BMC_800IN1, BMC_1200IN1, 98 BMC_GKA, BMC_GKB, BMC_VT5201, BMC_BENSHIENG, BMC_810544, 99 BMC_NTD_03, BMC_G63IN1, BMC_FK23C, BMC_FK23CA, BMC_PJOY84, 100 BMC_POWERFUL_255, BMC_11160, BMC_G146, BMC_8157, BMC_830118C, 101 BMC_411120C, BMC_GOLD150, BMC_GOLD260, BMC_CH001, BMC_SUPER22, 102 BMC_12IN1, BMC_4IN1RESET, BMC_42IN1RESET, 103 /* Unlicensed */ 104 UNL_8237, UNL_CC21, UNL_AX5705, UNL_KOF97, UNL_KS7057, 105 UNL_N625092, UNL_SC127, UNL_SMB2J, UNL_T230, UNL_MMALEE, 106 UNL_UXROM, UNL_MK2, UNL_XIAOZY, UNL_KOF96, 107 UNL_SF3, UNL_RACERMATE, UNL_EDU2K, UNL_LH53, UNL_LH32, UNL_LH10, 108 UNL_STUDYNGAME, UNL_603_5052, UNL_H2288, UNL_2708, 109 UNL_MALISB, UNL_BB, UNL_AC08, UNL_A9746, UNL_WORLDHERO, 110 UNL_43272, UNL_TF1201, UNL_CITYFIGHT, UNL_RT01, 111 /* Bootleg boards */ 112 BTL_SMB2JA, BTL_MARIOBABY, BTL_AISENSHINICOL, BTL_TOBIDASE, 113 BTL_SMB2JB, BTL_09034A, BTL_SMB3, BTL_SBROS11, BTL_DRAGONNINJA, 114 BTL_PIKACHUY2K, BTL_SHUIGUAN, 115 /* Misc: these are needed to convert mappers to boards, I will sort them later */ 116 OPENCORP_DAOU306, HES_BOARD, SVISION16_BOARD, RUMBLESTATION_BOARD, JYCOMPANY_A, JYCOMPANY_B, JYCOMPANY_C, 117 MAGICSERIES_MD, KASING_BOARD, FUTUREMEDIA_BOARD, FUKUTAKE_BOARD, SOMARI_SL12, 118 HENGG_SRICH, HENGG_XHZS, HENGG_SHJY3, SUBOR_TYPE0, SUBOR_TYPE1, SUBOR_TYPE2, 119 KAISER_KS7058, KAISER_KS7032, KAISER_KS7022, KAISER_KS7017, 120 KAISER_KS7012, KAISER_KS7013B, KAISER_KS202, KAISER_KS7031, 121 KAISER_KS7016, KAISER_KS7037, 122 CNE_DECATHLON, CNE_FSB, CNE_SHLZ, CONY_BOARD, YOKO_BOARD, 123 RCM_GS2015, RCM_GS2004, RCM_GS2013, RCM_TF9IN1, RCM_3DBLOCK, 124 WAIXING_TYPE_A, WAIXING_TYPE_A1, WAIXING_TYPE_B, WAIXING_TYPE_C, WAIXING_TYPE_D, 125 WAIXING_TYPE_E, WAIXING_TYPE_F, WAIXING_TYPE_G, WAIXING_TYPE_H, WAIXING_TYPE_H1, 126 WAIXING_TYPE_I, WAIXING_TYPE_J, WAIXING_FS304, 127 WAIXING_SGZLZ, WAIXING_SGZ, WAIXING_WXZS, WAIXING_SECURITY, WAIXING_SH2, 128 WAIXING_DQ8, WAIXING_FFV, WAIXING_WXZS2, SUPERGAME_LIONKING, SUPERGAME_BOOGERMAN, 129 KAY_BOARD, HOSENKAN_BOARD, NITRA_TDA, GOUDER_37017, NANJING_BOARD, 130 WHIRLWIND_2706, ZEMINA_BOARD, 131 NOCASH_NOCHR, // homebrew PCB design which uses NTRAM for CHRRAM 132 BTL_ACTION53, // homebrew PCB for homebrew multicarts 133 BTL_2A03_PURITANS, // homebrew PCB 134 /* FFE boards, for mappers 6, 8, 17 */ 135 FFE3_BOARD, FFE4_BOARD, FFE8_BOARD, TEST_BOARD, 136 /* Unsupported (for place-holder boards, with no working emulation) & no-board (at init) */ 137 UNSUPPORTED_BOARD, UNKNOWN_BOARD, NO_BOARD 138 }; 139 140 141 #define CHRROM 0 142 #define CHRRAM 1 143 144 145 #define CIRAM 0 146 #define VROM 1 147 #define EXRAM 2 148 #define MMC5FILL 3 149 #define CART_NTRAM 4 150 151 152 #define PPU_MIRROR_NONE 0 153 #define PPU_MIRROR_VERT 1 154 #define PPU_MIRROR_HORZ 2 155 #define PPU_MIRROR_HIGH 3 156 #define PPU_MIRROR_LOW 4 157 #define PPU_MIRROR_4SCREEN 5 158 159 160 // ======================> device_nes_cart_interface 161 162 class device_nes_cart_interface : public device_interface 163 { 164 public: 165 // construction/destruction 166 virtual ~device_nes_cart_interface(); 167 168 // reading and writing 169 virtual uint8_t read_l(offs_t offset); 170 virtual uint8_t read_m(offs_t offset); read_h(offs_t offset)171 virtual uint8_t read_h(offs_t offset) { return 0xff; } read_ex(offs_t offset)172 virtual uint8_t read_ex(offs_t offset) { return 0xff; } 173 virtual void write_l(offs_t offset, uint8_t data); 174 virtual void write_m(offs_t offset, uint8_t data); 175 virtual void write_h(offs_t offset, uint8_t data); write_ex(offs_t offset,uint8_t data)176 virtual void write_ex(offs_t offset, uint8_t data) { } 177 178 virtual uint8_t chr_r(offs_t offset); 179 virtual void chr_w(offs_t offset, uint8_t data); 180 virtual uint8_t nt_r(offs_t offset); 181 virtual void nt_w(offs_t offset, uint8_t data); 182 183 // hack until disk system is made modern! disk_flip_side()184 virtual void disk_flip_side() { } 185 186 void prg_alloc(size_t size, const char *tag); 187 void vrom_alloc(size_t size, const char *tag); 188 void prgram_alloc(size_t size); 189 void vram_alloc(size_t size); 190 void battery_alloc(size_t size); 191 get_mirroring()192 int get_mirroring() { return m_mirroring; } set_mirroring(int val)193 void set_mirroring(int val) { m_mirroring = val; } get_pcb_ctrl_mirror()194 bool get_pcb_ctrl_mirror() { return m_pcb_ctrl_mirror; } set_pcb_ctrl_mirror(bool val)195 void set_pcb_ctrl_mirror(bool val) { m_pcb_ctrl_mirror = val; } get_four_screen_vram()196 bool get_four_screen_vram() { return m_four_screen_vram; } set_four_screen_vram(bool val)197 void set_four_screen_vram(bool val) { m_four_screen_vram = val; } get_trainer()198 bool get_trainer() { return m_has_trainer; } set_trainer(bool val)199 void set_trainer(bool val) { m_has_trainer = val; } 200 set_ce(int mask,int state)201 void set_ce(int mask, int state) { m_ce_mask = mask; m_ce_state = state; } set_vrc_lines(int PRG_A,int PRG_B,int CHR)202 void set_vrc_lines(int PRG_A, int PRG_B, int CHR) { m_vrc_ls_prg_a = PRG_A; m_vrc_ls_prg_b = PRG_B; m_vrc_ls_chr = CHR; } set_n163_vol(int vol)203 void set_n163_vol(int vol) { m_n163_vol = vol; } set_x1_005_alt(bool val)204 void set_x1_005_alt(bool val) { m_x1_005_alt_mirroring = val; } set_bus_conflict(bool val)205 void set_bus_conflict(bool val) { m_bus_conflict = val; } get_open_bus()206 uint8_t get_open_bus() { return m_open_bus; } set_open_bus(uint8_t val)207 void set_open_bus(uint8_t val) { m_open_bus = val; } 208 get_prg_base()209 uint8_t *get_prg_base() { return m_prg; } get_prgram_base()210 uint8_t *get_prgram_base() { return &m_prgram[0]; } get_vrom_base()211 uint8_t *get_vrom_base() { return m_vrom; } get_vram_base()212 uint8_t *get_vram_base() { return &m_vram[0]; } get_ciram_base()213 uint8_t *get_ciram_base() { return m_ciram; } get_battery_base()214 uint8_t *get_battery_base() { return &m_battery[0]; } get_mapper_sram_base()215 uint8_t *get_mapper_sram_base() { return m_mapper_sram; } 216 get_prg_size()217 uint32_t get_prg_size() const { return m_prg_size; } get_prgram_size()218 uint32_t get_prgram_size() const { return m_prgram.size(); } get_vrom_size()219 uint32_t get_vrom_size() const { return m_vrom_size; } get_vram_size()220 uint32_t get_vram_size() const { return m_vram.size(); } get_battery_size()221 uint32_t get_battery_size() const { return m_battery.size(); } get_mapper_sram_size()222 uint32_t get_mapper_sram_size() const { return m_mapper_sram_size; } 223 ppu_latch(offs_t offset)224 virtual void ppu_latch(offs_t offset) {} hblank_irq(int scanline,int vblank,int blanked)225 virtual void hblank_irq(int scanline, int vblank, int blanked) {} scanline_irq(int scanline,int vblank,int blanked)226 virtual void scanline_irq(int scanline, int vblank, int blanked) {} 227 pcb_reset()228 virtual void pcb_reset() {} // many pcb expect specific PRG/CHR banking at start 229 virtual void pcb_start(running_machine &machine, uint8_t *ciram_ptr, bool cart_mounted); 230 void pcb_reg_postload(running_machine &machine); 231 void nes_banks_restore(); 232 233 uint8_t hi_access_rom(uint32_t offset); // helper ROM access for a bunch of PCB reading 0x8000-0xffff for protection too 234 uint8_t account_bus_conflict(uint32_t offset, uint8_t data); 235 236 protected: 237 device_nes_cart_interface(const machine_config &mconfig, device_t &device); 238 239 DECLARE_WRITE_LINE_MEMBER(set_irq_line); 240 void hold_irq_line(); 241 void reset_cpu(); 242 void poke(offs_t offset, uint8_t data); 243 244 // internal state 245 uint8_t *m_prg; 246 uint8_t *m_vrom; 247 uint8_t *m_ciram; 248 std::vector<uint8_t> m_prgram; 249 std::vector<uint8_t> m_vram; 250 std::vector<uint8_t> m_battery; 251 uint32_t m_prg_size; 252 uint32_t m_vrom_size; 253 254 private: 255 // HACK: to reduce tagmap lookups for PPU-related IRQs, we add a hook to the 256 // main NES CPU here, even if it does not belong to this device. 257 required_device<cpu_device> m_maincpu; 258 259 protected: 260 // these are specific of some boards but must be accessible from the driver 261 // E.g. additional save ram for HKROM, X1-005 & X1-017 boards, or ExRAM for MMC5 262 uint8_t *m_mapper_sram; 263 std::vector<uint8_t> m_ext_ntram; 264 uint32_t m_mapper_sram_size; 265 266 int m_ce_mask; 267 int m_ce_state; 268 int m_vrc_ls_prg_a; 269 int m_vrc_ls_prg_b; 270 int m_vrc_ls_chr; 271 int m_n163_vol; 272 273 int m_mirroring; 274 bool m_pcb_ctrl_mirror, m_four_screen_vram, m_has_trainer; 275 bool m_x1_005_alt_mirroring; // temp hack for two kind of mirroring in Taito X1-005 boards (to be replaced with pin checking) 276 bool m_bus_conflict; 277 private: 278 uint8_t m_open_bus; 279 280 public: 281 // PRG 282 inline int prg_8k_bank_num(int bank); 283 inline void update_prg_banks(int prg_bank_start, int prg_bank_end); 284 memory_bank *m_prg_bank_mem[4]; 285 int m_prg_bank[4]; 286 uint32_t m_prg_chunks; 287 uint32_t m_prg_mask; 288 289 // PRG helpers 290 void prg32(int bank); 291 void prg16_89ab(int bank); 292 void prg16_cdef(int bank); 293 void prg8_89(int bank); 294 void prg8_ab(int bank); 295 void prg8_cd(int bank); 296 void prg8_ef(int bank); 297 void prg8_x(int start, int bank); 298 299 300 // CHR 301 int m_chr_source; // global source for the 8 VROM banks 302 inline void chr_sanity_check(int source); 303 304 //these were previously called chr_map. they are a quick banking structure, 305 //because some of these change multiple times per scanline! 306 int m_chr_src[8]; //defines source of base pointer 307 int m_chr_orig[8]; //defines offset of 0x400 byte segment at base pointer 308 uint8_t *m_chr_access[8]; //source translated + origin -> valid pointer! 309 310 uint32_t m_vrom_chunks; 311 uint32_t m_vram_chunks; 312 313 // CHR helpers 314 void chr8(int bank, int source); 315 void chr4_x(int start, int bank, int source); chr4_0(int bank,int source)316 void chr4_0(int bank, int source){ chr4_x(0, bank, source); }; chr4_4(int bank,int source)317 void chr4_4(int bank, int source){ chr4_x(4, bank, source); }; 318 void chr2_x(int start, int bank, int source); chr2_0(int bank,int source)319 void chr2_0(int bank, int source) { chr2_x(0, bank, source); }; chr2_2(int bank,int source)320 void chr2_2(int bank, int source) { chr2_x(2, bank, source); }; chr2_4(int bank,int source)321 void chr2_4(int bank, int source) { chr2_x(4, bank, source); }; chr2_6(int bank,int source)322 void chr2_6(int bank, int source) { chr2_x(6, bank, source); }; 323 void chr1_x(int start, int bank, int source); chr1_0(int bank,int source)324 void chr1_0(int bank, int source) { chr1_x(0, bank, source); }; chr1_1(int bank,int source)325 void chr1_1(int bank, int source) { chr1_x(1, bank, source); }; chr1_2(int bank,int source)326 void chr1_2(int bank, int source) { chr1_x(2, bank, source); }; chr1_3(int bank,int source)327 void chr1_3(int bank, int source) { chr1_x(3, bank, source); }; chr1_4(int bank,int source)328 void chr1_4(int bank, int source) { chr1_x(4, bank, source); }; chr1_5(int bank,int source)329 void chr1_5(int bank, int source) { chr1_x(5, bank, source); }; chr1_6(int bank,int source)330 void chr1_6(int bank, int source) { chr1_x(6, bank, source); }; chr1_7(int bank,int source)331 void chr1_7(int bank, int source) { chr1_x(7, bank, source); }; 332 333 334 // NameTable & Mirroring 335 //these were previously called nt_page. they are a quick banking structure for a maximum of 4K of RAM/ROM/ExRAM 336 int m_nt_src[4]; 337 int m_nt_orig[4]; 338 int m_nt_writable[4]; 339 uint8_t *m_nt_access[4]; //quick banking structure for a maximum of 4K of RAM/ROM/ExRAM 340 341 void set_nt_page(int page, int source, int bank, int writable); 342 void set_nt_mirroring(int mirroring); 343 344 std::vector<uint16_t> m_prg_bank_map; 345 }; 346 347 // ======================> nes_cart_slot_device 348 349 class nes_cart_slot_device : public device_t, 350 public device_image_interface, 351 public device_single_card_slot_interface<device_nes_cart_interface> 352 { 353 public: 354 // construction/destruction 355 template <typename T> nes_cart_slot_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock,T && opts,const char * dflt)356 nes_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock, T &&opts, const char *dflt) 357 : nes_cart_slot_device(mconfig, tag, owner, clock) 358 { 359 option_reset(); 360 opts(*this); 361 set_default_option(dflt); 362 set_fixed(false); 363 } 364 nes_cart_slot_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 365 virtual ~nes_cart_slot_device(); 366 367 // image-level overrides 368 virtual image_init_result call_load() override; 369 virtual void call_unload() override; 370 image_type()371 virtual iodevice_t image_type() const noexcept override { return IO_CARTSLOT; } is_readable()372 virtual bool is_readable() const noexcept override { return true; } is_writeable()373 virtual bool is_writeable() const noexcept override { return false; } is_creatable()374 virtual bool is_creatable() const noexcept override { return false; } must_be_loaded()375 virtual bool must_be_loaded() const noexcept override { return m_must_be_loaded; } is_reset_on_load()376 virtual bool is_reset_on_load() const noexcept override { return true; } image_interface()377 virtual const char *image_interface() const noexcept override { return "nes_cart"; } file_extensions()378 virtual const char *file_extensions() const noexcept override { return "nes,unf,unif"; } unhashed_header_length()379 virtual u32 unhashed_header_length() const noexcept override { return 16; } 380 381 // slot interface overrides 382 virtual std::string get_default_card_software(get_default_card_software_hook &hook) const override; 383 384 // reading and writing 385 virtual uint8_t read_l(offs_t offset); 386 virtual uint8_t read_m(offs_t offset); 387 virtual uint8_t read_h(offs_t offset); 388 virtual uint8_t read_ex(offs_t offset); 389 virtual void write_l(offs_t offset, uint8_t data); 390 virtual void write_m(offs_t offset, uint8_t data); 391 virtual void write_h(offs_t offset, uint8_t data); 392 virtual void write_ex(offs_t offset, uint8_t data); 393 394 // hack until disk system is made modern! disk_flip_side()395 virtual void disk_flip_side() { if (m_cart) m_cart->disk_flip_side(); } 396 get_pcb_id()397 int get_pcb_id() { return m_pcb_id; }; 398 399 void pcb_start(uint8_t *ciram_ptr); 400 void pcb_reset(); 401 402 // temporarily here 403 int m_crc_hack; 404 get_crc_hack()405 int get_crc_hack() { return m_crc_hack; }; 406 set_must_be_loaded(bool _must_be_loaded)407 void set_must_be_loaded(bool _must_be_loaded) { m_must_be_loaded = _must_be_loaded; } 408 409 //private: 410 device_nes_cart_interface* m_cart; 411 int m_pcb_id; 412 bool m_must_be_loaded; 413 414 protected: 415 // device-level overrides 416 virtual void device_start() override; 417 418 // device_image_interface implementation get_software_list_loader()419 virtual const software_list_loader &get_software_list_loader() const override { return rom_software_list_loader::instance(); } 420 421 const char * get_default_card_ines(get_default_card_software_hook &hook, const uint8_t *ROM, uint32_t len) const; 422 static const char * get_default_card_unif(const uint8_t *ROM, uint32_t len); 423 static const char * nes_get_slot(int pcb_id); 424 int nes_get_pcb_id(const char *slot); 425 426 void call_load_ines(); 427 void call_load_unif(); 428 void call_load_pcb(); 429 }; 430 431 // device type definition 432 DECLARE_DEVICE_TYPE(NES_CART_SLOT, nes_cart_slot_device) 433 434 435 /*************************************************************************** 436 DEVICE CONFIGURATION MACROS 437 ***************************************************************************/ 438 439 #define NESSLOT_PRGROM_REGION_TAG ":cart:prg_rom" 440 #define NESSLOT_CHRROM_REGION_TAG ":cart:chr_rom" 441 442 #endif // MAME_BUS_NES_NES_SLOT_H 443