1 // license:BSD-3-Clause 2 // copyright-holders:Barry Rodewald 3 /* 4 * 8x300.h 5 * 6 * Implementation of the Scientific Micro Systems SMS300 / Signetics 8X300 Microcontroller 7 * Created on: 18/12/2013 8 */ 9 10 #ifndef MAME_CPU_8X300_8X300_H 11 #define MAME_CPU_8X300_8X300_H 12 13 #pragma once 14 15 // Register enumeration 16 enum 17 { 18 _8X300_PC = 1, 19 _8X300_AR, 20 _8X300_IR, 21 _8X300_AUX, 22 _8X300_R1, 23 _8X300_R2, 24 _8X300_R3, 25 _8X300_R4, 26 _8X300_R5, 27 _8X300_R6, 28 _8X300_IVL, 29 _8X300_OVF, 30 _8X300_R11, 31 _8X300_R12, 32 _8X300_R13, 33 _8X300_R14, 34 _8X300_R15, 35 _8X300_R16, 36 _8X300_IVR, 37 _8X300_LIV, 38 _8X300_RIV, 39 _8X300_GENPC 40 }; 41 42 class n8x300_cpu_device : public cpu_device 43 { 44 public: 45 // construction/destruction 46 n8x300_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 47 sc_callback()48 auto sc_callback() { return m_sc_callback.bind(); } 49 50 protected: 51 n8x300_cpu_device(const machine_config &mconfig, device_type type, const char *tag, device_t *owner, uint32_t clock); 52 53 // device-level overrides 54 virtual void device_resolve_objects() override; 55 virtual void device_start() override; 56 virtual void device_reset() override; 57 58 // device_state_interface overrides 59 virtual void state_import(const device_state_entry &entry) override; 60 61 // device_execute_interface overrides execute_min_cycles()62 virtual uint32_t execute_min_cycles() const noexcept override { return 1; } execute_max_cycles()63 virtual uint32_t execute_max_cycles() const noexcept override { return 1; } execute_input_lines()64 virtual uint32_t execute_input_lines() const noexcept override { return 0; } 65 virtual void execute_run() override; 66 67 // device_memory_interface overrides 68 virtual space_config_vector memory_space_config() const override; 69 70 // device_disasm_interface overrides 71 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 72 73 virtual void set_reg(uint8_t reg, uint8_t val, bool xmit); 74 virtual uint8_t get_reg(uint8_t reg); 75 76 void xmit_lb(uint8_t dst, uint8_t mask); 77 void xmit_rb(uint8_t dst, uint8_t mask); 78 79 address_space_config m_program_config; 80 address_space_config m_io_config; 81 82 int m_icount; 83 bool m_increment_pc; 84 85 memory_access<13, 1, -1, ENDIANNESS_BIG>::cache m_cache; 86 memory_access<13, 1, -1, ENDIANNESS_BIG>::specific m_program; 87 memory_access< 9, 0, 0, ENDIANNESS_BIG>::specific m_io; 88 89 devcb_write8 m_sc_callback; // Select Command (address latch) 90 91 uint16_t m_PC; // Program Counter 92 uint16_t m_AR; // Address Register 93 uint16_t m_IR; // Instruction Register 94 uint8_t m_AUX; // Auxiliary Register (second operand for AND, ADD, XOR) 95 uint8_t m_R1; 96 uint8_t m_R2; 97 uint8_t m_R3; 98 uint8_t m_R4; 99 uint8_t m_R5; 100 uint8_t m_R6; 101 uint8_t m_R11; 102 uint8_t m_R12; 103 uint8_t m_R13; 104 uint8_t m_R14; 105 uint8_t m_R15; 106 uint8_t m_R16; 107 uint8_t m_IVL; // Interface vector (I/O) left bank (write-only) 108 uint8_t m_IVR; // Interface vector (I/O) right bank (write-only) 109 uint8_t m_OVF; // Overflow register (read-only) 110 uint16_t m_genPC; 111 112 uint8_t m_IV_latch; // IV bank contents, these are latched when IVL or IVR are set 113 114 private: is_rot(uint16_t opcode)115 inline bool is_rot(uint16_t opcode) 116 { 117 if((opcode & 0x1000) || (opcode & 0x0010)) 118 return false; 119 else 120 return true; 121 } is_src_reg(uint16_t opcode)122 inline bool is_src_reg(uint16_t opcode) 123 { 124 if((opcode & 0x1000)) 125 return false; 126 else 127 return true; 128 } is_dst_reg(uint16_t opcode)129 inline bool is_dst_reg(uint16_t opcode) 130 { 131 if((opcode & 0x0010)) 132 return false; 133 else 134 return true; 135 } rotate(uint8_t s,uint8_t n)136 inline uint8_t rotate(uint8_t s, uint8_t n) // right rotate 137 { 138 return ((s & ((uint8_t)0xff << n)) >> n) | ((s & ((uint8_t)0xff >> (8-n))) << (8-n)); 139 } 140 }; 141 142 class n8x305_cpu_device : public n8x300_cpu_device 143 { 144 public: 145 // construction/destruction 146 n8x305_cpu_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock); 147 148 protected: 149 virtual void set_reg(uint8_t reg, uint8_t val, bool xmit) override; 150 virtual uint8_t get_reg(uint8_t reg) override; 151 }; 152 153 DECLARE_DEVICE_TYPE(N8X300, n8x300_cpu_device) 154 DECLARE_DEVICE_TYPE(N8X305, n8x305_cpu_device) 155 156 #endif // MAME_CPU_8X300_8X300_H 157