1 // license:BSD-3-Clause 2 // copyright-holders:Karl Stenerud 3 #ifndef MAME_CPU_M68000_M68000_H 4 #define MAME_CPU_M68000_M68000_H 5 6 #pragma once 7 8 // SoftFloat 2 lacks an include guard 9 #ifndef softfloat_h 10 #define softfloat_h 1 11 #include "softfloat/milieu.h" 12 #include "softfloat/softfloat.h" 13 #endif 14 15 extern flag floatx80_is_nan(floatx80 a); 16 17 18 /* MMU constants */ 19 constexpr int MMU_ATC_ENTRIES = (22); // 68851 has 64, 030 has 22 20 21 /* instruction cache constants */ 22 constexpr int M68K_IC_SIZE = 128; 23 24 /* There are 7 levels of interrupt to the 68K. 25 * A transition from < 7 to 7 will cause a non-maskable interrupt (NMI). 26 * 27 * If disable_interrupt_mixer() has been called, the 3 interrupt lines 28 * are modeled instead, as numbers 0-2. 29 */ 30 constexpr int M68K_IRQ_NONE = 0; 31 constexpr int M68K_IRQ_1 = 1; 32 constexpr int M68K_IRQ_2 = 2; 33 constexpr int M68K_IRQ_3 = 3; 34 constexpr int M68K_IRQ_4 = 4; 35 constexpr int M68K_IRQ_5 = 5; 36 constexpr int M68K_IRQ_6 = 6; 37 constexpr int M68K_IRQ_7 = 7; 38 39 constexpr int M68K_IRQ_IPL0 = 0; 40 constexpr int M68K_IRQ_IPL1 = 1; 41 constexpr int M68K_IRQ_IPL2 = 2; 42 43 constexpr int M68K_SZ_LONG = 0; 44 constexpr int M68K_SZ_BYTE = 1; 45 constexpr int M68K_SZ_WORD = 2; 46 47 // special input lines 48 constexpr int M68K_LINE_BUSERROR = 16; 49 50 /* CPU types for use in m68k_set_cpu_type() */ 51 enum 52 { 53 M68K_CPU_TYPE_INVALID, 54 M68K_CPU_TYPE_68000, 55 M68K_CPU_TYPE_68008, 56 M68K_CPU_TYPE_68010, 57 M68K_CPU_TYPE_68EC020, 58 M68K_CPU_TYPE_68020, 59 M68K_CPU_TYPE_68EC030, 60 M68K_CPU_TYPE_68030, 61 M68K_CPU_TYPE_68EC040, 62 M68K_CPU_TYPE_68LC040, 63 M68K_CPU_TYPE_68040, 64 M68K_CPU_TYPE_SCC68070, 65 M68K_CPU_TYPE_FSCPU32, 66 M68K_CPU_TYPE_COLDFIRE 67 }; 68 69 // function codes 70 enum 71 { 72 M68K_FC_USER_DATA = 1, 73 M68K_FC_USER_PROGRAM = 2, 74 M68K_FC_SUPERVISOR_DATA = 5, 75 M68K_FC_SUPERVISOR_PROGRAM = 6, 76 M68K_FC_INTERRUPT = 7 77 }; 78 79 /* HMMU enable types for use with m68k_set_hmmu_enable() */ 80 constexpr int M68K_HMMU_DISABLE = 0; /* no translation */ 81 constexpr int M68K_HMMU_ENABLE_II = 1; /* Mac II style fixed translation */ 82 constexpr int M68K_HMMU_ENABLE_LC = 2; /* Mac LC style fixed translation */ 83 84 enum 85 { 86 /* NOTE: M68K_SP fetches the current SP, be it USP, ISP, or MSP */ 87 M68K_PC = STATE_GENPC, M68K_SP = 1, M68K_ISP, M68K_USP, M68K_MSP, M68K_SR, M68K_VBR, 88 M68K_SFC, M68K_DFC, M68K_CACR, M68K_CAAR, M68K_IR, M68K_PREF_ADDR, M68K_PREF_DATA, 89 M68K_D0, M68K_D1, M68K_D2, M68K_D3, M68K_D4, M68K_D5, M68K_D6, M68K_D7, 90 M68K_A0, M68K_A1, M68K_A2, M68K_A3, M68K_A4, M68K_A5, M68K_A6, M68K_A7, 91 M68K_FP0, M68K_FP1, M68K_FP2, M68K_FP3, M68K_FP4, M68K_FP5, M68K_FP6, M68K_FP7, 92 M68K_FPSR, M68K_FPCR, M68K_CRP_LIMIT, M68K_CRP_APTR, M68K_SRP_LIMIT, M68K_SRP_APTR, 93 M68K_MMU_TC, M68K_TT0, M68K_TT1, M68K_MMU_SR, M68K_ITT0, M68K_ITT1, 94 M68K_DTT0, M68K_DTT1, M68K_URP_APTR 95 }; 96 97 class m68000_base_device : public cpu_device 98 { 99 public: 100 enum { 101 AS_CPU_SPACE = 4 102 }; 103 104 // construction/destruction 105 m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 106 autovector(int level)107 static constexpr u8 autovector(int level) { return 0x18 + level; } 108 void autovectors_map(address_map &map); 109 110 protected: 111 static constexpr int NUM_CPU_TYPES = 8; 112 113 typedef void (m68000_base_device::*opcode_handler_ptr)(); 114 static u16 m68ki_instruction_state_table[NUM_CPU_TYPES][0x10000]; /* opcode handler state numbers */ 115 static unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */ 116 117 /* This is used to generate the opcode handler state table */ 118 struct opcode_handler_struct 119 { 120 unsigned int match; /* what to match after masking */ 121 unsigned int mask; /* mask on opcode */ 122 unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */ 123 }; 124 125 static const opcode_handler_ptr m68k_handler_table[]; 126 static const opcode_handler_struct m68k_opcode_table[]; 127 static const u16 m68k_state_illegal; 128 129 static void m68ki_set_one(unsigned short opcode, u16 state, const opcode_handler_struct &s); 130 static void m68ki_build_opcode_table(void); 131 132 void clear_all(void); 133 134 // device_disasm_interface overrides 135 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 136 137 // device_execute_interface overrides execute_min_cycles()138 virtual u32 execute_min_cycles() const noexcept override { return 4; }; execute_max_cycles()139 virtual u32 execute_max_cycles() const noexcept override { return 158; }; execute_input_lines()140 virtual u32 execute_input_lines() const noexcept override { return m_interrupt_mixer ? 8 : 3; }; // number of input lines execute_input_edge_triggered(int inputnum)141 virtual bool execute_input_edge_triggered(int inputnum) const noexcept override { return m_interrupt_mixer ? inputnum == M68K_IRQ_7 : false; } 142 virtual void execute_run() override; 143 virtual void execute_set_input(int inputnum, int state) override; 144 145 // device-level overrides 146 virtual void device_start() override; 147 virtual void device_reset() override; 148 virtual void device_stop() override; 149 virtual void device_pre_save() override; 150 virtual void device_post_load() override; 151 152 // device_memory_interface overrides 153 virtual space_config_vector memory_space_config() const override; 154 155 // address spaces 156 const address_space_config m_program_config, m_oprogram_config; 157 address_space_config m_cpu_space_config; 158 159 void define_state(void); 160 161 public: set_reset_callback(T &&...args)162 template <typename... T> void set_reset_callback(T &&... args) { m_reset_instr_callback.set(std::forward<T>(args)...); } set_cmpild_callback(T &&...args)163 template <typename... T> void set_cmpild_callback(T &&... args) { m_cmpild_instr_callback.set(std::forward<T>(args)...); } set_rte_callback(T &&...args)164 template <typename... T> void set_rte_callback(T &&... args) { m_rte_instr_callback.set(std::forward<T>(args)...); } set_tas_write_callback(T &&...args)165 template <typename... T> void set_tas_write_callback(T &&... args) { m_tas_write_callback.set(std::forward<T>(args)...); } 166 u16 get_fc(); 167 void set_hmmu_enable(int enable); get_pmmu_enable()168 int get_pmmu_enable() const {return m_pmmu_enabled;}; 169 void set_fpu_enable(int enable); 170 void set_buserror_details(u32 fault_addr, u8 rw, u8 fc); disable_interrupt_mixer()171 void disable_interrupt_mixer() { m_interrupt_mixer = false; } set_cpu_space(int space_id)172 void set_cpu_space(int space_id) { m_cpu_space_id = space_id; } 173 174 protected: 175 m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, 176 const device_type type, u32 prg_data_width, u32 prg_address_bits); 177 178 m68000_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, 179 const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map); 180 181 int m_has_fpu; /* Indicates if a FPU is available (yes on 030, 040, may be on 020) */ 182 183 bool m_interrupt_mixer; /* Indicates whether to put a virtual 8->3 priority mixer on the input lines (default true) */ 184 int m_cpu_space_id; /* CPU space address space id (default AS_CPU_SPACE) */ 185 186 u32 m_cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, 68020, 68EC030, 68030, 68EC040, or 68040 */ 187 // 188 u32 m_dar[16]; /* Data and Address Registers */ 189 u32 m_ppc; /* Previous program counter */ 190 u32 m_pc; /* Program Counter */ 191 u32 m_sp[7]; /* User, Interrupt, and Master Stack Pointers */ 192 u32 m_vbr; /* Vector Base Register (m68010+) */ 193 u32 m_sfc; /* Source Function Code Register (m68010+) */ 194 u32 m_dfc; /* Destination Function Code Register (m68010+) */ 195 u32 m_cacr; /* Cache Control Register (m68020, unemulated) */ 196 u32 m_caar; /* Cache Address Register (m68020, unemulated) */ 197 u32 m_ir; /* Instruction Register */ 198 floatx80 m_fpr[8]; /* FPU Data Register (m68030/040) */ 199 u32 m_fpiar; /* FPU Instruction Address Register (m68040) */ 200 u32 m_fpsr; /* FPU Status Register (m68040) */ 201 u32 m_fpcr; /* FPU Control Register (m68040) */ 202 u32 m_t1_flag; /* Trace 1 */ 203 u32 m_t0_flag; /* Trace 0 */ 204 u32 m_s_flag; /* Supervisor */ 205 u32 m_m_flag; /* Master/Interrupt state */ 206 u32 m_x_flag; /* Extend */ 207 u32 m_n_flag; /* Negative */ 208 u32 m_not_z_flag; /* Zero, inverted for speedups */ 209 u32 m_v_flag; /* Overflow */ 210 u32 m_c_flag; /* Carry */ 211 u32 m_int_mask; /* I0-I2 */ 212 u32 m_int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */ 213 u32 m_stopped; /* Stopped state */ 214 u32 m_pref_addr; /* Last prefetch address */ 215 u32 m_pref_data; /* Data in the prefetch queue */ 216 u32 m_sr_mask; /* Implemented status register bits */ 217 u32 m_instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */ 218 u32 m_run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */ 219 int m_has_pmmu; /* Indicates if a PMMU available (yes on 030, 040, no on EC030) */ 220 int m_has_hmmu; /* Indicates if an Apple HMMU is available in place of the 68851 (020 only) */ 221 int m_pmmu_enabled; /* Indicates if the PMMU is enabled */ 222 int m_hmmu_enabled; /* Indicates if the HMMU is enabled */ 223 int m_fpu_just_reset; /* Indicates the FPU was just reset */ 224 225 /* Clocks required for instructions / exceptions */ 226 u32 m_cyc_bcc_notake_b; 227 u32 m_cyc_bcc_notake_w; 228 u32 m_cyc_dbcc_f_noexp; 229 u32 m_cyc_dbcc_f_exp; 230 u32 m_cyc_scc_r_true; 231 u32 m_cyc_movem_w; 232 u32 m_cyc_movem_l; 233 u32 m_cyc_shift; 234 u32 m_cyc_reset; 235 236 int m_initial_cycles; 237 int m_icount; /* Number of clocks remaining */ 238 int m_reset_cycles; 239 u32 m_tracing; 240 241 int m_address_error; 242 243 u32 m_aerr_address; 244 u32 m_aerr_write_mode; 245 u32 m_aerr_fc; 246 247 /* Virtual IRQ lines state */ 248 u32 m_virq_state; 249 u32 m_nmi_pending; 250 251 const u16 *m_state_table; 252 const u8* m_cyc_instruction; 253 const u8* m_cyc_exception; 254 255 /* Callbacks to host */ 256 write_line_delegate m_reset_instr_callback; /* Called when a RESET instruction is encountered */ 257 write32sm_delegate m_cmpild_instr_callback; /* Called when a CMPI.L #v, Dn instruction is encountered */ 258 write_line_delegate m_rte_instr_callback; /* Called when a RTE instruction is encountered */ 259 write8sm_delegate m_tas_write_callback; /* Called instead of normal write8 by the TAS instruction, 260 allowing writeback to be disabled globally or selectively 261 or other side effects to be implemented */ 262 263 address_space *m_program, *m_oprogram, *m_cpu_space; 264 265 memory_access<24, 0, 0, ENDIANNESS_BIG>::cache m_oprogram8; 266 memory_access<24, 1, 0, ENDIANNESS_BIG>::cache m_oprogram16; 267 memory_access<32, 2, 0, ENDIANNESS_BIG>::cache m_oprogram32; 268 memory_access<24, 0, 0, ENDIANNESS_BIG>::specific m_program8; 269 memory_access<24, 1, 0, ENDIANNESS_BIG>::specific m_program16; 270 memory_access<32, 2, 0, ENDIANNESS_BIG>::specific m_program32; 271 272 /* Redirect memory calls */ 273 274 void init8(address_space &space, address_space &ospace); 275 void init16(address_space &space, address_space &ospace); 276 void init32(address_space &space, address_space &ospace); 277 void init32mmu(address_space &space, address_space &ospace); 278 void init32hmmu(address_space &space, address_space &ospace); 279 280 std::function<u16 (offs_t)> m_readimm16; // Immediate read 16 bit 281 std::function<u8 (offs_t)> m_read8; 282 std::function<u16 (offs_t)> m_read16; 283 std::function<u32 (offs_t)> m_read32; 284 std::function<void (offs_t, u8 )> m_write8; 285 std::function<void (offs_t, u16)> m_write16; 286 std::function<void (offs_t, u32)> m_write32; 287 288 address_space *m_space, *m_ospace; 289 290 u32 m_iotemp; 291 292 /* save state data */ 293 u16 m_save_sr; 294 u8 m_save_stopped; 295 u8 m_save_halted; 296 297 /* PMMU registers */ 298 u32 m_mmu_crp_aptr, m_mmu_crp_limit; 299 u32 m_mmu_srp_aptr, m_mmu_srp_limit; 300 u32 m_mmu_urp_aptr; /* 040 only */ 301 u32 m_mmu_tc; 302 u16 m_mmu_sr; 303 u32 m_mmu_sr_040; 304 u32 m_mmu_atc_tag[MMU_ATC_ENTRIES], m_mmu_atc_data[MMU_ATC_ENTRIES]; 305 u32 m_mmu_atc_rr; 306 u32 m_mmu_tt0, m_mmu_tt1; 307 u32 m_mmu_itt0, m_mmu_itt1, m_mmu_dtt0, m_mmu_dtt1; 308 u32 m_mmu_acr0, m_mmu_acr1, m_mmu_acr2, m_mmu_acr3; 309 u32 m_mmu_last_page_entry, m_mmu_last_page_entry_addr; 310 311 u16 m_mmu_tmp_sr; /* temporary hack: status code for ptest and to handle write protection */ 312 u16 m_mmu_tmp_fc; /* temporary hack: function code for the mmu (moves) */ 313 u16 m_mmu_tmp_rw; /* temporary hack: read/write (1/0) for the mmu */ 314 u8 m_mmu_tmp_sz; /* temporary hack: size for mmu */ 315 316 u32 m_mmu_tmp_buserror_address; /* temporary hack: (first) bus error address */ 317 u16 m_mmu_tmp_buserror_occurred; /* temporary hack: flag that bus error has occurred from mmu */ 318 u16 m_mmu_tmp_buserror_fc; /* temporary hack: (first) bus error fc */ 319 u16 m_mmu_tmp_buserror_rw; /* temporary hack: (first) bus error rw */ 320 u16 m_mmu_tmp_buserror_sz; /* temporary hack: (first) bus error size` */ 321 322 bool m_mmu_tablewalk; /* set when MMU walks page tables */ 323 u32 m_mmu_last_logical_addr; 324 u32 m_ic_address[M68K_IC_SIZE]; /* instruction cache address data */ 325 u32 m_ic_data[M68K_IC_SIZE]; /* instruction cache content data */ 326 bool m_ic_valid[M68K_IC_SIZE]; /* instruction cache valid flags */ 327 328 329 330 /* 68307 / 68340 internal address map */ 331 address_space *m_internal; 332 333 334 335 void init_cpu_common(void); 336 void init_cpu_m68000(void); 337 void init_cpu_m68008(void); 338 void init_cpu_m68010(void); 339 void init_cpu_m68020(void); 340 void init_cpu_m68020fpu(void); 341 void init_cpu_m68020pmmu(void); 342 void init_cpu_m68020hmmu(void); 343 void init_cpu_m68ec020(void); 344 void init_cpu_m68030(void); 345 void init_cpu_m68ec030(void); 346 void init_cpu_m68040(void); 347 void init_cpu_m68ec040(void); 348 void init_cpu_m68lc040(void); 349 void init_cpu_fscpu32(void); 350 void init_cpu_scc68070(void); 351 void init_cpu_coldfire(void); 352 353 void default_autovectors_map(address_map &map); 354 355 void m68ki_exception_interrupt(u32 int_level); 356 m68ki_check_address_error(u32 ADDR,u32 WRITE_MODE,u32 FC)357 inline void m68ki_check_address_error(u32 ADDR, u32 WRITE_MODE, u32 FC) 358 { 359 if((ADDR)&1) 360 { 361 m_aerr_address = ADDR; 362 m_aerr_write_mode = WRITE_MODE; 363 m_aerr_fc = FC; 364 throw 10; 365 } 366 } 367 368 // device_state_interface overrides 369 virtual void state_import(const device_state_entry &entry) override; 370 virtual void state_export(const device_state_entry &entry) override; 371 virtual void state_string_export(const device_state_entry &entry, std::string &str) const override; 372 373 // device_memory_interface overrides 374 virtual bool memory_translate(int space, int intention, offs_t &address) override; 375 376 #include "m68kcpu.h" 377 #include "m68kops.h" 378 #include "m68kmmu.h" 379 m68k_reset_peripherals()380 virtual void m68k_reset_peripherals() { } 381 fx80_to_double(floatx80 fx)382 static double fx80_to_double(floatx80 fx) 383 { 384 u64 d; 385 double *foo; 386 387 foo = (double *)&d; 388 389 d = floatx80_to_float64(fx); 390 391 return *foo; 392 } 393 double_to_fx80(double in)394 static floatx80 double_to_fx80(double in) 395 { 396 u64 *d; 397 398 d = (u64 *)∈ 399 400 return float64_to_floatx80(*d); 401 } 402 403 // defined in m68kfpu.cpp 404 static const u32 pkmask2[18]; 405 static const u32 pkmask3[18]; 406 inline floatx80 load_extended_float80(u32 ea); 407 inline void store_extended_float80(u32 ea, floatx80 fpr); 408 inline floatx80 load_pack_float80(u32 ea); 409 inline void store_pack_float80(u32 ea, int k, floatx80 fpr); 410 inline void SET_CONDITION_CODES(floatx80 reg); 411 inline int TEST_CONDITION(int condition); 412 u8 READ_EA_8(int ea); 413 u16 READ_EA_16(int ea); 414 u32 READ_EA_32(int ea); 415 u64 READ_EA_64(int ea); 416 floatx80 READ_EA_FPE(int ea); 417 floatx80 READ_EA_PACK(int ea); 418 void WRITE_EA_8(int ea, u8 data); 419 void WRITE_EA_16(int ea, u16 data); 420 void WRITE_EA_32(int ea, u32 data); 421 void WRITE_EA_64(int ea, u64 data); 422 void WRITE_EA_FPE(int ea, floatx80 fpr); 423 void WRITE_EA_PACK(int ea, int k, floatx80 fpr); 424 void fpgen_rm_reg(u16 w2); 425 void fmove_reg_mem(u16 w2); 426 void fmove_fpcr(u16 w2); 427 void fmovem(u16 w2); 428 void fscc(); 429 void fbcc16(); 430 void fbcc32(); 431 void m68040_fpu_op0(); 432 int perform_fsave(u32 addr, int inc); 433 void do_frestore_null(); 434 void m68040_do_fsave(u32 addr, int reg, int inc); 435 void m68040_do_frestore(u32 addr, int reg); 436 void m68040_fpu_op1(); 437 void m68881_ftrap(); 438 }; 439 440 441 442 class m68000_device : public m68000_base_device 443 { 444 public: 445 // construction/destruction 446 m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 447 448 449 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 450 execute_min_cycles()451 virtual u32 execute_min_cycles() const noexcept override { return 4; }; execute_max_cycles()452 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 453 454 // device-level overrides 455 virtual void device_start() override; 456 457 protected: 458 m68000_device(const machine_config &mconfig, const device_type type, const char *tag, device_t *owner, u32 clock); 459 460 m68000_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, 461 const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map); 462 }; 463 464 465 466 467 class m68008_device : public m68000_base_device 468 { 469 public: 470 // construction/destruction 471 m68008_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 472 473 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 474 execute_min_cycles()475 virtual u32 execute_min_cycles() const noexcept override { return 4; }; execute_max_cycles()476 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 477 478 // device-level overrides 479 virtual void device_start() override; 480 }; 481 482 class m68008fn_device : public m68000_base_device 483 { 484 public: 485 // construction/destruction 486 m68008fn_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 487 488 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 489 execute_min_cycles()490 virtual u32 execute_min_cycles() const noexcept override { return 4; }; execute_max_cycles()491 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 492 493 // device-level overrides 494 virtual void device_start() override; 495 }; 496 497 class m68010_device : public m68000_base_device 498 { 499 public: 500 // construction/destruction 501 m68010_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 502 503 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 504 execute_min_cycles()505 virtual u32 execute_min_cycles() const noexcept override { return 4; }; execute_max_cycles()506 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 507 508 // device-level overrides 509 virtual void device_start() override; 510 }; 511 512 class m68ec020_device : public m68000_base_device 513 { 514 public: 515 // construction/destruction 516 m68ec020_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 517 518 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 519 execute_min_cycles()520 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()521 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 522 523 // device-level overrides 524 virtual void device_start() override; 525 }; 526 527 class m68020_device : public m68000_base_device 528 { 529 public: 530 // construction/destruction 531 m68020_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 532 533 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 534 execute_min_cycles()535 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()536 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 537 538 // device-level overrides 539 virtual void device_start() override; 540 }; 541 542 class m68020fpu_device : public m68000_base_device 543 { 544 public: 545 // construction/destruction 546 m68020fpu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 547 548 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 549 execute_min_cycles()550 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()551 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 552 553 // device-level overrides 554 virtual void device_start() override; 555 }; 556 557 class m68020pmmu_device : public m68000_base_device 558 { 559 public: 560 // construction/destruction 561 m68020pmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 562 563 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 564 execute_min_cycles()565 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()566 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 567 568 // device-level overrides 569 virtual void device_start() override; 570 }; 571 572 class m68020hmmu_device : public m68000_base_device 573 { 574 public: 575 // construction/destruction 576 m68020hmmu_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 577 578 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 579 execute_min_cycles()580 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()581 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 582 583 virtual bool memory_translate(int space, int intention, offs_t &address) override; 584 585 // device-level overrides 586 virtual void device_start() override; 587 }; 588 589 class m68ec030_device : public m68000_base_device 590 { 591 public: 592 // construction/destruction 593 m68ec030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 594 595 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 596 execute_min_cycles()597 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()598 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 599 600 // device-level overrides 601 virtual void device_start() override; 602 }; 603 604 class m68030_device : public m68000_base_device 605 { 606 public: 607 // construction/destruction 608 m68030_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 609 610 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 611 execute_min_cycles()612 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()613 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 614 615 // device-level overrides 616 virtual void device_start() override; 617 }; 618 619 class m68ec040_device : public m68000_base_device 620 { 621 public: 622 // construction/destruction 623 m68ec040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 624 625 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 626 execute_min_cycles()627 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()628 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 629 630 // device-level overrides 631 virtual void device_start() override; 632 }; 633 634 class m68lc040_device : public m68000_base_device 635 { 636 public: 637 // construction/destruction 638 m68lc040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 639 640 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 641 execute_min_cycles()642 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()643 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 644 645 // device-level overrides 646 virtual void device_start() override; 647 }; 648 649 class m68040_device : public m68000_base_device 650 { 651 public: 652 // construction/destruction 653 m68040_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 654 655 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 656 execute_min_cycles()657 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()658 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 659 660 // device-level overrides 661 virtual void device_start() override; 662 }; 663 664 class scc68070_base_device : public m68000_base_device 665 { 666 protected: 667 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 668 execute_min_cycles()669 virtual u32 execute_min_cycles() const noexcept override { return 4; }; execute_max_cycles()670 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 671 672 // device-level overrides 673 virtual void device_start() override; 674 675 scc68070_base_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, 676 const device_type type, address_map_constructor internal_map); 677 }; 678 679 680 681 682 class fscpu32_device : public m68000_base_device 683 { 684 public: 685 // construction/destruction 686 fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 687 688 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 689 execute_min_cycles()690 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()691 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 692 693 // device-level overrides 694 virtual void device_start() override; 695 696 protected: 697 fscpu32_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock, 698 const device_type type, u32 prg_data_width, u32 prg_address_bits, address_map_constructor internal_map); 699 }; 700 701 702 703 class mcf5206e_device : public m68000_base_device 704 { 705 public: 706 // construction/destruction 707 mcf5206e_device(const machine_config &mconfig, const char *tag, device_t *owner, u32 clock); 708 709 virtual std::unique_ptr<util::disasm_interface> create_disassembler() override; 710 execute_min_cycles()711 virtual u32 execute_min_cycles() const noexcept override { return 2; }; execute_max_cycles()712 virtual u32 execute_max_cycles() const noexcept override { return 158; }; 713 714 715 // device-level overrides 716 virtual void device_start() override; 717 }; 718 719 720 DECLARE_DEVICE_TYPE(M68000, m68000_device) 721 DECLARE_DEVICE_TYPE(M68008, m68008_device) 722 DECLARE_DEVICE_TYPE(M68008FN, m68008fn_device) 723 DECLARE_DEVICE_TYPE(M68010, m68010_device) 724 DECLARE_DEVICE_TYPE(M68EC020, m68ec020_device) 725 DECLARE_DEVICE_TYPE(M68020, m68020_device) 726 DECLARE_DEVICE_TYPE(M68020FPU, m68020fpu_device) 727 DECLARE_DEVICE_TYPE(M68020PMMU, m68020pmmu_device) 728 DECLARE_DEVICE_TYPE(M68020HMMU, m68020hmmu_device) 729 DECLARE_DEVICE_TYPE(M68EC030, m68ec030_device) 730 DECLARE_DEVICE_TYPE(M68030, m68030_device) 731 DECLARE_DEVICE_TYPE(M68EC040, m68ec040_device) 732 DECLARE_DEVICE_TYPE(M68LC040, m68lc040_device) 733 DECLARE_DEVICE_TYPE(M68040, m68040_device) 734 DECLARE_DEVICE_TYPE(FSCPU32, fscpu32_device) 735 DECLARE_DEVICE_TYPE(MCF5206E, mcf5206e_device) 736 737 738 #endif // MAME_CPU_M68000_M68000_H 739