1 // license:BSD-3-Clause
2 // copyright-holders:hap
3 /*
4
5 Mitsubishi M58846 MCU
6
7 */
8
9 #include "emu.h"
10 #include "m58846.h"
11
12
13 DEFINE_DEVICE_TYPE(M58846, m58846_device, "m58846", "Mitsubishi M58846")
14
15
16 // internal memory maps
program_2kx9(address_map & map)17 void m58846_device::program_2kx9(address_map &map)
18 {
19 map(0x0000, 0x07ff).rom();
20 }
21
22
data_128x4(address_map & map)23 void m58846_device::data_128x4(address_map &map)
24 {
25 map(0x00, 0x7f).ram();
26 }
27
28
29 // device definitions
m58846_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)30 m58846_device::m58846_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
31 : melps4_cpu_device(mconfig, M58846, tag, owner, clock, 11, address_map_constructor(FUNC(m58846_device::program_2kx9), this), 7, address_map_constructor(FUNC(m58846_device::data_128x4), this), 12 /* number of D pins */, 2 /* subroutine page */, 1 /* interrupt page */), m_timer(nullptr)
32 { }
33
34
35 //-------------------------------------------------
36 // device_start - device-specific startup
37 //-------------------------------------------------
38
device_start()39 void m58846_device::device_start()
40 {
41 melps4_cpu_device::device_start();
42 m_timer = timer_alloc(0);
43 }
44
45
46
47 //-------------------------------------------------
48 // device_reset - device-specific reset
49 //-------------------------------------------------
50
device_reset()51 void m58846_device::device_reset()
52 {
53 melps4_cpu_device::device_reset();
54 reset_timer();
55 }
56
57
58
59 //-------------------------------------------------
60 // timers
61 //-------------------------------------------------
62
reset_timer()63 void m58846_device::reset_timer()
64 {
65 attotime base = attotime::from_ticks(6, unscaled_clock());
66 m_timer->adjust(base);
67 }
68
device_timer(emu_timer & timer,device_timer_id id,int param,void * ptr)69 void m58846_device::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
70 {
71 if (id != 0)
72 return;
73
74 // timer 1: 7-bit fixed counter (manual specifically says 127)
75 if (++m_tmr_count[0] == 127)
76 {
77 m_tmr_count[0] = 0;
78 m_irqflag[1] = true;
79 m_possible_irq = true;
80 }
81
82 // timer 2: 8-bit user defined counter with auto-reload
83 if (m_v & 8 && ++m_tmr_count[1] == 0)
84 {
85 m_tmr_count[1] = m_tmr_reload;
86 m_irqflag[2] = true;
87 m_possible_irq = true;
88 m_port_t ^= 1;
89 m_write_t(m_port_t);
90 }
91
92 // schedule next timeout
93 reset_timer();
94 }
95
write_v(uint8_t data)96 void m58846_device::write_v(uint8_t data)
97 {
98 // d0: enable timer 1 irq
99 // d1: enable timer 2 irq? (TODO)
100 // d2: ?
101 // d3: timer 2 enable
102 m_tmr_irq_enabled[0] = (data & 1) ? true : false;
103 m_possible_irq = true;
104
105 m_v = data;
106 }
107
108
109
110 //-------------------------------------------------
111 // execute
112 //-------------------------------------------------
113
execute_one()114 void m58846_device::execute_one()
115 {
116 // handle one opcode
117 switch (m_op & 0x1f0)
118 {
119 case 0x30: op_sey(); break;
120 case 0x70: op_sp(); break;
121 case 0xa0: op_a(); break;
122 case 0xb0: op_la(); break;
123
124 case 0xc0: case 0xd0: case 0xe0: case 0xf0: op_lxy(); break;
125
126 default:
127 switch (m_op & 0x1fc)
128 {
129 case 0x20: op_szb(); break;
130 case 0x4c: op_sb(); break;
131 case 0x58: op_szk(); break;
132 case 0x5c: op_rb(); break;
133 case 0x60: op_xam(); break;
134 case 0x64: op_tam(); break;
135 case 0x68: op_xamd(); break;
136 case 0x6c: op_xami(); break;
137
138 default:
139 switch (m_op)
140 {
141 case 0x06: case 0x07: op_su(); break;
142 case 0x40: case 0x41: op_lcps(); break;
143 case 0x4a: case 0x4b: op_lz(); break;
144 case 0x54: case 0x55: op_ias(); break;
145
146 case 0x00: op_nop(); break;
147 case 0x01: op_ba(); break;
148 case 0x02: op_iny(); break;
149 case 0x03: op_dey(); break;
150 case 0x04: op_di(); break;
151 case 0x05: op_ei(); break;
152 case 0x09: op_tabe(); break; // undocumented
153 case 0x0a: op_am(); break;
154 case 0x0b: op_ose(); break;
155 case 0x0c: op_tya(); break;
156 case 0x0f: op_cma(); break;
157
158 case 0x10: op_cls(); break;
159 case 0x11: op_clds(); break;
160 case 0x13: op_cld(); break;
161 case 0x14: op_rd(); break;
162 case 0x15: op_sd(); break;
163 case 0x16: op_tepa(); break;
164 case 0x17: op_ospa(); break;
165 case 0x18: op_rl(); break; // undocumented
166 case 0x19: op_rr(); break; // undocumented
167 case 0x1a: op_teab(); break;
168 case 0x1b: op_osab(); break;
169 case 0x1c: op_tba(); break;
170 case 0x1d: op_tay(); break;
171 case 0x1e: op_tab(); break;
172
173 case 0x26: op_seam(); break;
174 case 0x2b: op_szd(); break;
175 case 0x2f: op_szc(); break;
176
177 case 0x43: op_amc(); break;
178 case 0x44: op_rt(); break;
179 case 0x45: op_rts(); break;
180 case 0x46: op_rti(); break;
181 case 0x48: op_rc(); break;
182 case 0x49: op_sc(); break;
183
184 case 0x53: op_amcs(); break;
185 case 0x57: op_iak(); break;
186
187 case 0x81: op_ofa(); break;
188 case 0x82: op_snz1(); break;
189 case 0x83: op_snz2(); break;
190 case 0x84: op_oga(); break;
191 case 0x85: op_t2ab(); break;
192 case 0x86: op_tva(); break;
193 case 0x8a: op_tab2(); break;
194 case 0x8c: op_iaf(); break;
195
196 default:
197 melps4_cpu_device::execute_one();
198 break;
199
200 }
201 break; // 0x1ff
202
203 }
204 break; // 0x1fc
205
206 } // big switch
207 }
208