1 // license:GPL-2.0+ 2 // copyright-holders:Jarek Burczynski 3 #ifndef MAME_SOUND_YMDELTAT_H 4 #define MAME_SOUND_YMDELTAT_H 5 6 #pragma once 7 8 9 typedef uint8_t (*FM_READBYTE)(device_t *device, offs_t offset); 10 typedef void (*FM_WRITEBYTE)(device_t *device, offs_t offset, uint8_t data); 11 typedef void (*STATUS_CHANGE_HANDLER)(void *chip, uint8_t status_bits); 12 13 14 /* DELTA-T (adpcm type B) struct */ 15 struct YM_DELTAT { /* AT: rearranged and tightened structure */ 16 static constexpr int EMULATION_MODE_NORMAL = 0; 17 static constexpr int EMULATION_MODE_YM2610 = 1; 18 19 FM_READBYTE read_byte; 20 FM_WRITEBYTE write_byte; 21 int32_t *output_pointer;/* pointer of output pointers */ 22 int32_t *pan; /* pan : &output_pointer[pan] */ 23 double freqbase; 24 #if 0 25 double write_time; /* Y8950: 10 cycles of main clock; YM2608: 20 cycles of main clock */ 26 double read_time; /* Y8950: 8 cycles of main clock; YM2608: 18 cycles of main clock */ 27 #endif 28 uint32_t memory_size; 29 int output_range; 30 uint32_t now_addr; /* current address */ 31 uint32_t now_step; /* correct step */ 32 uint32_t step; /* step */ 33 uint32_t start; /* start address */ 34 uint32_t limit; /* limit address */ 35 uint32_t end; /* end address */ 36 uint32_t delta; /* delta scale */ 37 int32_t volume; /* current volume */ 38 int32_t acc; /* shift Measurement value*/ 39 int32_t adpcmd; /* next Forecast */ 40 int32_t adpcml; /* current value */ 41 int32_t prev_acc; /* leveling value */ 42 uint8_t now_data; /* current rom data */ 43 uint8_t CPU_data; /* current data from reg 08 */ 44 uint8_t portstate; /* port status */ 45 uint8_t control2; /* control reg: SAMPLE, DA/AD, RAM TYPE (x8bit / x1bit), ROM/RAM */ 46 uint8_t portshift; /* address bits shift-left: 47 ** 8 for YM2610, 48 ** 5 for Y8950 and YM2608 */ 49 50 uint8_t DRAMportshift; /* address bits shift-right: 51 ** 0 for ROM and x8bit DRAMs, 52 ** 3 for x1 DRAMs */ 53 54 uint8_t memread; /* needed for reading/writing external memory */ 55 56 /* handlers and parameters for the status flags support */ 57 STATUS_CHANGE_HANDLER status_set_handler; 58 STATUS_CHANGE_HANDLER status_reset_handler; 59 60 /* note that different chips have these flags on different 61 ** bits of the status register 62 */ 63 void * status_change_which_chip; /* this chip id */ 64 uint8_t status_change_EOS_bit; /* 1 on End Of Sample (record/playback/cycle time of AD/DA converting has passed)*/ 65 uint8_t status_change_BRDY_bit; /* 1 after recording 2 datas (2x4bits) or after reading/writing 1 data */ 66 uint8_t status_change_ZERO_bit; /* 1 if silence lasts for more than 290 milliseconds on ADPCM recording */ 67 68 /* neither Y8950 nor YM2608 can generate IRQ when PCMBSY bit changes, so instead of above, 69 ** the statusflag gets ORed with PCM_BSY (below) (on each read of statusflag of Y8950 and YM2608) 70 */ 71 uint8_t PCM_BSY; /* 1 when ADPCM is playing; Y8950/YM2608 only */ 72 73 uint8_t reg[16]; /* adpcm registers */ 74 uint8_t emulation_mode; /* which chip we're emulating */ 75 device_t *device; 76 77 /*void BRDY_callback();*/ 78 79 uint8_t ADPCM_Read(); 80 void ADPCM_Write(int r, int v); 81 void ADPCM_Reset(int panidx, int mode, device_t *dev); 82 void ADPCM_CALC(); 83 84 void postload(uint8_t *regs); 85 void savestate(device_t *device); 86 }; 87 88 #endif // MAME_SOUND_YMDELTAT_H 89