1 // license:BSD-3-Clause
2 // copyright-holders:Fabio Priuli
3 /***************************************************************************
4
5 P8000
6
7 09/2009 Skeleton driver based on Matt Knoth's emulator.
8 P8000emu (http://knothusa.net/Home.php) has been a great source of info.
9 Other info from
10 * http://www.pofo.de/P8000/notes/books/
11 * http://www.pofo.de/P8000/
12
13 P8000 memory layout
14 * divided into 3 banks of 64k
15 * bank A is for roms, only 0000-1FFF is populated
16 * bank B is for static ram, only 2000-2FFF exists
17 * bank C is for dynamic ram, all 64k is available.
18 * selection is done with OUT(c), code
19 * code = 0 for do nothing; 1 = bank A; 2 = bank B; 4 = bank C.
20 * Reg C = 0; Reg B = start address of memory that is being switched,
21 for example B = 20 indicates "bank2" in memory map, and also the
22 corresponding address in bank A/B/C.
23
24 P8000 monitor commands
25 * B : ?
26 * D : display and modify memory
27 * F : fill memory
28 * G : go to
29 * M : move (copy) memory
30 * N : dump registers
31 * O : boot from floppy
32 * P : ?
33 * Q : ?
34 * R : dump registers
35 * S : boot from floppy
36 * T : jump to ROM at CEF0
37 * X : jump to ROM at DB00
38 * return : boot from floppy disk
39
40 P8000_16 : All input must be in uppercase.
41
42 TODO:
43 * properly implement Z80 daisy chain in 16 bit board
44 * Find out how to enter hardware check on 16 bit board
45
46 ****************************************************************************/
47
48 #include "emu.h"
49 #include "cpu/z80/z80.h"
50 #include "machine/z80daisy.h"
51 #include "cpu/z8000/z8000.h"
52 #include "imagedev/floppy.h"
53 #include "machine/upd765.h"
54 #include "machine/z80ctc.h"
55 #include "machine/z80sio.h"
56 #include "machine/z80dma.h"
57 #include "machine/z80pio.h"
58 #include "sound/beep.h"
59 #include "speaker.h"
60 #include "machine/clock.h"
61 #include "bus/rs232/rs232.h"
62
63 class p8k_16_daisy_device : public device_t, public z80_daisy_chain_interface
64 {
65 public:
66 p8k_16_daisy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock);
viack_r()67 uint16_t viack_r() {
68 device_z80daisy_interface *intf = daisy_get_irq_device();
69 return intf ? intf->z80daisy_irq_ack() : 0;
70 }
reti_w(uint8_t data)71 void reti_w(uint8_t data) { if(data == 0x4d) daisy_call_reti_device(); }
72 protected:
device_start()73 void device_start() override {}
74 };
75
76 DEFINE_DEVICE_TYPE(P8K_16_DAISY, p8k_16_daisy_device, "p8k_16_daisy", "P8000 16-bit daisy chain device")
77
p8k_16_daisy_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)78 p8k_16_daisy_device::p8k_16_daisy_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
79 : device_t(mconfig, P8K_16_DAISY, tag, owner, clock)
80 , z80_daisy_chain_interface(mconfig, *this) {}
81
82
83 class p8k_state : public driver_device
84 {
85 public:
p8k_state(const machine_config & mconfig,device_type type,const char * tag)86 p8k_state(const machine_config &mconfig, device_type type, const char *tag)
87 : driver_device(mconfig, type, tag)
88 , m_maincpu(*this, "maincpu")
89 , m_daisy(*this, "p8k_16_daisy")
90 , m_pio2(*this, "pio2")
91 , m_i8272(*this, "i8272")
92 { }
93
94 void p8k(machine_config &config);
95 void p8k_16(machine_config &config);
96
97 void init_p8k();
98
99 private:
100 uint8_t port0_r(offs_t offset);
101 void port0_w(offs_t offset, uint8_t data);
102 DECLARE_MACHINE_RESET(p8k);
103
104 DECLARE_WRITE_LINE_MEMBER(fdc_irq);
105 DECLARE_WRITE_LINE_MEMBER(p8k_daisy_interrupt);
106 DECLARE_WRITE_LINE_MEMBER(p8k_dma_irq_w);
107 DECLARE_WRITE_LINE_MEMBER(p8k_16_daisy_interrupt );
108 uint8_t memory_read_byte(offs_t offset);
109 void memory_write_byte(offs_t offset, uint8_t data);
110 uint8_t io_read_byte(offs_t offset);
111 void io_write_byte(offs_t offset, uint8_t data);
112
113 void p8k_16_datamap(address_map &map);
114 void p8k_16_iomap(address_map &map);
115 void p8k_16_memmap(address_map &map);
116 void p8k_iomap(address_map &map);
117 void p8k_memmap(address_map &map);
118
119 required_device<cpu_device> m_maincpu; // Z80 or Z8001 depending on the machine
120 optional_device<p8k_16_daisy_device> m_daisy;
121 optional_device<z80pio_device> m_pio2;
122 optional_device<i8272a_device> m_i8272;
123 };
124
125 /***************************************************************************
126
127 P8000 8bit
128
129 ****************************************************************************/
130
p8k_memmap(address_map & map)131 void p8k_state::p8k_memmap(address_map &map)
132 {
133 map(0x0000, 0x0FFF).bankrw("bank0");
134 map(0x1000, 0x1FFF).bankrw("bank1");
135 map(0x2000, 0x2FFF).bankrw("bank2");
136 map(0x3000, 0x3FFF).bankrw("bank3");
137 map(0x4000, 0x4FFF).bankrw("bank4");
138 map(0x5000, 0x5FFF).bankrw("bank5");
139 map(0x6000, 0x6FFF).bankrw("bank6");
140 map(0x7000, 0x7FFF).bankrw("bank7");
141 map(0x8000, 0x8FFF).bankrw("bank8");
142 map(0x9000, 0x9FFF).bankrw("bank9");
143 map(0xA000, 0xAFFF).bankrw("bank10");
144 map(0xB000, 0xBFFF).bankrw("bank11");
145 map(0xC000, 0xCFFF).bankrw("bank12");
146 map(0xD000, 0xDFFF).bankrw("bank13");
147 map(0xE000, 0xEFFF).bankrw("bank14");
148 map(0xF000, 0xFFFF).bankrw("bank15");
149 }
150
p8k_iomap(address_map & map)151 void p8k_state::p8k_iomap(address_map &map)
152 {
153 map.global_mask(0xff);
154 map(0x00, 0x07).rw(FUNC(p8k_state::port0_r), FUNC(p8k_state::port0_w)); // MH7489
155 map(0x08, 0x0b).rw("ctc0", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
156 map(0x0c, 0x0f).rw("pio0", FUNC(z80pio_device::read_alt), FUNC(z80pio_device::write_alt));
157 map(0x18, 0x1b).rw("pio1", FUNC(z80pio_device::read_alt), FUNC(z80pio_device::write_alt));
158 map(0x1c, 0x1f).rw(m_pio2, FUNC(z80pio_device::read_alt), FUNC(z80pio_device::write_alt));
159 map(0x20, 0x21).m(m_i8272, FUNC(i8272a_device::map));
160 map(0x24, 0x27).rw("sio", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w));
161 map(0x28, 0x2b).rw("sio1", FUNC(z80sio_device::ba_cd_r), FUNC(z80sio_device::ba_cd_w));
162 map(0x2c, 0x2f).rw("ctc1", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write));
163 map(0x3c, 0x3c).rw("dma", FUNC(z80dma_device::read), FUNC(z80dma_device::write));
164 }
165
166
167
port0_r(offs_t offset)168 uint8_t p8k_state::port0_r(offs_t offset)
169 {
170 return 0;
171 }
172
173 // see memory explanation above
port0_w(offs_t offset,uint8_t data)174 void p8k_state::port0_w(offs_t offset, uint8_t data)
175 {
176 uint8_t breg = m_maincpu->state_int(Z80_B) >> 4;
177 if ((data==1) || (data==2) || (data==4))
178 {
179 char banknum[8];
180 sprintf(banknum,"bank%d", breg);
181
182 offset = 0;
183 if (data==2)
184 offset = 16;
185 else
186 if (data==4)
187 offset = 32;
188
189 offset += breg;
190
191 membank(banknum)->set_entry(offset);
192 }
193 else
194 if (data)
195 printf("Invalid data %X for bank %d\n",data,breg);
196 }
197
198
199 /***************************************************************************
200
201 P8000 8bit Peripherals
202
203 ****************************************************************************/
204
WRITE_LINE_MEMBER(p8k_state::p8k_daisy_interrupt)205 WRITE_LINE_MEMBER( p8k_state::p8k_daisy_interrupt )
206 {
207 m_maincpu->set_input_line(0, state);
208 }
209
210 /* Z80 DMA */
211
WRITE_LINE_MEMBER(p8k_state::p8k_dma_irq_w)212 WRITE_LINE_MEMBER( p8k_state::p8k_dma_irq_w )
213 {
214 m_i8272->tc_w(state);
215 p8k_daisy_interrupt(state);
216 }
217
memory_read_byte(offs_t offset)218 uint8_t p8k_state::memory_read_byte(offs_t offset)
219 {
220 address_space& prog_space = m_maincpu->space(AS_PROGRAM);
221 return prog_space.read_byte(offset);
222 }
223
memory_write_byte(offs_t offset,uint8_t data)224 void p8k_state::memory_write_byte(offs_t offset, uint8_t data)
225 {
226 address_space& prog_space = m_maincpu->space(AS_PROGRAM);
227 prog_space.write_byte(offset, data);
228 }
229
io_read_byte(offs_t offset)230 uint8_t p8k_state::io_read_byte(offs_t offset)
231 {
232 address_space& prog_space = m_maincpu->space(AS_IO);
233 return prog_space.read_byte(offset);
234 }
235
io_write_byte(offs_t offset,uint8_t data)236 void p8k_state::io_write_byte(offs_t offset, uint8_t data)
237 {
238 address_space& prog_space = m_maincpu->space(AS_IO);
239 prog_space.write_byte(offset, data);
240 }
241
242
243 /* Z80 Daisy Chain */
244
245 static const z80_daisy_config p8k_daisy_chain[] =
246 {
247 { "dma" }, /* FDC related */
248 { "pio2" },
249 { "ctc0" },
250 { "sio" },
251 { "sio1" },
252 { "pio0" },
253 { "pio1" },
254 { "ctc1" },
255 { nullptr }
256 };
257
258 /* Intel 8272 Interface */
259
DECLARE_WRITE_LINE_MEMBER(p8k_state::fdc_irq)260 DECLARE_WRITE_LINE_MEMBER( p8k_state::fdc_irq )
261 {
262 m_pio2->port_b_write(state ? 0x10 : 0x00);
263 }
264
p8k_floppies(device_slot_interface & device)265 static void p8k_floppies(device_slot_interface &device)
266 {
267 device.option_add("525hd", FLOPPY_525_HD);
268 }
269
270 /* Input ports */
271 static INPUT_PORTS_START( p8k )
272 PORT_START("DSW")
273 PORT_BIT( 0x7f, 0x7f, IPT_UNUSED )
274 PORT_DIPNAME( 0x80, 0x00, "Hardware Test")
DEF_STR(Off)275 PORT_DIPSETTING( 0x00, DEF_STR(Off))
276 PORT_DIPSETTING( 0x80, DEF_STR(On))
277 INPUT_PORTS_END
278
279
280 MACHINE_RESET_MEMBER(p8k_state,p8k)
281 {
282 membank("bank0")->set_entry(0);
283 membank("bank1")->set_entry(0);
284 membank("bank2")->set_entry(0);
285 membank("bank3")->set_entry(0);
286 membank("bank4")->set_entry(0);
287 membank("bank5")->set_entry(0);
288 membank("bank6")->set_entry(0);
289 membank("bank7")->set_entry(0);
290 membank("bank8")->set_entry(0);
291 membank("bank9")->set_entry(0);
292 membank("bank10")->set_entry(0);
293 membank("bank11")->set_entry(0);
294 membank("bank12")->set_entry(0);
295 membank("bank13")->set_entry(0);
296 membank("bank14")->set_entry(0);
297 membank("bank15")->set_entry(0);
298 }
299
init_p8k()300 void p8k_state::init_p8k()
301 {
302 uint8_t *RAM = memregion("maincpu")->base();
303 membank("bank0")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
304 membank("bank1")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
305 membank("bank2")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
306 membank("bank3")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
307 membank("bank4")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
308 membank("bank5")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
309 membank("bank6")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
310 membank("bank7")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
311 membank("bank8")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
312 membank("bank9")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
313 membank("bank10")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
314 membank("bank11")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
315 membank("bank12")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
316 membank("bank13")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
317 membank("bank14")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
318 membank("bank15")->configure_entries(0, 48, &RAM[0x0000], 0x1000);
319 }
320
321
322 /***************************************************************************
323
324 P8000 16bit
325
326 ****************************************************************************/
327
p8k_16_memmap(address_map & map)328 void p8k_state::p8k_16_memmap(address_map &map)
329 {
330 map(0x00000, 0x03fff).rom().share("share0");
331 map(0x04000, 0x07fff).ram().share("share1");
332 map(0x08000, 0xfffff).ram().share("share2");
333 }
334
p8k_16_datamap(address_map & map)335 void p8k_state::p8k_16_datamap(address_map &map)
336 {
337 map(0x00000, 0x03fff).rom().share("share0");
338 map(0x04000, 0x07fff).ram().share("share1");
339 map(0x08000, 0xfffff).ram().share("share2");
340 }
341
342
p8k_16_iomap(address_map & map)343 void p8k_state::p8k_16_iomap(address_map &map)
344 {
345 // map(0x0fef0, 0x0feff) // clock
346 map(0x0ff80, 0x0ff87).rw("sio", FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff);
347 map(0x0ff88, 0x0ff8f).rw("sio1", FUNC(z80sio_device::cd_ba_r), FUNC(z80sio_device::cd_ba_w)).umask16(0x00ff);
348 map(0x0ff90, 0x0ff97).rw("pio0", FUNC(z80pio_device::read_alt), FUNC(z80pio_device::write_alt)).umask16(0x00ff);
349 map(0x0ff98, 0x0ff9f).rw("pio1", FUNC(z80pio_device::read_alt), FUNC(z80pio_device::write_alt)).umask16(0x00ff);
350 map(0x0ffa0, 0x0ffa7).rw(m_pio2, FUNC(z80pio_device::read_alt), FUNC(z80pio_device::write_alt)).umask16(0x00ff);
351 map(0x0ffa8, 0x0ffaf).rw("ctc0", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)).umask16(0x00ff);
352 map(0x0ffb0, 0x0ffb7).rw("ctc1", FUNC(z80ctc_device::read), FUNC(z80ctc_device::write)).umask16(0x00ff);
353 // map(0x0ffc0, 0x0ffc1) // SCR
354 // map(0x0ffc8, 0x0ffc9) // SBR
355 // map(0x0ffd0, 0x0ffd1) // NBR
356 // map(0x0ffd8, 0x0ffd9) // SNVR
357 map(0x0ffe1, 0x0ffe1).w(m_daisy, FUNC(p8k_16_daisy_device::reti_w));
358 // map(0x0fff0, 0x0fff1) // TRPL
359 // map(0x0fff8, 0x0fff9) // IF1L
360 }
361
362
363 /***************************************************************************
364
365 P8000 16bit Peripherals
366
367 ****************************************************************************/
368
WRITE_LINE_MEMBER(p8k_state::p8k_16_daisy_interrupt)369 WRITE_LINE_MEMBER( p8k_state::p8k_16_daisy_interrupt )
370 {
371 m_maincpu->set_input_line(z8001_device::VI_LINE, state ? ASSERT_LINE : CLEAR_LINE);
372 }
373
374
375 /* Z80 Daisy Chain */
376
377 static const z80_daisy_config p8k_16_daisy_chain[] =
378 {
379 { "ctc0" },
380 { "ctc1" },
381 { "sio" },
382 { "sio1" },
383 { "pio0" },
384 { "pio1" },
385 { "pio2" },
386 { nullptr }
387 };
388
389
390
391 #if 0
392 /* F4 Character Displayer */
393 static const gfx_layout p8k_charlayout =
394 {
395 8, 12, /* 8 x 12 characters */
396 256, /* 256 characters */
397 1, /* 1 bits per pixel */
398 { 0 }, /* no bitplanes */
399 /* x offsets */
400 { 0, 1, 2, 3, 4, 5, 6, 7 },
401 /* y offsets */
402 { 0*8, 1*8, 2*8, 3*8, 4*8, 5*8, 6*8, 7*8, 8*8, 9*8, 10*8, 11*8 },
403 8*16 /* every char takes 16 bytes */
404 };
405
406 static GFXDECODE_START( p8k )
407 GFXDECODE_ENTRY( "chargen", 0x0000, p8k_charlayout, 0, 1 )
408 GFXDECODE_END
409 #endif
410
411
412 /***************************************************************************
413
414 Machine Drivers
415
416 ****************************************************************************/
417
p8k(machine_config & config)418 void p8k_state::p8k(machine_config &config)
419 {
420 /* basic machine hardware */
421 z80_device& maincpu(Z80(config, "maincpu", 16_MHz_XTAL / 4));
422 maincpu.set_daisy_config(p8k_daisy_chain);
423 maincpu.set_addrmap(AS_PROGRAM, &p8k_state::p8k_memmap);
424 maincpu.set_addrmap(AS_IO, &p8k_state::p8k_iomap);
425
426 MCFG_MACHINE_RESET_OVERRIDE(p8k_state,p8k)
427
428 /* peripheral hardware */
429 z80dma_device& dma(Z80DMA(config, "dma", 16_MHz_XTAL / 4));
430 dma.out_busreq_callback().set(FUNC(p8k_state::p8k_dma_irq_w));
431 dma.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
432 dma.in_mreq_callback().set(FUNC(p8k_state::memory_read_byte));
433 dma.out_mreq_callback().set(FUNC(p8k_state::memory_write_byte));
434 dma.in_iorq_callback().set(FUNC(p8k_state::io_read_byte));
435 dma.out_iorq_callback().set(FUNC(p8k_state::io_write_byte));
436
437 clock_device &uart_clock(CLOCK(config, "uart_clock", 307200));
438 uart_clock.signal_handler().set("sio", FUNC(z80sio_device::txcb_w));
439 uart_clock.signal_handler().append("sio", FUNC(z80sio_device::rxcb_w));
440
441 z80ctc_device& ctc0(Z80CTC(config, "ctc0", 1229000)); /* 1.22MHz clock */
442 // to implement: callbacks!
443 // manual states the callbacks should go to
444 // Baud Gen 3, FDC, System-Kanal
445 ctc0.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
446
447 z80ctc_device& ctc1(Z80CTC(config, "ctc1", 1229000)); /* 1.22MHz clock */
448 // to implement: callbacks!
449 // manual states the callbacks should go to
450 // Baud Gen 0, Baud Gen 1, Baud Gen 2,
451 ctc1.intr_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
452
453 z80sio_device& sio(Z80SIO(config, "sio", 16_MHz_XTAL / 4));
454 sio.out_txdb_callback().set("rs232", FUNC(rs232_port_device::write_txd));
455 sio.out_dtrb_callback().set("rs232", FUNC(rs232_port_device::write_dtr));
456 sio.out_rtsb_callback().set("rs232", FUNC(rs232_port_device::write_rts));
457 sio.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
458
459 rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal"));
460 rs232.rxd_handler().set("sio", FUNC(z80sio_device::rxb_w));
461 rs232.cts_handler().set("sio", FUNC(z80sio_device::ctsb_w));
462
463 z80sio_device& sio1(Z80SIO(config, "sio1", 16_MHz_XTAL / 4));
464 sio1.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
465
466 z80pio_device& pio0(Z80PIO(config, "pio0", 1229000));
467 pio0.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
468
469 z80pio_device& pio1(Z80PIO(config, "pio1", 1229000));
470 pio1.out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
471
472 Z80PIO(config, m_pio2, 1229000);
473 m_pio2->out_int_callback().set_inputline(m_maincpu, INPUT_LINE_IRQ0);
474 m_pio2->in_pa_callback().set_ioport("DSW");
475
476 I8272A(config, m_i8272, 16_MHz_XTAL / 2, true);
477 m_i8272->drq_wr_callback().set("dma", FUNC(z80dma_device::rdy_w));
478 FLOPPY_CONNECTOR(config, "i8272:0", p8k_floppies, "525hd", floppy_image_device::default_floppy_formats);
479 FLOPPY_CONNECTOR(config, "i8272:1", p8k_floppies, "525hd", floppy_image_device::default_floppy_formats);
480
481 /* sound hardware */
482 SPEAKER(config, "mono").front_center();
483
484 BEEP(config, "beeper", 3250).add_route(ALL_OUTPUTS, "mono", 0.5);
485 }
486
p8k_16(machine_config & config)487 void p8k_state::p8k_16(machine_config &config)
488 {
489 /* basic machine hardware */
490 z8001_device &maincpu(Z8001(config, m_maincpu, XTAL(4'000'000)));
491 maincpu.set_addrmap(AS_PROGRAM, &p8k_state::p8k_16_memmap);
492 maincpu.set_addrmap(AS_DATA, &p8k_state::p8k_16_datamap);
493 maincpu.set_addrmap(AS_IO, &p8k_state::p8k_16_iomap);
494 maincpu.viack().set("p8k_16_daisy", FUNC(p8k_16_daisy_device::viack_r));
495
496 P8K_16_DAISY(config, m_daisy, 0);
497 m_daisy->set_daisy_config(p8k_16_daisy_chain);
498
499 clock_device &uart_clock(CLOCK(config, "uart_clock", 307200));
500 uart_clock.signal_handler().set("sio", FUNC(z80sio_device::txcb_w));
501 uart_clock.signal_handler().append("sio", FUNC(z80sio_device::rxcb_w));
502
503 /* peripheral hardware */
504 z80ctc_device& ctc0(Z80CTC(config, "ctc0", XTAL(4'000'000)));
505 ctc0.intr_callback().set(FUNC(p8k_state::p8k_16_daisy_interrupt));
506
507 z80ctc_device& ctc1(Z80CTC(config, "ctc1", XTAL(4'000'000)));
508 ctc1.intr_callback().set(FUNC(p8k_state::p8k_16_daisy_interrupt));
509
510 z80sio_device& sio(Z80SIO(config, "sio", XTAL(4'000'000)));
511 sio.out_txdb_callback().set("rs232", FUNC(rs232_port_device::write_txd));
512 sio.out_dtrb_callback().set("rs232", FUNC(rs232_port_device::write_dtr));
513 sio.out_rtsb_callback().set("rs232", FUNC(rs232_port_device::write_rts));
514 sio.out_int_callback().set(FUNC(p8k_state::p8k_16_daisy_interrupt));
515
516 rs232_port_device &rs232(RS232_PORT(config, "rs232", default_rs232_devices, "terminal"));
517 rs232.rxd_handler().set("sio", FUNC(z80sio_device::rxb_w));
518 rs232.cts_handler().set("sio", FUNC(z80sio_device::ctsb_w));
519
520 z80sio_device& sio1(Z80SIO(config, "sio1", XTAL(4'000'000)));
521 sio1.out_int_callback().set(FUNC(p8k_state::p8k_16_daisy_interrupt));
522
523 z80pio_device& pio0(Z80PIO(config, "pio0", XTAL(4'000'000)));
524 pio0.out_int_callback().set(FUNC(p8k_state::p8k_16_daisy_interrupt));
525
526 z80pio_device& pio1(Z80PIO(config, "pio1", XTAL(4'000'000)));
527 pio1.out_int_callback().set(FUNC(p8k_state::p8k_16_daisy_interrupt));
528
529 Z80PIO(config, m_pio2, XTAL(4'000'000));
530 m_pio2->out_int_callback().set(FUNC(p8k_state::p8k_16_daisy_interrupt));
531
532 /* sound hardware */
533 SPEAKER(config, "mono").front_center();
534 BEEP(config, "beeper", 3250).add_route(ALL_OUTPUTS, "mono", 0.5);
535 }
536
537 /* ROM definition */
538 ROM_START( p8000 )
539 ROM_REGION( 0x30000, "maincpu", 0 )
540 ROM_LOAD("mon8_1_3.1", 0x0000, 0x1000, CRC(ad1bb118) SHA1(2332963acd74d5d1a009d9bce8a2b108de01d2a5))
541 ROM_LOAD("mon8_2_3.1", 0x1000, 0x1000, CRC(daced7c2) SHA1(f1f778e72568961b448020fc543ed6e81bbe81b1))
542
543 // this is for the p8000's terminal, not the p8000 itself
544 ROM_REGION( 0x1000, "chargen", 0 )
545 ROM_LOAD("p8t_zs", 0x0000, 0x0800, CRC(f9321251) SHA1(a6a796b58d50ec4a416f2accc34bd76bc83f18ea))
546 ROM_LOAD("p8tdzs.2", 0x0800, 0x0800, CRC(32736503) SHA1(6a1d7c55dddc64a7d601dfdbf917ce1afaefbb0a))
547
548 ROM_REGION( 0x2000, "user1", 0 )
549 ROM_LOAD( "wdc4.2_1-2c43.bin", 0x0000, 0x1000, CRC(2646f1ee) SHA1(f62574ad57a2c8ac55c5df89256a707c0cafc0eb) )
550 ROM_LOAD( "wdc4.2_2-5d66.bin", 0x1000, 0x1000, CRC(5d496b65) SHA1(42166d7ec51fce086c65ea829d8a3d63088815ca) )
551 ROM_END
552
553 ROM_START( p8000_16 )
554 ROM_REGION16_BE( 0x4000, "maincpu", 0 )
555 ROM_LOAD16_BYTE("mon16_1h_3.1_udos", 0x0000, 0x1000, CRC(0c3c28da) SHA1(0cd35444c615b404ebb9cf80da788593e573ddb5))
556 ROM_LOAD16_BYTE("mon16_1l_3.1_udos", 0x0001, 0x1000, CRC(e8857bdc) SHA1(f89c65cbc479101130c71806fd3ddc28e6383f12))
557 ROM_LOAD16_BYTE("mon16_2h_3.1_udos", 0x2000, 0x1000, CRC(cddf58d5) SHA1(588bad8df75b99580459c7a8e898a3396907e3a4))
558 ROM_LOAD16_BYTE("mon16_2l_3.1_udos", 0x2001, 0x1000, CRC(395ee7aa) SHA1(d72fadb1608cd0915cd5ce6440897303ac5a12a6))
559
560 // this is for the p8000's terminal, not the p8000 itself
561 ROM_REGION( 0x1000, "chargen", 0 )
562 ROM_LOAD("p8t_zs", 0x0000, 0x0800, CRC(f9321251) SHA1(a6a796b58d50ec4a416f2accc34bd76bc83f18ea))
563 ROM_LOAD("p8tdzs.2", 0x0800, 0x0800, CRC(32736503) SHA1(6a1d7c55dddc64a7d601dfdbf917ce1afaefbb0a))
564 ROM_END
565
566 /* Driver */
567
568 // YEAR NAME PARENT COMPAT MACHINE INPUT CLASS INIT COMPANY FULLNAME FLAGS
569 COMP( 1989, p8000, 0, 0, p8k, p8k, p8k_state, init_p8k, "EAW electronic Treptow", "P8000 (8bit Board)", MACHINE_NOT_WORKING)
570 COMP( 1989, p8000_16, p8000, 0, p8k_16, p8k, p8k_state, empty_init, "EAW electronic Treptow", "P8000 (16bit Board)", MACHINE_NOT_WORKING)
571