1 // license:BSD-3-Clause
2 // copyright-holders:Robbbert
3 /**********************************************************************************
4
5 PINBALL
6 Technoplay "2-2C 8008 LS" (68000 CPU)
7 Schematic and PinMAME used as references
8
9 ToDo:
10 - Once you press the credit button, nothing responds (game requires 4 balls)
11 - Sliding display is too fast to read (much better if cpu xtal changed to 4MHz)
12 - No sound due to missing roms
13
14 ***********************************************************************************/
15
16
17 #include "emu.h"
18 #include "machine/genpin.h"
19 #include "cpu/m68000/m68000.h"
20 #include "techno.lh"
21
22
23 class techno_state : public driver_device
24 {
25 public:
techno_state(const machine_config & mconfig,device_type type,const char * tag)26 techno_state(const machine_config &mconfig, device_type type, const char *tag)
27 : driver_device(mconfig, type, tag)
28 , m_maincpu(*this, "maincpu")
29 , m_switch(*this, "SWITCH.%u", 0)
30 , m_digits(*this, "digit%u", 0U)
31 { }
32
33 void techno(machine_config &config);
34
35 private:
36 enum
37 {
38 IRQ_SET_TIMER,
39 IRQ_ADVANCE_TIMER
40 };
41
42 uint16_t key_r();
43 uint16_t rtrg_r();
44 uint16_t sound_r();
45 void disp1_w(uint16_t data);
46 void disp2_w(uint16_t data);
47 void lamp1_w(uint16_t data);
48 void lamp2_w(uint16_t data);
49 void setout_w(uint16_t data);
50 void sol1_w(uint16_t data);
51 void sol2_w(uint16_t data);
52 void sound_w(uint16_t data);
53
rd_r()54 uint8_t rd_r() { return 0; }
wr_w(uint8_t data)55 void wr_w(uint8_t data) {}
56
57 void techno_map(address_map &map);
58 void techno_sub_map(address_map &map);
59 void cpu_space_map(address_map &map);
60
61 virtual void device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr) override;
62 virtual void machine_start() override;
63 virtual void machine_reset() override;
64
65 required_device<cpu_device> m_maincpu;
66 required_ioport_array<8> m_switch;
67 output_finder<48> m_digits;
68
69 emu_timer *m_irq_set_timer;
70 emu_timer *m_irq_advance_timer;
71
72 bool m_digwait;
73 uint8_t m_keyrow;
74 uint16_t m_digit;
75 uint8_t m_vector;
76 };
77
78
techno_map(address_map & map)79 void techno_state::techno_map(address_map &map)
80 {
81 map.global_mask(0x1ffff);
82 map(0x00000, 0x03fff).rom();
83 map(0x04000, 0x04fff).ram().share("nvram"); // battery backed-up
84 map(0x06000, 0x0ffff).rom();
85 map(0x14000, 0x147ff).rw(FUNC(techno_state::key_r), FUNC(techno_state::lamp1_w));
86 map(0x14800, 0x14fff).rw(FUNC(techno_state::sound_r), FUNC(techno_state::lamp2_w));
87 map(0x15000, 0x157ff).rw(FUNC(techno_state::rtrg_r), FUNC(techno_state::sol1_w));
88 map(0x15800, 0x15fff).nopr().w(FUNC(techno_state::sol2_w)); // reads from 15800, but shown as not connected
89 map(0x16000, 0x167ff).w(FUNC(techno_state::sound_w));
90 map(0x16800, 0x16fff).w(FUNC(techno_state::disp1_w));
91 map(0x17000, 0x177ff).w(FUNC(techno_state::disp2_w));
92 map(0x17800, 0x17fff).w(FUNC(techno_state::setout_w));
93 }
94
techno_sub_map(address_map & map)95 void techno_state::techno_sub_map(address_map &map)
96 { // no ram here, must be internal to the cpu
97 map(0x0000, 0x3fff).r(FUNC(techno_state::rd_r)); // to TKY2016A audio processor which has its own 3.58MHz clock
98 map(0x4000, 0x7fff).w(FUNC(techno_state::wr_w)); // A11=LED;A12=WR2 (DAC) ;A13=WR1 (TKY2016A as above)
99 map(0x4000, 0xbfff).rom(); // 4000-7FFF is same as 8000-BFFF; 4x 16k ROMS bankswitched
100 map(0xc000, 0xffff).rom(); // another 16k ROM
101 }
102
disp1_w(uint16_t data)103 void techno_state::disp1_w(uint16_t data)
104 {
105 m_digits[m_digit] = bitswap<16>(data, 12, 10, 8, 14, 13, 9, 11, 15, 7, 6, 5, 4, 3, 2, 1, 0);
106 }
107
disp2_w(uint16_t data)108 void techno_state::disp2_w(uint16_t data)
109 {
110 m_digits[m_digit+30] = bitswap<16>(data, 12, 10, 8, 14, 13, 9, 11, 15, 7, 6, 5, 4, 3, 2, 1, 0);
111 }
112
sound_w(uint16_t data)113 void techno_state::sound_w(uint16_t data)
114 {
115 /*
116 d0..d7 : to sound board
117 d8 : strobe to display board
118 d9 : reset (unknown purpose)
119 d10 : data clock to display board
120 d11-d15: AUX outputs
121 */
122
123 // this code derived from PinMAME
124 if (m_digwait)
125 m_digit = (m_digit+1) % 16;
126
127 if (BIT(data, 10))
128 {
129 m_digwait = 1;
130 m_digit = 0;
131 }
132 }
133
134 // lamps & keymatrix
lamp1_w(uint16_t data)135 void techno_state::lamp1_w(uint16_t data)
136 {
137 // Work out key row
138 for (int i = 8; i < 16; i++)
139 if (BIT(data, i))
140 m_keyrow = i-8;
141 }
142
143 // more lamps
lamp2_w(uint16_t data)144 void techno_state::lamp2_w(uint16_t data)
145 {
146 }
147
148 // solenoids
sol1_w(uint16_t data)149 void techno_state::sol1_w(uint16_t data)
150 {
151 }
152
153 // more solenoids
sol2_w(uint16_t data)154 void techno_state::sol2_w(uint16_t data)
155 {
156 }
157
158 // unknown
setout_w(uint16_t data)159 void techno_state::setout_w(uint16_t data)
160 {
161 }
162
163 // inputs
key_r()164 uint16_t techno_state::key_r()
165 {
166 return m_switch[m_keyrow]->read();
167 }
168
169 // unknown
rtrg_r()170 uint16_t techno_state::rtrg_r()
171 {
172 return 0xffff;
173 }
174
175 // feedback from sound board, and some AUX inputs
sound_r()176 uint16_t techno_state::sound_r()
177 {
178 return 0;
179 }
180
181 static INPUT_PORTS_START( techno )
182 PORT_START("SWITCH.0")
PORT_CODE(KEYCODE_F5)183 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Letter select+") PORT_CODE(KEYCODE_F5)
184 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_COIN3 )
185 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_COIN2 )
186 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_COIN1 )
187 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_SERVICE )
188 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_TILT2 )
189 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Test-") PORT_CODE(KEYCODE_F7)
190 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Test+") PORT_CODE(KEYCODE_F8)
191 PORT_START("SWITCH.1")
192 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix top target right")
193 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Horizontal rail right")
194 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_UNUSED )
195 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Mini Post") PORT_CODE(KEYCODE_I)
196 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_UNUSED )
197 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_TILT )
198 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_START )
199 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Letter select+") PORT_CODE(KEYCODE_F6)
200 PORT_START("SWITCH.2")
201 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_UNUSED )
202 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Inner Canal Left") PORT_CODE(KEYCODE_O)
203 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Exit Canal Right") PORT_CODE(KEYCODE_OPENBRACE)
204 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Ball 1")
205 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Ball 2")
206 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Ball 3")
207 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Ball 4")
208 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Out Hole") PORT_CODE(KEYCODE_X)
209 PORT_START("SWITCH.3")
210 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Top Bumper") PORT_CODE(KEYCODE_Q)
211 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Bottom Bumper") PORT_CODE(KEYCODE_W)
212 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Top Right Kicker") PORT_CODE(KEYCODE_E)
213 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Right Kicker") PORT_CODE(KEYCODE_R)
214 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Kicker") PORT_CODE(KEYCODE_Y)
215 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Exit Canal Left") PORT_CODE(KEYCODE_U)
216 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Inner Canal Right") PORT_CODE(KEYCODE_I)
217 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_UNUSED )
218 PORT_START("SWITCH.4")
219 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix left target bottom") PORT_CODE(KEYCODE_A)
220 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left rollover") PORT_CODE(KEYCODE_S)
221 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Barrier 1 Target") PORT_CODE(KEYCODE_D)
222 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_UNUSED )
223 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Barrier 2 Target") PORT_CODE(KEYCODE_F)
224 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
225 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Barrier 3 Target") PORT_CODE(KEYCODE_G)
226 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Left Bumper") PORT_CODE(KEYCODE_H)
227 PORT_START("SWITCH.5")
228 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix right target top") PORT_CODE(KEYCODE_J)
229 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix right target middle-top") PORT_CODE(KEYCODE_K)
230 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Spinning Target") PORT_CODE(KEYCODE_L)
231 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fixed contact") PORT_CODE(KEYCODE_COLON)
232 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Special Target") PORT_CODE(KEYCODE_QUOTE)
233 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
234 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix left target top") PORT_CODE(KEYCODE_CLOSEBRACE)
235 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix left target centre") PORT_CODE(KEYCODE_BACKSLASH)
236 PORT_START("SWITCH.6")
237 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix top left target left") PORT_CODE(KEYCODE_Z)
238 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Ball 1 Bridge")
239 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Ball 2 Bridge")
240 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Ball 3 Bridge")
241 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Ball 4 Bridge")
242 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_UNUSED )
243 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix right target middle-bottom") PORT_CODE(KEYCODE_C)
244 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix right target bottom") PORT_CODE(KEYCODE_V)
245 PORT_START("SWITCH.7")
246 PORT_BIT( 0x01, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix top target middle-right") PORT_CODE(KEYCODE_B)
247 PORT_BIT( 0x02, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix top target middle-left") PORT_CODE(KEYCODE_N)
248 PORT_BIT( 0x04, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix top target Left") PORT_CODE(KEYCODE_M)
249 PORT_BIT( 0x08, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Horizontal Rail Left") PORT_CODE(KEYCODE_COMMA)
250 PORT_BIT( 0x10, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Chopper Exit") PORT_CODE(KEYCODE_STOP)
251 PORT_BIT( 0x20, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Chopper Entry") PORT_CODE(KEYCODE_SLASH)
252 PORT_BIT( 0x40, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix top left target right") PORT_CODE(KEYCODE_MINUS)
253 PORT_BIT( 0x80, IP_ACTIVE_HIGH, IPT_OTHER ) PORT_NAME("Fix top left target middle") PORT_CODE(KEYCODE_EQUALS)
254 INPUT_PORTS_END
255
256 void techno_state::cpu_space_map(address_map &map)
257 {
258 map(0xfffff0, 0xffffff).m(m_maincpu, FUNC(m68000_base_device::autovectors_map));
259 map(0xfffff2, 0xfffff3).lr16(NAME([this] () -> u16 { return m_vector; }));
260 }
261
device_timer(emu_timer & timer,device_timer_id id,int param,void * ptr)262 void techno_state::device_timer(emu_timer &timer, device_timer_id id, int param, void *ptr)
263 {
264 if (id == IRQ_ADVANCE_TIMER)
265 {
266 // vectors change per int: 88-8F, 98-9F)
267 if ((m_vector & 7) == 7)
268 m_vector = (m_vector ^ 0x10) & 0x97;
269 m_vector++;
270
271 // schematics show a 74HC74 cleared only upon IRQ acknowledgment or reset, but this is clearly incorrect for xforce
272 m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
273 }
274 else if (id == IRQ_SET_TIMER)
275 {
276 m_maincpu->set_input_line(M68K_IRQ_1, ASSERT_LINE);
277 m_irq_advance_timer->adjust(attotime::from_hz(XTAL(8'000'000) / 32));
278 }
279 }
280
machine_start()281 void techno_state::machine_start()
282 {
283 m_irq_set_timer = timer_alloc(IRQ_SET_TIMER);
284 m_irq_advance_timer = timer_alloc(IRQ_ADVANCE_TIMER);
285 }
286
machine_reset()287 void techno_state::machine_reset()
288 {
289 m_digits.resolve();
290 m_vector = 0x88;
291 m_digit = 0;
292
293 attotime freq = attotime::from_hz(XTAL(8'000'000) / 256); // 31250Hz
294 m_irq_set_timer->adjust(freq, 0, freq);
295 m_maincpu->set_input_line(M68K_IRQ_1, CLEAR_LINE);
296 }
297
techno(machine_config & config)298 void techno_state::techno(machine_config &config)
299 {
300 /* basic machine hardware */
301 M68000(config, m_maincpu, XTAL(8'000'000));
302 m_maincpu->set_addrmap(AS_PROGRAM, &techno_state::techno_map);
303 m_maincpu->set_addrmap(m68000_base_device::AS_CPU_SPACE, &techno_state::cpu_space_map);
304
305 NVRAM(config, "nvram", nvram_device::DEFAULT_ALL_0);
306
307 //tms7000_device &cpu2(TMS7000(config, "cpu2", XTAL(4'000'000)));
308 //cpu2.set_addrmap(AS_PROGRAM, &techno_state::techno_sub_map);
309
310 /* Video */
311 config.set_default_layout(layout_techno);
312 }
313
314 ROM_START(xforce)
315 ROM_REGION(0x10000, "maincpu", 0)
316 ROM_LOAD16_BYTE("ic15", 0x0001, 0x8000, CRC(fb8d2853) SHA1(0b0004abfe32edfd3ac15d66f90695d264c97eba))
317 ROM_LOAD16_BYTE("ic17", 0x0000, 0x8000, CRC(122ef649) SHA1(0b425f81869bc359841377a91c39f44395502bff))
318
319 //ROM_REGION(0x20000, "cpu2", 0)
320 // 5 x 27256 roms are undumped
321 ROM_END
322
323 ROM_START(spcteam)
324 ROM_REGION(0x10000, "maincpu", 0)
325 ROM_LOAD16_BYTE("cpu_top.bin", 0x000001, 0x8000, CRC(b11dcf1f) SHA1(084eb98ee4c9f32d5518897a891ad1a601850d80))
326 ROM_LOAD16_BYTE("cpu_bot.bin", 0x000000, 0x8000, CRC(892a5592) SHA1(c30dce37a5aae2834459179787f6c99353aadabb))
327
328 ROM_REGION(0x10000, "cpu2", 0)
329 ROM_LOAD("sound.bin", 0x8000, 0x8000, CRC(6a87370f) SHA1(51e055dcf23a30e337ff439bba3c40e5c51c490a))
330 ROM_RELOAD(0, 0x8000)
331 ROM_END
332
333 GAME(1987, xforce, 0, techno, techno, techno_state, empty_init, ROT0, "Tecnoplay", "X Force", MACHINE_IS_SKELETON_MECHANICAL)
334 GAME(1988, spcteam, 0, techno, techno, techno_state, empty_init, ROT0, "Tecnoplay", "Space Team", MACHINE_IS_SKELETON_MECHANICAL) // needs correct layout
335