1 // license:BSD-3-Clause
2 // copyright-holders:Fabio Priuli,Acho A. Tang, R. Belmont
3 /*
4 Konami 053251
5 ------
6 Priority encoder.
7 
8 The chip has inputs for 5 layers (CI0-CI4); only 4 are used (CI1-CI4)
9 CI0-CI2 are 9(=5+4) bits inputs, CI3-CI4 8(=4+4) bits
10 
11 The input connctions change from game to game. E.g. in Simpsons,
12 CI0 = grounded (background color)
13 CI1 = sprites
14 CI2 = FIX
15 CI3 = A
16 CI4 = B
17 
18 in lgtnfght:
19 CI0 = grounded
20 CI1 = sprites
21 CI2 = FIX
22 CI3 = B
23 CI4 = A
24 
25 there are three 6 bit priority inputs, PR0-PR2
26 
27 simpsons:
28 PR0 = 111111
29 PR1 = xxxxx0 x bits coming from the sprite attributes
30 PR2 = 111111
31 
32 lgtnfght:
33 PR0 = 111111
34 PR1 = 1xx000 x bits coming from the sprite attributes
35 PR2 = 111111
36 
37 also two shadow inputs, SDI0 and SDI1 (from the sprite attributes)
38 
39 the chip outputs the 11 bit palette index, CO0-CO10, and two shadow bits.
40 
41 16 internal registers; registers are 6 bits wide (input is D0-D5)
42 For the most part, their meaning is unknown
43 All registers are write only.
44 There must be a way to enable/disable the three external PR inputs.
45 Some games initialize the priorities of the sprite & background layers,
46 others don't. It isn't clear whether the data written to those registers is
47 actually used, since the priority is taken from the external ports.
48 
49  0  priority of CI0 (higher = lower priority)
50     punkshot: unused?
51     lgtnfght: unused?
52     simpsons: 3f = 111111
53     xmen:     05 = 000101  default value
54     xmen:     09 = 001001  used to swap CI0 and CI2
55  1  priority of CI1 (higher = lower priority)
56     punkshot: 28 = 101000
57     lgtnfght: unused?
58     simpsons: unused?
59     xmen:     02 = 000010
60  2  priority of CI2 (higher = lower priority)
61     punkshot: 24 = 100100
62     lgtnfght: 24 = 100100
63     simpsons: 04 = 000100
64     xmen:     09 = 001001  default value
65     xmen:     05 = 000101  used to swap CI0 and CI2
66  3  priority of CI3 (higher = lower priority)
67     punkshot: 34 = 110100
68     lgtnfght: 34 = 110100
69     simpsons: 28 = 101000
70     xmen:     00 = 000000
71  4  priority of CI4 (higher = lower priority)
72     punkshot: 2c = 101100  default value
73     punkshot: 3c = 111100  used to swap CI3 and CI4
74     punkshot: 26 = 100110  used to swap CI1 and CI4
75     lgtnfght: 2c = 101100
76     simpsons: 18 = 011000
77     xmen:     fe = 111110
78  5  unknown
79     punkshot: unused?
80     lgtnfght: 2a = 101010
81     simpsons: unused?
82     xmen: unused?
83  6  unknown
84     punkshot: 26 = 100110
85     lgtnfght: 30 = 110000
86     simpsons: 17 = 010111
87     xmen:     03 = 000011 (written after initial tests)
88  7  unknown
89     punkshot: unused?
90     lgtnfght: unused?
91     simpsons: 27 = 100111
92     xmen:     07 = 000111 (written after initial tests)
93  8  unknown
94     punkshot: unused?
95     lgtnfght: unused?
96     simpsons: 37 = 110111
97     xmen:     ff = 111111 (written after initial tests)
98  9  ----xx CI0 palette index base (CO9-CO10)
99     --xx-- CI1 palette index base (CO9-CO10)
100     xx---- CI2 palette index base (CO9-CO10)
101 10  ---xxx CI3 palette index base (CO8-CO10)
102     xxx--- CI4 palette index base (CO8-CO10)
103 11  unknown
104     punkshot: 00 = 000000
105     lgtnfght: 00 = 000000
106     simpsons: 00 = 000000
107     xmen:     00 = 000000 (written after initial tests)
108 12  unknown
109     punkshot: 04 = 000100
110     lgtnfght: 04 = 000100
111     simpsons: 05 = 000101
112     xmen:     05 = 000101
113 13  unused
114 14  unused
115 15  unused
116 
117 
118 */
119 
120 #include "emu.h"
121 #include "k053251.h"
122 #include "konami_helper.h"
123 #include "tilemap.h"
124 
125 #define VERBOSE 0
126 #include "logmacro.h"
127 
128 
129 DEFINE_DEVICE_TYPE(K053251, k053251_device, "k053251", "K053251 Priority Encoder")
130 
k053251_device(const machine_config & mconfig,const char * tag,device_t * owner,uint32_t clock)131 k053251_device::k053251_device(const machine_config &mconfig, const char *tag, device_t *owner, uint32_t clock)
132 	: device_t(mconfig, K053251, tag, owner, clock),
133 	//m_dirty_tmap[5],
134 	//m_ram[16],
135 	m_tilemaps_set(0)
136 	//m_palette_index[5]
137 {
138 }
139 
140 //-------------------------------------------------
141 //  device_start - device-specific startup
142 //-------------------------------------------------
143 
device_start()144 void k053251_device::device_start()
145 {
146 	save_item(NAME(m_ram));
147 	save_item(NAME(m_tilemaps_set));
148 	save_item(NAME(m_dirty_tmap));
149 }
150 
151 //-------------------------------------------------
152 //  device_reset - device-specific reset
153 //-------------------------------------------------
154 
device_reset()155 void k053251_device::device_reset()
156 {
157 	int i;
158 
159 	m_tilemaps_set = 0;
160 
161 	for (i = 0; i < 0x10; i++)
162 		m_ram[i] = 0;
163 
164 	for (i = 0; i < 5; i++)
165 		m_dirty_tmap[i] = 0;
166 
167 	reset_indexes();
168 }
169 
170 //-------------------------------------------------
171 //  device_post_load - device-specific postload
172 //-------------------------------------------------
173 
device_post_load()174 void k053251_device::device_post_load()
175 {
176 	reset_indexes();
177 }
178 
179 /*****************************************************************************
180     DEVICE HANDLERS
181 *****************************************************************************/
182 
write(offs_t offset,u8 data)183 void k053251_device::write(offs_t offset, u8 data)
184 {
185 	int i, newind;
186 
187 	data &= 0x3f;
188 
189 	if (m_ram[offset] != data)
190 	{
191 		m_ram[offset] = data;
192 		if (offset == 9)
193 		{
194 			/* palette base index */
195 			for (i = 0; i < 3; i++)
196 			{
197 				newind = 32 * ((data >> 2 * i) & 0x03);
198 				if (m_palette_index[i] != newind)
199 				{
200 					m_palette_index[i] = newind;
201 					m_dirty_tmap[i] = 1;
202 				}
203 			}
204 
205 			if (!m_tilemaps_set)
206 				machine().tilemap().mark_all_dirty();
207 		}
208 		else if (offset == 10)
209 		{
210 			/* palette base index */
211 			for (i = 0; i < 2; i++)
212 			{
213 				newind = 16 * ((data >> 3 * i) & 0x07);
214 				if (m_palette_index[3 + i] != newind)
215 				{
216 					m_palette_index[3 + i] = newind;
217 					m_dirty_tmap[3 + i] = 1;
218 				}
219 			}
220 
221 			if (!m_tilemaps_set)
222 				machine().tilemap().mark_all_dirty();
223 		}
224 	}
225 }
226 
get_priority(int ci)227 int k053251_device::get_priority( int ci )
228 {
229 	return m_ram[ci];
230 }
231 
get_palette_index(int ci)232 int k053251_device::get_palette_index( int ci )
233 {
234 	return m_palette_index[ci];
235 }
236 
get_tmap_dirty(int tmap_num)237 int k053251_device::get_tmap_dirty( int tmap_num )
238 {
239 	assert(tmap_num < 5);
240 	return m_dirty_tmap[tmap_num];
241 }
242 
set_tmap_dirty(int tmap_num,int data)243 void k053251_device::set_tmap_dirty( int tmap_num, int data )
244 {
245 	assert(tmap_num < 5);
246 	m_dirty_tmap[tmap_num] = data ? 1 : 0;
247 }
248 
reset_indexes()249 void k053251_device::reset_indexes()
250 {
251 	m_palette_index[0] = 32 * ((m_ram[9] >> 0) & 0x03);
252 	m_palette_index[1] = 32 * ((m_ram[9] >> 2) & 0x03);
253 	m_palette_index[2] = 32 * ((m_ram[9] >> 4) & 0x03);
254 	m_palette_index[3] = 16 * ((m_ram[10] >> 0) & 0x07);
255 	m_palette_index[4] = 16 * ((m_ram[10] >> 3) & 0x07);
256 }
257 
258 // debug handlers
259 
read(offs_t offset)260 u8 k053251_device::read(offs_t offset)
261 {
262 	return m_ram[offset];
263 }       // PCU1
264