1 #include <stdlib.h>
2 #include <string.h>
3 #include <math.h>
4 #include "ibm.h"
5 #include "device.h"
6 #include "io.h"
7 #include "mem.h"
8 #include "pci.h"
9 #include "sound.h"
10
11 #define N 16
12
13 #define ES1371_NCoef 91
14
15 static float low_fir_es1371_coef[ES1371_NCoef];
16
17 typedef struct es1371_t
18 {
19 uint8_t pci_command, pci_serr;
20
21 uint32_t base_addr;
22
23 uint8_t int_line;
24
25 uint16_t pmcsr;
26
27 uint32_t int_ctrl;
28 uint32_t int_status;
29
30 uint32_t legacy_ctrl;
31
32 int mem_page;
33
34 uint32_t si_cr;
35
36 uint32_t sr_cir;
37 uint16_t sr_ram[128];
38
39 uint8_t uart_ctrl;
40 uint8_t uart_status;
41
42 uint16_t codec_regs[64];
43 uint32_t codec_ctrl;
44
45 struct
46 {
47 uint32_t addr, addr_latch;
48 uint16_t count, size;
49
50 uint16_t samp_ct, curr_samp_ct;
51
52 int time, latch;
53
54 uint32_t vf, ac;
55
56 int16_t buffer_l[64], buffer_r[64];
57 int buffer_pos, buffer_pos_end;
58
59 int filtered_l[32], filtered_r[32];
60 int f_pos;
61
62 int16_t out_l, out_r;
63
64 int32_t vol_l, vol_r;
65 } dac[2], adc;
66
67 int dac_latch, dac_time;
68
69 int master_vol_l, master_vol_r;
70
71 int card;
72
73 int pos;
74 int16_t buffer[MAXSOUNDBUFLEN * 2];
75 } es1371_t;
76
77 #define LEGACY_SB_ADDR (1 << 29)
78 #define LEGACY_SSCAPE_ADDR_SHIFT 27
79 #define LEGACY_CODEC_ADDR_SHIFT 25
80 #define LEGACY_FORCE_IRQ (1 << 24)
81 #define LEGACY_CAPTURE_SLAVE_DMA (1 << 23)
82 #define LEGACY_CAPTURE_SLAVE_PIC (1 << 22)
83 #define LEGACY_CAPTURE_MASTER_DMA (1 << 21)
84 #define LEGACY_CAPTURE_MASTER_PIC (1 << 20)
85 #define LEGACY_CAPTURE_ADLIB (1 << 19)
86 #define LEGACY_CAPTURE_SB (1 << 18)
87 #define LEGACY_CAPTURE_CODEC (1 << 17)
88 #define LEGACY_CAPTURE_SSCAPE (1 << 16)
89 #define LEGACY_EVENT_SSCAPE (0 << 8)
90 #define LEGACY_EVENT_CODEC (1 << 8)
91 #define LEGACY_EVENT_SB (2 << 8)
92 #define LEGACY_EVENT_ADLIB (3 << 8)
93 #define LEGACY_EVENT_MASTER_PIC (4 << 8)
94 #define LEGACY_EVENT_MASTER_DMA (5 << 8)
95 #define LEGACY_EVENT_SLAVE_PIC (6 << 8)
96 #define LEGACY_EVENT_SLAVE_DMA (7 << 8)
97 #define LEGACY_EVENT_MASK (7 << 8)
98 #define LEGACY_EVENT_ADDR_SHIFT 3
99 #define LEGACY_EVENT_ADDR_MASK (0x1f << 3)
100 #define LEGACY_EVENT_TYPE_RW (1 << 2)
101 #define LEGACY_INT (1 << 0)
102
103 #define SRC_RAM_WE (1 << 24)
104
105 #define CODEC_READ (1 << 23)
106 #define CODEC_READY (1 << 31)
107
108 #define INT_DAC1_EN (1 << 6)
109 #define INT_DAC2_EN (1 << 5)
110
111 #define SI_P2_INTR_EN (1 << 9)
112 #define SI_P1_INTR_EN (1 << 8)
113
114 #define INT_STATUS_INTR (1 << 31)
115 #define INT_STATUS_DAC1 (1 << 2)
116 #define INT_STATUS_DAC2 (1 << 1)
117
118 #define FORMAT_MONO_8 0
119 #define FORMAT_STEREO_8 1
120 #define FORMAT_MONO_16 2
121 #define FORMAT_STEREO_16 3
122
123 const int32_t codec_attn[]=
124 {
125 25,32,41,51,65,82,103,130,164,206,260,327,412,519,653,
126 822,1036,1304,1641,2067,2602,3276,4125,5192,6537,8230,10362,13044,
127 16422,20674,26027,32767
128 };
129
130 static void es1371_fetch(es1371_t *es1371, int dac_nr);
131 static void update_legacy(es1371_t *es1371);
132
es1371_update_irqs(es1371_t * es1371)133 static void es1371_update_irqs(es1371_t *es1371)
134 {
135 int irq = 0;
136
137 if ((es1371->int_status & INT_STATUS_DAC1) && (es1371->si_cr & SI_P1_INTR_EN))
138 irq = 1;
139 if ((es1371->int_status & INT_STATUS_DAC2) && (es1371->si_cr & SI_P2_INTR_EN))
140 irq = 1;
141
142 if (irq)
143 es1371->int_status |= INT_STATUS_INTR;
144 else
145 es1371->int_status &= ~INT_STATUS_INTR;
146
147 if (es1371->legacy_ctrl & LEGACY_FORCE_IRQ)
148 irq = 1;
149
150 if (irq)
151 {
152 pci_set_irq(es1371->card, PCI_INTA);
153 // pclog("Raise IRQ\n");
154 }
155 else
156 {
157 pci_clear_irq(es1371->card, PCI_INTA);
158 // pclog("Drop IRQ\n");
159 }
160 }
161
es1371_inb(uint16_t port,void * p)162 static uint8_t es1371_inb(uint16_t port, void *p)
163 {
164 es1371_t *es1371 = (es1371_t *)p;
165 uint8_t ret = 0;
166
167 switch (port & 0x3f)
168 {
169 case 0x00:
170 ret = es1371->int_ctrl & 0xff;
171 break;
172 case 0x01:
173 ret = (es1371->int_ctrl >> 8) & 0xff;
174 break;
175 case 0x02:
176 ret = (es1371->int_ctrl >> 16) & 0xff;
177 break;
178 case 0x03:
179 ret = (es1371->int_ctrl >> 24) & 0xff;
180 break;
181
182 case 0x04:
183 ret = es1371->int_status & 0xff;
184 break;
185 case 0x05:
186 ret = (es1371->int_status >> 8) & 0xff;
187 break;
188 case 0x06:
189 ret = (es1371->int_status >> 16) & 0xff;
190 break;
191 case 0x07:
192 ret = (es1371->int_status >> 24) & 0xff;
193 break;
194
195
196 case 0x09:
197 ret = es1371->uart_status;
198 break;
199
200 case 0x0c:
201 ret = es1371->mem_page;
202 break;
203
204 case 0x1a:
205 ret = es1371->legacy_ctrl >> 16;
206 break;
207 case 0x1b:
208 ret = es1371->legacy_ctrl >> 24;
209 break;
210
211 case 0x20:
212 ret = es1371->si_cr & 0xff;
213 break;
214 case 0x21:
215 ret = es1371->si_cr >> 8;
216 break;
217 case 0x22:
218 ret = (es1371->si_cr >> 16) | 0x80;
219 break;
220 case 0x23:
221 ret = 0xff;
222 break;
223
224 default:
225 pclog("Bad es1371_inb: port=%04x\n", port);
226 }
227
228 // pclog("es1371_inb: port=%04x ret=%02x\n", port, ret);
229 // output = 3;
230 return ret;
231 }
es1371_inw(uint16_t port,void * p)232 static uint16_t es1371_inw(uint16_t port, void *p)
233 {
234 es1371_t *es1371 = (es1371_t *)p;
235 uint16_t ret = 0;
236
237 switch (port & 0x3e)
238 {
239 case 0x00:
240 ret = es1371->int_ctrl & 0xffff;
241 break;
242 case 0x02:
243 ret = (es1371->int_ctrl >> 16) & 0xffff;
244 break;
245
246 case 0x18:
247 ret = es1371->legacy_ctrl & 0xffff;
248 // pclog("Read legacy ctrl %04x\n", ret);
249 break;
250
251 case 0x26:
252 ret = es1371->dac[0].curr_samp_ct;
253 break;
254
255 case 0x2a:
256 ret = es1371->dac[1].curr_samp_ct;
257 break;
258
259 case 0x36:
260 switch (es1371->mem_page)
261 {
262 case 0xc:
263 ret = es1371->dac[0].count;
264 break;
265
266 default:
267 pclog("Bad es1371_inw: mem_page=%x port=%04x\n", es1371->mem_page, port);
268 }
269 break;
270
271 case 0x3e:
272 switch (es1371->mem_page)
273 {
274 case 0xc:
275 ret = es1371->dac[1].count;
276 break;
277
278 default:
279 pclog("Bad es1371_inw: mem_page=%x port=%04x\n", es1371->mem_page, port);
280 }
281 break;
282
283 default:
284 pclog("Bad es1371_inw: port=%04x\n", port);
285 }
286
287 // pclog("es1371_inw: port=%04x ret=%04x %04x:%08x\n", port, ret, CS,cpu_state.pc);
288 return ret;
289 }
es1371_inl(uint16_t port,void * p)290 static uint32_t es1371_inl(uint16_t port, void *p)
291 {
292 es1371_t *es1371 = (es1371_t *)p;
293 uint32_t ret = 0;
294
295 switch (port & 0x3c)
296 {
297 case 0x00:
298 ret = es1371->int_ctrl;
299 break;
300 case 0x04:
301 ret = es1371->int_status;
302 break;
303
304 case 0x10:
305 ret = es1371->sr_cir & ~0xffff;
306 ret |= es1371->sr_ram[es1371->sr_cir >> 25];
307 break;
308
309 case 0x14:
310 ret = es1371->codec_ctrl & 0x00ff0000;
311 ret |= es1371->codec_regs[(es1371->codec_ctrl >> 16) & 0x3f];
312 ret |= CODEC_READY;
313 break;
314
315 case 0x34:
316 switch (es1371->mem_page)
317 {
318 case 0xc:
319 ret = es1371->dac[0].size | (es1371->dac[0].count << 16);
320 break;
321
322 case 0xd:
323 ret = es1371->adc.size | (es1371->adc.count << 16);
324 break;
325
326 default:
327 pclog("Bad es1371_inl: mem_page=%x port=%04x\n", es1371->mem_page, port);
328 }
329 break;
330
331 case 0x3c:
332 switch (es1371->mem_page)
333 {
334 case 0xc:
335 ret = es1371->dac[1].size | (es1371->dac[1].count << 16);
336 break;
337
338 default:
339 pclog("Bad es1371_inl: mem_page=%x port=%04x\n", es1371->mem_page, port);
340 }
341 break;
342
343 default:
344 pclog("Bad es1371_inl: port=%04x\n", port);
345 }
346
347 // pclog("es1371_inl: port=%04x ret=%08x %08x\n", port, ret, cpu_state.pc);
348 return ret;
349 }
350
es1371_outb(uint16_t port,uint8_t val,void * p)351 static void es1371_outb(uint16_t port, uint8_t val, void *p)
352 {
353 es1371_t *es1371 = (es1371_t *)p;
354
355 // pclog("es1371_outb: port=%04x val=%02x %04x:%08x\n", port, val, cs, cpu_state.pc);
356 switch (port & 0x3f)
357 {
358 case 0x00:
359 if (!(es1371->int_ctrl & INT_DAC1_EN) && (val & INT_DAC1_EN))
360 {
361 es1371->dac[0].addr = es1371->dac[0].addr_latch;
362 es1371->dac[0].buffer_pos = 0;
363 es1371->dac[0].buffer_pos_end = 0;
364 es1371_fetch(es1371, 0);
365 }
366 if (!(es1371->int_ctrl & INT_DAC2_EN) && (val & INT_DAC2_EN))
367 {
368 es1371->dac[1].addr = es1371->dac[1].addr_latch;
369 es1371->dac[1].buffer_pos = 0;
370 es1371->dac[1].buffer_pos_end = 0;
371 es1371_fetch(es1371, 1);
372 }
373 es1371->int_ctrl = (es1371->int_ctrl & 0xffffff00) | val;
374 break;
375 case 0x01:
376 es1371->int_ctrl = (es1371->int_ctrl & 0xffff00ff) | (val << 8);
377 break;
378 case 0x02:
379 es1371->int_ctrl = (es1371->int_ctrl & 0xff00ffff) | (val << 16);
380 break;
381 case 0x03:
382 es1371->int_ctrl = (es1371->int_ctrl & 0x00ffffff) | (val << 24);
383 break;
384
385 case 0x09:
386 es1371->uart_ctrl = val;
387 break;
388
389 case 0x0c:
390 es1371->mem_page = val & 0xf;
391 break;
392
393 case 0x18:
394 es1371->legacy_ctrl |= LEGACY_INT;
395 nmi = 0;
396 break;
397 case 0x1a:
398 es1371->legacy_ctrl = (es1371->legacy_ctrl & 0xff00ffff) | (val << 16);
399 update_legacy(es1371);
400 break;
401 case 0x1b:
402 es1371->legacy_ctrl = (es1371->legacy_ctrl & 0x00ffffff) | (val << 24);
403 es1371_update_irqs(es1371);
404 // output = 3;
405 update_legacy(es1371);
406 break;
407
408 case 0x20:
409 es1371->si_cr = (es1371->si_cr & 0xffff00) | val;
410 break;
411 case 0x21:
412 es1371->si_cr = (es1371->si_cr & 0xff00ff) | (val << 8);
413 if (!(es1371->si_cr & SI_P1_INTR_EN))
414 es1371->int_status &= ~INT_STATUS_DAC1;
415 if (!(es1371->si_cr & SI_P2_INTR_EN))
416 es1371->int_status &= ~INT_STATUS_DAC2;
417 es1371_update_irqs(es1371);
418 break;
419 case 0x22:
420 es1371->si_cr = (es1371->si_cr & 0x00ffff) | (val << 16);
421 break;
422
423 default:
424 pclog("Bad es1371_outb: port=%04x val=%02x\n", port, val);
425 }
426 }
es1371_outw(uint16_t port,uint16_t val,void * p)427 static void es1371_outw(uint16_t port, uint16_t val, void *p)
428 {
429 es1371_t *es1371 = (es1371_t *)p;
430
431 // pclog("es1371_outw: port=%04x val=%04x\n", port, val);
432 switch (port & 0x3f)
433 {
434 case 0x0c:
435 es1371->mem_page = val & 0xf;
436 break;
437
438 case 0x24:
439 es1371->dac[0].samp_ct = val;
440 break;
441
442 case 0x28:
443 es1371->dac[1].samp_ct = val;
444 break;
445
446 default:
447 pclog("Bad es1371_outw: port=%04x val=%04x\n", port, val);
448 }
449 }
es1371_outl(uint16_t port,uint32_t val,void * p)450 static void es1371_outl(uint16_t port, uint32_t val, void *p)
451 {
452 es1371_t *es1371 = (es1371_t *)p;
453
454 // pclog("es1371_outl: port=%04x val=%08x %04x:%08x\n", port, val, CS, cpu_state.pc);
455 switch (port & 0x3f)
456 {
457 case 0x04:
458 break;
459
460 case 0x0c:
461 es1371->mem_page = val & 0xf;
462 break;
463
464 case 0x10:
465 es1371->sr_cir = val;
466 if (es1371->sr_cir & SRC_RAM_WE)
467 {
468 // pclog("Write SR RAM %02x %04x\n", es1371->sr_cir >> 25, val & 0xffff);
469 es1371->sr_ram[es1371->sr_cir >> 25] = val & 0xffff;
470 switch (es1371->sr_cir >> 25)
471 {
472 case 0x71:
473 es1371->dac[0].vf = (es1371->dac[0].vf & ~0x1f8000) | ((val & 0xfc00) << 5);
474 es1371->dac[0].ac = (es1371->dac[0].ac & ~0x7f8000) | ((val & 0x00ff) << 15);
475 es1371->dac[0].f_pos = 0;
476 break;
477 case 0x72:
478 es1371->dac[0].ac = (es1371->dac[0].ac & ~0x7fff) | (val & 0x7fff);
479 break;
480 case 0x73:
481 es1371->dac[0].vf = (es1371->dac[0].vf & ~0x7fff) | (val & 0x7fff);
482 break;
483
484 case 0x75:
485 es1371->dac[1].vf = (es1371->dac[1].vf & ~0x1f8000) | ((val & 0xfc00) << 5);
486 es1371->dac[1].ac = (es1371->dac[1].ac & ~0x7f8000) | ((val & 0x00ff) << 15);
487 es1371->dac[1].f_pos = 0;
488 break;
489 case 0x76:
490 es1371->dac[1].ac = (es1371->dac[1].ac & ~0x7fff) | (val & 0x7fff);
491 break;
492 case 0x77:
493 es1371->dac[1].vf = (es1371->dac[1].vf & ~0x7fff) | (val & 0x7fff);
494 break;
495
496 case 0x7c:
497 es1371->dac[0].vol_l = (int32_t)(int16_t)(val & 0xffff);
498 break;
499 case 0x7d:
500 es1371->dac[0].vol_r = (int32_t)(int16_t)(val & 0xffff);
501 break;
502 case 0x7e:
503 es1371->dac[1].vol_l = (int32_t)(int16_t)(val & 0xffff);
504 break;
505 case 0x7f:
506 es1371->dac[1].vol_r = (int32_t)(int16_t)(val & 0xffff);
507 break;
508 }
509 }
510 break;
511
512 case 0x14:
513 es1371->codec_ctrl = val;
514 if (!(val & CODEC_READ))
515 {
516 // pclog("Write codec %02x %04x\n", (val >> 16) & 0x3f, val & 0xffff);
517 es1371->codec_regs[(val >> 16) & 0x3f] = val & 0xffff;
518 switch ((val >> 16) & 0x3f)
519 {
520 case 0x02: /*Master volume*/
521 if (val & 0x8000)
522 es1371->master_vol_l = es1371->master_vol_r = 0;
523 else
524 {
525 if (val & 0x2000)
526 es1371->master_vol_l = codec_attn[0];
527 else
528 es1371->master_vol_l = codec_attn[0x1f - ((val >> 8) & 0x1f)];
529 if (val & 0x20)
530 es1371->master_vol_r = codec_attn[0];
531 else
532 es1371->master_vol_r = codec_attn[0x1f - (val & 0x1f)];
533 }
534 break;
535 case 0x12: /*CD volume*/
536 if (val & 0x8000)
537 sound_set_cd_volume(0, 0);
538 else
539 sound_set_cd_volume(codec_attn[0x1f - ((val >> 8) & 0x1f)] * 2, codec_attn[0x1f - (val & 0x1f)] * 2);
540 break;
541 }
542 }
543 break;
544
545 case 0x24:
546 es1371->dac[0].samp_ct = val & 0xffff;
547 break;
548
549 case 0x28:
550 es1371->dac[1].samp_ct = val & 0xffff;
551 break;
552
553 case 0x30:
554 switch (es1371->mem_page)
555 {
556 case 0x0: case 0x1: case 0x2: case 0x3:
557 case 0x4: case 0x5: case 0x6: case 0x7:
558 case 0x8: case 0x9: case 0xa: case 0xb:
559 break;
560
561 case 0xc:
562 es1371->dac[0].addr_latch = val;
563 // pclog("DAC1 addr %08x\n", val);
564 break;
565
566 default:
567 pclog("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val);
568 }
569 break;
570 case 0x34:
571 switch (es1371->mem_page)
572 {
573 case 0x0: case 0x1: case 0x2: case 0x3:
574 case 0x4: case 0x5: case 0x6: case 0x7:
575 case 0x8: case 0x9: case 0xa: case 0xb:
576 break;
577
578 case 0xc:
579 es1371->dac[0].size = val & 0xffff;
580 es1371->dac[0].count = val >> 16;
581 if (es1371->dac[0].count)
582 es1371->dac[0].count -= 4;
583 break;
584
585 case 0xd:
586 es1371->adc.size = val & 0xffff;
587 es1371->adc.count = val >> 16;
588 break;
589
590 default:
591 pclog("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val);
592 }
593 break;
594 case 0x38:
595 switch (es1371->mem_page)
596 {
597 case 0x0: case 0x1: case 0x2: case 0x3:
598 case 0x4: case 0x5: case 0x6: case 0x7:
599 case 0x8: case 0x9: case 0xa: case 0xb:
600 break;
601
602 case 0xc:
603 es1371->dac[1].addr_latch = val;
604 break;
605
606 case 0xd:
607 break;
608
609 default:
610 pclog("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val);
611 }
612 break;
613 case 0x3c:
614 switch (es1371->mem_page)
615 {
616 case 0x0: case 0x1: case 0x2: case 0x3:
617 case 0x4: case 0x5: case 0x6: case 0x7:
618 case 0x8: case 0x9: case 0xa: case 0xb:
619 break;
620
621 case 0xc:
622 es1371->dac[1].size = val & 0xffff;
623 es1371->dac[1].count = val >> 16;
624 break;
625
626 default:
627 pclog("Bad es1371_outl: mem_page=%x port=%04x val=%08x\n", es1371->mem_page, port, val);
628 }
629 break;
630
631 default:
632 pclog("Bad es1371_outl: port=%04x val=%08x\n", port, val);
633 }
634 }
635
capture_event(es1371_t * es1371,int type,int rw,uint16_t port)636 static void capture_event(es1371_t *es1371, int type, int rw, uint16_t port)
637 {
638 es1371->legacy_ctrl &= ~(LEGACY_EVENT_MASK | LEGACY_EVENT_ADDR_MASK);
639 es1371->legacy_ctrl |= type;
640 if (rw)
641 es1371->legacy_ctrl |= LEGACY_EVENT_TYPE_RW;
642 else
643 es1371->legacy_ctrl &= ~LEGACY_EVENT_TYPE_RW;
644 es1371->legacy_ctrl |= ((port << LEGACY_EVENT_ADDR_SHIFT) & LEGACY_EVENT_ADDR_MASK);
645 es1371->legacy_ctrl &= ~LEGACY_INT;
646 nmi = 1;
647 // pclog("Event! %s %04x\n", rw ? "write" : "read", port);
648 }
649
capture_write_sscape(uint16_t port,uint8_t val,void * p)650 static void capture_write_sscape(uint16_t port, uint8_t val, void *p)
651 {
652 capture_event(p, LEGACY_EVENT_SSCAPE, 1, port);
653 }
capture_write_codec(uint16_t port,uint8_t val,void * p)654 static void capture_write_codec(uint16_t port, uint8_t val, void *p)
655 {
656 capture_event(p, LEGACY_EVENT_CODEC, 1, port);
657 }
capture_write_sb(uint16_t port,uint8_t val,void * p)658 static void capture_write_sb(uint16_t port, uint8_t val, void *p)
659 {
660 capture_event(p, LEGACY_EVENT_SB, 1, port);
661 }
capture_write_adlib(uint16_t port,uint8_t val,void * p)662 static void capture_write_adlib(uint16_t port, uint8_t val, void *p)
663 {
664 capture_event(p, LEGACY_EVENT_ADLIB, 1, port);
665 }
capture_write_master_pic(uint16_t port,uint8_t val,void * p)666 static void capture_write_master_pic(uint16_t port, uint8_t val, void *p)
667 {
668 capture_event(p, LEGACY_EVENT_MASTER_PIC, 1, port);
669 }
capture_write_master_dma(uint16_t port,uint8_t val,void * p)670 static void capture_write_master_dma(uint16_t port, uint8_t val, void *p)
671 {
672 capture_event(p, LEGACY_EVENT_MASTER_DMA, 1, port);
673 }
capture_write_slave_pic(uint16_t port,uint8_t val,void * p)674 static void capture_write_slave_pic(uint16_t port, uint8_t val, void *p)
675 {
676 capture_event(p, LEGACY_EVENT_SLAVE_PIC, 1, port);
677 }
capture_write_slave_dma(uint16_t port,uint8_t val,void * p)678 static void capture_write_slave_dma(uint16_t port, uint8_t val, void *p)
679 {
680 capture_event(p, LEGACY_EVENT_SLAVE_DMA, 1, port);
681 }
682
capture_read_sscape(uint16_t port,void * p)683 static uint8_t capture_read_sscape(uint16_t port, void *p)
684 {
685 capture_event(p, LEGACY_EVENT_SSCAPE, 0, port);
686 return 0xff;
687 }
capture_read_codec(uint16_t port,void * p)688 static uint8_t capture_read_codec(uint16_t port, void *p)
689 {
690 capture_event(p, LEGACY_EVENT_CODEC, 0, port);
691 return 0xff;
692 }
capture_read_sb(uint16_t port,void * p)693 static uint8_t capture_read_sb(uint16_t port, void *p)
694 {
695 capture_event(p, LEGACY_EVENT_SB, 0, port);
696 return 0xff;
697 }
capture_read_adlib(uint16_t port,void * p)698 static uint8_t capture_read_adlib(uint16_t port, void *p)
699 {
700 capture_event(p, LEGACY_EVENT_ADLIB, 0, port);
701 return 0xff;
702 }
capture_read_master_pic(uint16_t port,void * p)703 static uint8_t capture_read_master_pic(uint16_t port, void *p)
704 {
705 capture_event(p, LEGACY_EVENT_MASTER_PIC, 0, port);
706 return 0xff;
707 }
capture_read_master_dma(uint16_t port,void * p)708 static uint8_t capture_read_master_dma(uint16_t port, void *p)
709 {
710 capture_event(p, LEGACY_EVENT_MASTER_DMA, 0, port);
711 return 0xff;
712 }
capture_read_slave_pic(uint16_t port,void * p)713 static uint8_t capture_read_slave_pic(uint16_t port, void *p)
714 {
715 capture_event(p, LEGACY_EVENT_SLAVE_PIC, 0, port);
716 return 0xff;
717 }
capture_read_slave_dma(uint16_t port,void * p)718 static uint8_t capture_read_slave_dma(uint16_t port, void *p)
719 {
720 capture_event(p, LEGACY_EVENT_SLAVE_DMA, 0, port);
721 return 0xff;
722 }
723
update_legacy(es1371_t * es1371)724 static void update_legacy(es1371_t *es1371)
725 {
726 io_removehandler(0x0320, 0x0008, capture_read_sscape,NULL,NULL, capture_write_sscape,NULL,NULL, es1371);
727 io_removehandler(0x0330, 0x0008, capture_read_sscape,NULL,NULL, capture_write_sscape,NULL,NULL, es1371);
728 io_removehandler(0x0340, 0x0008, capture_read_sscape,NULL,NULL, capture_write_sscape,NULL,NULL, es1371);
729 io_removehandler(0x0350, 0x0008, capture_read_sscape,NULL,NULL, capture_write_sscape,NULL,NULL, es1371);
730
731 io_removehandler(0x5300, 0x0080, capture_read_codec,NULL,NULL, capture_write_codec,NULL,NULL, es1371);
732 io_removehandler(0xe800, 0x0080, capture_read_codec,NULL,NULL, capture_write_codec,NULL,NULL, es1371);
733 io_removehandler(0xf400, 0x0080, capture_read_codec,NULL,NULL, capture_write_codec,NULL,NULL, es1371);
734
735 io_removehandler(0x0220, 0x0010, capture_read_sb,NULL,NULL, capture_write_sb,NULL,NULL, es1371);
736 io_removehandler(0x0240, 0x0010, capture_read_sb,NULL,NULL, capture_write_sb,NULL,NULL, es1371);
737
738 io_removehandler(0x0388, 0x0004, capture_read_adlib,NULL,NULL, capture_write_adlib,NULL,NULL, es1371);
739
740 io_removehandler(0x0020, 0x0002, capture_read_master_pic,NULL,NULL, capture_write_master_pic,NULL,NULL, es1371);
741 io_removehandler(0x0000, 0x0010, capture_read_master_dma,NULL,NULL, capture_write_master_dma,NULL,NULL, es1371);
742 io_removehandler(0x00a0, 0x0002, capture_read_slave_pic,NULL,NULL, capture_write_slave_pic,NULL,NULL, es1371);
743 io_removehandler(0x00c0, 0x0020, capture_read_slave_dma,NULL,NULL, capture_write_slave_dma,NULL,NULL, es1371);
744
745 if (es1371->legacy_ctrl & LEGACY_CAPTURE_SSCAPE)
746 {
747 switch ((es1371->legacy_ctrl >> LEGACY_SSCAPE_ADDR_SHIFT) & 3)
748 {
749 case 0: io_sethandler(0x0320, 0x0008, capture_read_sscape,NULL,NULL, capture_write_sscape,NULL,NULL, es1371); break;
750 case 1: io_sethandler(0x0330, 0x0008, capture_read_sscape,NULL,NULL, capture_write_sscape,NULL,NULL, es1371); break;
751 case 2: io_sethandler(0x0340, 0x0008, capture_read_sscape,NULL,NULL, capture_write_sscape,NULL,NULL, es1371); break;
752 case 3: io_sethandler(0x0350, 0x0008, capture_read_sscape,NULL,NULL, capture_write_sscape,NULL,NULL, es1371); break;
753 }
754 }
755 if (es1371->legacy_ctrl & LEGACY_CAPTURE_CODEC)
756 {
757 switch ((es1371->legacy_ctrl >> LEGACY_CODEC_ADDR_SHIFT) & 3)
758 {
759 case 0: io_sethandler(0x5300, 0x0080, capture_read_codec,NULL,NULL, capture_write_codec,NULL,NULL, es1371); break;
760 case 2: io_sethandler(0xe800, 0x0080, capture_read_codec,NULL,NULL, capture_write_codec,NULL,NULL, es1371); break;
761 case 3: io_sethandler(0xf400, 0x0080, capture_read_codec,NULL,NULL, capture_write_codec,NULL,NULL, es1371); break;
762 }
763 }
764 if (es1371->legacy_ctrl & LEGACY_CAPTURE_SB)
765 {
766 if (!(es1371->legacy_ctrl & LEGACY_SB_ADDR))
767 io_sethandler(0x0220, 0x0010, capture_read_sb,NULL,NULL, capture_write_sb,NULL,NULL, es1371);
768 else
769 io_sethandler(0x0240, 0x0010, capture_read_sb,NULL,NULL, capture_write_sb,NULL,NULL, es1371);
770 }
771 if (es1371->legacy_ctrl & LEGACY_CAPTURE_ADLIB)
772 io_sethandler(0x0388, 0x0004, capture_read_adlib,NULL,NULL, capture_write_adlib,NULL,NULL, es1371);
773 if (es1371->legacy_ctrl & LEGACY_CAPTURE_MASTER_PIC)
774 io_sethandler(0x0020, 0x0002, capture_read_master_pic,NULL,NULL, capture_write_master_pic,NULL,NULL, es1371);
775 if (es1371->legacy_ctrl & LEGACY_CAPTURE_MASTER_DMA)
776 io_sethandler(0x0000, 0x0010, capture_read_master_dma,NULL,NULL, capture_write_master_dma,NULL,NULL, es1371);
777 if (es1371->legacy_ctrl & LEGACY_CAPTURE_SLAVE_PIC)
778 io_sethandler(0x00a0, 0x0002, capture_read_slave_pic,NULL,NULL, capture_write_slave_pic,NULL,NULL, es1371);
779 if (es1371->legacy_ctrl & LEGACY_CAPTURE_SLAVE_DMA)
780 io_sethandler(0x00c0, 0x0020, capture_read_slave_dma,NULL,NULL, capture_write_slave_dma,NULL,NULL, es1371);
781 }
782
783
es1371_pci_read(int func,int addr,void * p)784 static uint8_t es1371_pci_read(int func, int addr, void *p)
785 {
786 es1371_t *es1371 = (es1371_t *)p;
787
788 if (func)
789 return 0;
790
791 //pclog("ES1371 PCI read %08X PC=%08x\n", addr, cpu_state.pc);
792
793 switch (addr)
794 {
795 case 0x00: return 0x74; /*Ensoniq*/
796 case 0x01: return 0x12;
797
798 case 0x02: return 0x71; /*ES1371*/
799 case 0x03: return 0x13;
800
801 case 0x04: return es1371->pci_command;
802 case 0x05: return es1371->pci_serr;
803
804 case 0x06: return 0x10; /*Supports ACPI*/
805 case 0x07: return 0;
806
807 case 0x08: return 2; /*Revision ID*/
808 case 0x09: return 0x00; /*Multimedia audio device*/
809 case 0x0a: return 0x01;
810 case 0x0b: return 0x04;
811
812 case 0x10: return 0x01 | (es1371->base_addr & 0xc0); /*memBaseAddr*/
813 case 0x11: return es1371->base_addr >> 8;
814 case 0x12: return es1371->base_addr >> 16;
815 case 0x13: return es1371->base_addr >> 24;
816
817 case 0x2c: return 0x74; /*Subsystem vendor ID*/
818 case 0x2d: return 0x12;
819 case 0x2e: return 0x71;
820 case 0x2f: return 0x13;
821
822 case 0x34: return 0xdc; /*Capabilites pointer*/
823
824 case 0x3c: return es1371->int_line;
825 case 0x3d: return 0x01; /*INTA*/
826
827 case 0x3e: return 0xc; /*Minimum grant*/
828 case 0x3f: return 0x80; /*Maximum latency*/
829
830 case 0xdc: return 0x01; /*Capabilities identifier*/
831 case 0xdd: return 0x00; /*Next item pointer*/
832 case 0xde: return 0x31; /*Power management capabilities*/
833 case 0xdf: return 0x6c;
834
835 case 0xe0: return es1371->pmcsr & 0xff;
836 case 0xe1: return es1371->pmcsr >> 8;
837 }
838 return 0;
839 }
840
es1371_pci_write(int func,int addr,uint8_t val,void * p)841 static void es1371_pci_write(int func, int addr, uint8_t val, void *p)
842 {
843 es1371_t *es1371 = (es1371_t *)p;
844
845 if (func)
846 return;
847
848 // pclog("ES1371 PCI write %04X %02X PC=%08x\n", addr, val, cpu_state.pc);
849
850 switch (addr)
851 {
852 case 0x04:
853 if (es1371->pci_command & PCI_COMMAND_IO)
854 io_removehandler(es1371->base_addr, 0x0040, es1371_inb, es1371_inw, es1371_inl, es1371_outb, es1371_outw, es1371_outl, es1371);
855 es1371->pci_command = val & 0x05;
856 if (es1371->pci_command & PCI_COMMAND_IO)
857 io_sethandler(es1371->base_addr, 0x0040, es1371_inb, es1371_inw, es1371_inl, es1371_outb, es1371_outw, es1371_outl, es1371);
858 break;
859 case 0x05:
860 es1371->pci_serr = val & 1;
861 break;
862
863 case 0x10:
864 if (es1371->pci_command & PCI_COMMAND_IO)
865 io_removehandler(es1371->base_addr, 0x0040, es1371_inb, es1371_inw, es1371_inl, es1371_outb, es1371_outw, es1371_outl, es1371);
866 es1371->base_addr = (es1371->base_addr & 0xffffff00) | (val & 0xc0);
867 if (es1371->pci_command & PCI_COMMAND_IO)
868 io_sethandler(es1371->base_addr, 0x0040, es1371_inb, es1371_inw, es1371_inl, es1371_outb, es1371_outw, es1371_outl, es1371);
869 break;
870 case 0x11:
871 if (es1371->pci_command & PCI_COMMAND_IO)
872 io_removehandler(es1371->base_addr, 0x0040, es1371_inb, es1371_inw, es1371_inl, es1371_outb, es1371_outw, es1371_outl, es1371);
873 es1371->base_addr = (es1371->base_addr & 0xffff00c0) | (val << 8);
874 if (es1371->pci_command & PCI_COMMAND_IO)
875 io_sethandler(es1371->base_addr, 0x0040, es1371_inb, es1371_inw, es1371_inl, es1371_outb, es1371_outw, es1371_outl, es1371);
876 break;
877 case 0x12:
878 es1371->base_addr = (es1371->base_addr & 0xff00ffc0) | (val << 16);
879 break;
880 case 0x13:
881 es1371->base_addr = (es1371->base_addr & 0x00ffffc0) | (val << 24);
882 break;
883
884 case 0x3c:
885 es1371->int_line = val;
886 break;
887
888 case 0xe0:
889 es1371->pmcsr = (es1371->pmcsr & 0xff00) | (val & 0x03);
890 break;
891 case 0xe1:
892 es1371->pmcsr = (es1371->pmcsr & 0x00ff) | ((val & 0x01) << 8);
893 break;
894 }
895 // pclog("es1371->base_addr %08x\n", es1371->base_addr);
896 }
897
es1371_fetch(es1371_t * es1371,int dac_nr)898 static void es1371_fetch(es1371_t *es1371, int dac_nr)
899 {
900 int format = dac_nr ? ((es1371->si_cr >> 2) & 3) : (es1371->si_cr & 3);
901 int pos = es1371->dac[dac_nr].buffer_pos & 63;
902 int c;
903
904 //pclog("Fetch format=%i %08x %08x %08x %08x %08x\n", format, es1371->dac[dac_nr].count, es1371->dac[dac_nr].size, es1371->dac[dac_nr].curr_samp_ct,es1371->dac[dac_nr].samp_ct, es1371->dac[dac_nr].addr);
905 switch (format)
906 {
907 case FORMAT_MONO_8:
908 for (c = 0; c < 32; c += 4)
909 {
910 es1371->dac[dac_nr].buffer_l[(pos+c) & 63] = es1371->dac[dac_nr].buffer_r[(pos+c) & 63] = (mem_readb_phys(es1371->dac[dac_nr].addr) ^ 0x80) << 8;
911 es1371->dac[dac_nr].buffer_l[(pos+c+1) & 63] = es1371->dac[dac_nr].buffer_r[(pos+c+1) & 63] = (mem_readb_phys(es1371->dac[dac_nr].addr+1) ^ 0x80) << 8;
912 es1371->dac[dac_nr].buffer_l[(pos+c+2) & 63] = es1371->dac[dac_nr].buffer_r[(pos+c+2) & 63] = (mem_readb_phys(es1371->dac[dac_nr].addr+2) ^ 0x80) << 8;
913 es1371->dac[dac_nr].buffer_l[(pos+c+3) & 63] = es1371->dac[dac_nr].buffer_r[(pos+c+3) & 63] = (mem_readb_phys(es1371->dac[dac_nr].addr+3) ^ 0x80) << 8;
914 es1371->dac[dac_nr].addr += 4;
915
916 es1371->dac[dac_nr].buffer_pos_end += 4;
917 es1371->dac[dac_nr].count++;
918 if (es1371->dac[dac_nr].count > es1371->dac[dac_nr].size)
919 {
920 es1371->dac[dac_nr].count = 0;
921 es1371->dac[dac_nr].addr = es1371->dac[dac_nr].addr_latch;
922 break;
923 }
924 }
925 break;
926 case FORMAT_STEREO_8:
927 for (c = 0; c < 16; c += 2)
928 {
929 es1371->dac[dac_nr].buffer_l[(pos+c) & 63] = (mem_readb_phys(es1371->dac[dac_nr].addr) ^ 0x80) << 8;
930 es1371->dac[dac_nr].buffer_r[(pos+c) & 63] = (mem_readb_phys(es1371->dac[dac_nr].addr + 1) ^ 0x80) << 8;
931 es1371->dac[dac_nr].buffer_l[(pos+c+1) & 63] = (mem_readb_phys(es1371->dac[dac_nr].addr + 2) ^ 0x80) << 8;
932 es1371->dac[dac_nr].buffer_r[(pos+c+1) & 63] = (mem_readb_phys(es1371->dac[dac_nr].addr + 3) ^ 0x80) << 8;
933 es1371->dac[dac_nr].addr += 4;
934
935 es1371->dac[dac_nr].buffer_pos_end += 2;
936 es1371->dac[dac_nr].count++;
937 if (es1371->dac[dac_nr].count > es1371->dac[dac_nr].size)
938 {
939 es1371->dac[dac_nr].count = 0;
940 es1371->dac[dac_nr].addr = es1371->dac[dac_nr].addr_latch;
941 break;
942 }
943 }
944 break;
945 case FORMAT_MONO_16:
946 for (c = 0; c < 16; c += 2)
947 {
948 es1371->dac[dac_nr].buffer_l[(pos+c) & 63] = es1371->dac[dac_nr].buffer_r[(pos+c) & 63] = mem_readw_phys(es1371->dac[dac_nr].addr);
949 es1371->dac[dac_nr].buffer_l[(pos+c+1) & 63] = es1371->dac[dac_nr].buffer_r[(pos+c+1) & 63] = mem_readw_phys(es1371->dac[dac_nr].addr + 2);
950 es1371->dac[dac_nr].addr += 4;
951
952 es1371->dac[dac_nr].buffer_pos_end += 2;
953 es1371->dac[dac_nr].count++;
954 if (es1371->dac[dac_nr].count > es1371->dac[dac_nr].size)
955 {
956 es1371->dac[dac_nr].count = 0;
957 es1371->dac[dac_nr].addr = es1371->dac[dac_nr].addr_latch;
958 break;
959 }
960 }
961 break;
962 case FORMAT_STEREO_16:
963 for (c = 0; c < 4; c++)
964 {
965 es1371->dac[dac_nr].buffer_l[(pos+c) & 63] = mem_readw_phys(es1371->dac[dac_nr].addr);
966 es1371->dac[dac_nr].buffer_r[(pos+c) & 63] = mem_readw_phys(es1371->dac[dac_nr].addr + 2);
967 // pclog("Fetch %02x %08x %04x %04x\n", (pos+c) & 63, es1371->dac[dac_nr].addr, es1371->dac[dac_nr].buffer_l[(pos+c) & 63], es1371->dac[dac_nr].buffer_r[(pos+c) & 63]);
968 es1371->dac[dac_nr].addr += 4;
969
970 es1371->dac[dac_nr].buffer_pos_end++;
971 es1371->dac[dac_nr].count++;
972 if (es1371->dac[dac_nr].count > es1371->dac[dac_nr].size)
973 {
974 es1371->dac[dac_nr].count = 0;
975 es1371->dac[dac_nr].addr = es1371->dac[dac_nr].addr_latch;
976 break;
977 }
978 }
979 break;
980 }
981 }
982
low_fir_es1371(int dac_nr,int i,float NewSample)983 static inline float low_fir_es1371(int dac_nr, int i, float NewSample)
984 {
985 static float x[2][2][128]; //input samples
986 static int x_pos[2] = {0, 0};
987 float out = 0.0;
988 int read_pos;
989 int n_coef;
990 int pos = x_pos[dac_nr];
991
992 x[dac_nr][i][pos] = NewSample;
993
994 /*Since only 1/16th of input samples are non-zero, only filter those that
995 are valid.*/
996 read_pos = (pos + 15) & (127 & ~15);
997 n_coef = (16 - pos) & 15;
998
999 while (n_coef < ES1371_NCoef)
1000 {
1001 out += low_fir_es1371_coef[n_coef] * x[dac_nr][i][read_pos];
1002 read_pos = (read_pos + 16) & (127 & ~15);
1003 n_coef += 16;
1004 }
1005
1006 if (i == 1)
1007 {
1008 x_pos[dac_nr] = (x_pos[dac_nr] + 1) & 127;
1009 if (x_pos[dac_nr] > 127)
1010 x_pos[dac_nr] = 0;
1011 }
1012
1013 return out;
1014 }
1015
es1371_next_sample_filtered(es1371_t * es1371,int dac_nr,int out_idx)1016 static void es1371_next_sample_filtered(es1371_t *es1371, int dac_nr, int out_idx)
1017 {
1018 int out_l, out_r;
1019 int c;
1020
1021 if ((es1371->dac[dac_nr].buffer_pos - es1371->dac[dac_nr].buffer_pos_end) >= 0)
1022 {
1023 es1371_fetch(es1371, dac_nr);
1024 }
1025
1026 out_l = es1371->dac[dac_nr].buffer_l[es1371->dac[dac_nr].buffer_pos & 63];
1027 out_r = es1371->dac[dac_nr].buffer_r[es1371->dac[dac_nr].buffer_pos & 63];
1028
1029 es1371->dac[dac_nr].filtered_l[out_idx] = (int)low_fir_es1371(dac_nr, 0, (float)out_l);
1030 es1371->dac[dac_nr].filtered_r[out_idx] = (int)low_fir_es1371(dac_nr, 1, (float)out_r);
1031 for (c = 1; c < 16; c++)
1032 {
1033 es1371->dac[dac_nr].filtered_l[out_idx+c] = (int)low_fir_es1371(dac_nr, 0, 0);
1034 es1371->dac[dac_nr].filtered_r[out_idx+c] = (int)low_fir_es1371(dac_nr, 1, 0);
1035 }
1036
1037 // pclog("Use %02x %04x %04x\n", es1371->dac[dac_nr].buffer_pos & 63, es1371->dac[dac_nr].out_l, es1371->dac[dac_nr].out_r);
1038
1039 es1371->dac[dac_nr].buffer_pos++;
1040 // pclog("Next sample %08x %08x %08x\n", es1371->dac[dac_nr].buffer_pos, es1371->dac[dac_nr].buffer_pos_end, es1371->dac[dac_nr].curr_samp_ct);
1041 }
1042
1043 //static FILE *es1371_f;//,*es1371_f2;
1044
es1371_update(es1371_t * es1371)1045 static void es1371_update(es1371_t *es1371)
1046 {
1047 int32_t l, r;
1048
1049 l = (es1371->dac[0].out_l * es1371->dac[0].vol_l) >> 12;
1050 l += ((es1371->dac[1].out_l * es1371->dac[1].vol_l) >> 12);
1051 r = (es1371->dac[0].out_r * es1371->dac[0].vol_r) >> 12;
1052 r += ((es1371->dac[1].out_r * es1371->dac[1].vol_r) >> 12);
1053
1054 l >>= 1;
1055 r >>= 1;
1056
1057 l = (l * es1371->master_vol_l) >> 15;
1058 r = (r * es1371->master_vol_r) >> 15;
1059
1060 if (l < -32768)
1061 l = -32768;
1062 else if (l > 32767)
1063 l = 32767;
1064 if (r < -32768)
1065 r = -32768;
1066 else if (r > 32767)
1067 r = 32767;
1068
1069 for (; es1371->pos < sound_pos_global; es1371->pos++)
1070 {
1071 es1371->buffer[es1371->pos*2] = l;
1072 es1371->buffer[es1371->pos*2 + 1] = r;
1073 }
1074 }
1075
es1371_poll(void * p)1076 static void es1371_poll(void *p)
1077 {
1078 es1371_t *es1371 = (es1371_t *)p;
1079
1080 es1371->dac[1].time += es1371->dac[1].latch;
1081
1082 es1371_update(es1371);
1083
1084 if (es1371->int_ctrl & INT_DAC1_EN)
1085 {
1086 int frac = es1371->dac[0].ac & 0x7fff;
1087 int idx = es1371->dac[0].ac >> 15;
1088 int samp1_l = es1371->dac[0].filtered_l[idx];
1089 int samp1_r = es1371->dac[0].filtered_r[idx];
1090 int samp2_l = es1371->dac[0].filtered_l[(idx + 1) & 31];
1091 int samp2_r = es1371->dac[0].filtered_r[(idx + 1) & 31];
1092
1093 es1371->dac[0].out_l = ((samp1_l * (0x8000 - frac)) + (samp2_l * frac)) >> 15;
1094 es1371->dac[0].out_r = ((samp1_r * (0x8000 - frac)) + (samp2_r * frac)) >> 15;
1095 // pclog("1Samp %i %i %08x\n", es1371->dac[0].curr_samp_ct, es1371->dac[0].samp_ct, es1371->dac[0].ac);
1096 es1371->dac[0].ac += es1371->dac[0].vf;
1097 es1371->dac[0].ac &= ((32 << 15) - 1);
1098 if ((es1371->dac[0].ac >> (15+4)) != es1371->dac[0].f_pos)
1099 {
1100 es1371_next_sample_filtered(es1371, 0, es1371->dac[0].f_pos ? 16 : 0);
1101 es1371->dac[0].f_pos = (es1371->dac[0].f_pos + 1) & 1;
1102
1103 es1371->dac[0].curr_samp_ct++;
1104 if (es1371->dac[0].curr_samp_ct == es1371->dac[0].samp_ct)
1105 {
1106 // pclog("DAC1 IRQ\n");
1107 es1371->int_status |= INT_STATUS_DAC1;
1108 es1371_update_irqs(es1371);
1109 }
1110 if (es1371->dac[0].curr_samp_ct > es1371->dac[0].samp_ct)
1111 {
1112 es1371->dac[0].curr_samp_ct = 0;
1113 }
1114 }
1115 }
1116
1117 if (es1371->int_ctrl & INT_DAC2_EN)
1118 {
1119 int frac = es1371->dac[1].ac & 0x7fff;
1120 int idx = es1371->dac[1].ac >> 15;
1121 int samp1_l = es1371->dac[1].filtered_l[idx];
1122 int samp1_r = es1371->dac[1].filtered_r[idx];
1123 int samp2_l = es1371->dac[1].filtered_l[(idx + 1) & 31];
1124 int samp2_r = es1371->dac[1].filtered_r[(idx + 1) & 31];
1125
1126 es1371->dac[1].out_l = ((samp1_l * (0x8000 - frac)) + (samp2_l * frac)) >> 15;
1127 es1371->dac[1].out_r = ((samp1_r * (0x8000 - frac)) + (samp2_r * frac)) >> 15;
1128 // pclog("2Samp %i %i %08x\n", es1371->dac[1].curr_samp_ct, es1371->dac[1].samp_ct, es1371->dac[1].ac);
1129 es1371->dac[1].ac += es1371->dac[1].vf;
1130 es1371->dac[1].ac &= ((32 << 15) - 1);
1131 if ((es1371->dac[1].ac >> (15+4)) != es1371->dac[1].f_pos)
1132 {
1133 es1371_next_sample_filtered(es1371, 1, es1371->dac[1].f_pos ? 16 : 0);
1134 es1371->dac[1].f_pos = (es1371->dac[1].f_pos + 1) & 1;
1135
1136 es1371->dac[1].curr_samp_ct++;
1137 if (es1371->dac[1].curr_samp_ct == es1371->dac[1].samp_ct)
1138 {
1139 // es1371->dac[1].curr_samp_ct = 0;
1140 // pclog("DAC2 IRQ\n");
1141 es1371->int_status |= INT_STATUS_DAC2;
1142 es1371_update_irqs(es1371);
1143 }
1144 if (es1371->dac[1].curr_samp_ct > es1371->dac[1].samp_ct)
1145 es1371->dac[1].curr_samp_ct = 0;
1146 }
1147 }
1148 }
1149
es1371_get_buffer(int32_t * buffer,int len,void * p)1150 static void es1371_get_buffer(int32_t *buffer, int len, void *p)
1151 {
1152 es1371_t *es1371 = (es1371_t *)p;
1153 int c;
1154
1155 es1371_update(es1371);
1156
1157 for (c = 0; c < len * 2; c++)
1158 buffer[c] += (es1371->buffer[c] / 2);
1159
1160 es1371->pos = 0;
1161 }
1162
sinc(double x)1163 static inline double sinc(double x)
1164 {
1165 return sin(M_PI * x) / (M_PI * x);
1166 }
1167
generate_es1371_filter()1168 static void generate_es1371_filter()
1169 {
1170 /*Cutoff frequency = 1 / 32*/
1171 float fC = 1.0 / 32.0;
1172 float gain;
1173 int n;
1174
1175 for (n = 0; n < ES1371_NCoef; n++)
1176 {
1177 /*Blackman window*/
1178 double w = 0.42 - (0.5 * cos((2.0*n*M_PI)/(double)(ES1371_NCoef-1))) + (0.08 * cos((4.0*n*M_PI)/(double)(ES1371_NCoef-1)));
1179 /*Sinc filter*/
1180 double h = sinc(2.0 * fC * ((double)n - ((double)(ES1371_NCoef-1) / 2.0)));
1181
1182 /*Create windowed-sinc filter*/
1183 low_fir_es1371_coef[n] = w * h;
1184 }
1185
1186 low_fir_es1371_coef[(ES1371_NCoef - 1) / 2] = 1.0;
1187
1188 gain = 0.0;
1189 for (n = 0; n < ES1371_NCoef; n++)
1190 gain += low_fir_es1371_coef[n] / (float)N;
1191
1192 gain /= 0.95;
1193
1194 /*Normalise filter, to produce unity gain*/
1195 for (n = 0; n < ES1371_NCoef; n++)
1196 low_fir_es1371_coef[n] /= gain;
1197 }
1198
es1371_init()1199 static void *es1371_init()
1200 {
1201 es1371_t *es1371 = malloc(sizeof(es1371_t));
1202 memset(es1371, 0, sizeof(es1371_t));
1203
1204 sound_add_handler(es1371_get_buffer, es1371);
1205
1206 es1371->card = pci_add(es1371_pci_read, es1371_pci_write, es1371);
1207
1208 timer_add(es1371_poll, &es1371->dac[1].time, TIMER_ALWAYS_ENABLED, es1371);
1209
1210 generate_es1371_filter();
1211
1212 return es1371;
1213 }
1214
es1371_close(void * p)1215 static void es1371_close(void *p)
1216 {
1217 es1371_t *es1371 = (es1371_t *)p;
1218
1219 free(es1371);
1220 }
1221
es1371_speed_changed(void * p)1222 static void es1371_speed_changed(void *p)
1223 {
1224 es1371_t *es1371 = (es1371_t *)p;
1225
1226 es1371->dac[1].latch = (int)((double)TIMER_USEC * (1000000.0 / 48000.0));
1227 }
1228
es1371_add_status_info_dac(es1371_t * es1371,char * s,int max_len,int dac_nr)1229 void es1371_add_status_info_dac(es1371_t *es1371, char *s, int max_len, int dac_nr)
1230 {
1231 int ena = dac_nr ? INT_DAC2_EN : INT_DAC1_EN;
1232 char *dac_name = dac_nr ? "DAC2 (Wave)" : "DAC1 (MIDI)";
1233 char temps[128];
1234
1235 if (es1371->int_ctrl & ena)
1236 {
1237 int format = dac_nr ? ((es1371->si_cr >> 2) & 3) : (es1371->si_cr & 3);
1238 double freq = 48000.0 * ((double)es1371->dac[dac_nr].vf / (32768.0 * 16.0));
1239
1240 switch (format)
1241 {
1242 case FORMAT_MONO_8:
1243 snprintf(temps, 128, "%s format : 8-bit mono\n", dac_name);
1244 break;
1245 case FORMAT_STEREO_8:
1246 snprintf(temps, 128, "%s format : 8-bit stereo\n", dac_name);
1247 break;
1248 case FORMAT_MONO_16:
1249 snprintf(temps, 128, "%s format : 16-bit mono\n", dac_name);
1250 break;
1251 case FORMAT_STEREO_16:
1252 snprintf(temps, 128, "%s format : 16-bit stereo\n", dac_name);
1253 break;
1254 }
1255
1256 strncat(s, temps, max_len);
1257 max_len -= strlen(temps);
1258
1259 snprintf(temps, 128, "Playback frequency : %i Hz\n", (int)freq);
1260 strncat(s, temps, max_len);
1261 }
1262 else
1263 {
1264 snprintf(temps, max_len, "%s stopped\n", dac_name);
1265 strncat(s, temps, max_len);
1266 }
1267 }
1268
es1371_add_status_info(char * s,int max_len,void * p)1269 void es1371_add_status_info(char *s, int max_len, void *p)
1270 {
1271 es1371_t *es1371 = (es1371_t *)p;
1272
1273 es1371_add_status_info_dac(es1371, s, max_len, 0);
1274 es1371_add_status_info_dac(es1371, s, max_len, 1);
1275 }
1276
1277 device_t es1371_device =
1278 {
1279 "Ensoniq AudioPCI (ES1371)",
1280 0,
1281 es1371_init,
1282 es1371_close,
1283 NULL,
1284 es1371_speed_changed,
1285 NULL,
1286 es1371_add_status_info,
1287 NULL
1288 };
1289