opPCMPEQB_a16(uint32_t fetchdat)1 static int opPCMPEQB_a16(uint32_t fetchdat)
2 {
3         MMX_REG src;
4 
5         MMX_ENTER();
6 
7         fetch_ea_16(fetchdat);
8         MMX_GETSRC();
9 
10         cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
11         cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
12         cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
13         cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0;
14         cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0;
15         cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
16         cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
17         cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
18 
19         return 0;
20 }
opPCMPEQB_a32(uint32_t fetchdat)21 static int opPCMPEQB_a32(uint32_t fetchdat)
22 {
23         MMX_REG src;
24 
25         MMX_ENTER();
26 
27         fetch_ea_32(fetchdat);
28         MMX_GETSRC();
29 
30         cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].b[0] == src.b[0]) ? 0xff : 0;
31         cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].b[1] == src.b[1]) ? 0xff : 0;
32         cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].b[2] == src.b[2]) ? 0xff : 0;
33         cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].b[3] == src.b[3]) ? 0xff : 0;
34         cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].b[4] == src.b[4]) ? 0xff : 0;
35         cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].b[5] == src.b[5]) ? 0xff : 0;
36         cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].b[6] == src.b[6]) ? 0xff : 0;
37         cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].b[7] == src.b[7]) ? 0xff : 0;
38 
39         return 0;
40 }
41 
opPCMPGTB_a16(uint32_t fetchdat)42 static int opPCMPGTB_a16(uint32_t fetchdat)
43 {
44         MMX_REG src;
45 
46         MMX_ENTER();
47 
48         fetch_ea_16(fetchdat);
49         MMX_GETSRC();
50 
51         cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
52         cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
53         cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
54         cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0;
55         cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0;
56         cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
57         cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
58         cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
59 
60         return 0;
61 }
opPCMPGTB_a32(uint32_t fetchdat)62 static int opPCMPGTB_a32(uint32_t fetchdat)
63 {
64         MMX_REG src;
65 
66         MMX_ENTER();
67 
68         fetch_ea_32(fetchdat);
69         MMX_GETSRC();
70 
71         cpu_state.MM[cpu_reg].b[0] = (cpu_state.MM[cpu_reg].sb[0] > src.sb[0]) ? 0xff : 0;
72         cpu_state.MM[cpu_reg].b[1] = (cpu_state.MM[cpu_reg].sb[1] > src.sb[1]) ? 0xff : 0;
73         cpu_state.MM[cpu_reg].b[2] = (cpu_state.MM[cpu_reg].sb[2] > src.sb[2]) ? 0xff : 0;
74         cpu_state.MM[cpu_reg].b[3] = (cpu_state.MM[cpu_reg].sb[3] > src.sb[3]) ? 0xff : 0;
75         cpu_state.MM[cpu_reg].b[4] = (cpu_state.MM[cpu_reg].sb[4] > src.sb[4]) ? 0xff : 0;
76         cpu_state.MM[cpu_reg].b[5] = (cpu_state.MM[cpu_reg].sb[5] > src.sb[5]) ? 0xff : 0;
77         cpu_state.MM[cpu_reg].b[6] = (cpu_state.MM[cpu_reg].sb[6] > src.sb[6]) ? 0xff : 0;
78         cpu_state.MM[cpu_reg].b[7] = (cpu_state.MM[cpu_reg].sb[7] > src.sb[7]) ? 0xff : 0;
79 
80         return 0;
81 }
82 
opPCMPEQW_a16(uint32_t fetchdat)83 static int opPCMPEQW_a16(uint32_t fetchdat)
84 {
85         MMX_REG src;
86 
87         MMX_ENTER();
88 
89         fetch_ea_16(fetchdat);
90         MMX_GETSRC();
91 
92         cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
93         cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
94         cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
95         cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
96 
97         return 0;
98 }
opPCMPEQW_a32(uint32_t fetchdat)99 static int opPCMPEQW_a32(uint32_t fetchdat)
100 {
101         MMX_REG src;
102 
103         MMX_ENTER();
104 
105         fetch_ea_32(fetchdat);
106         MMX_GETSRC();
107 
108         cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].w[0] == src.w[0]) ? 0xffff : 0;
109         cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].w[1] == src.w[1]) ? 0xffff : 0;
110         cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].w[2] == src.w[2]) ? 0xffff : 0;
111         cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].w[3] == src.w[3]) ? 0xffff : 0;
112 
113         return 0;
114 }
115 
opPCMPGTW_a16(uint32_t fetchdat)116 static int opPCMPGTW_a16(uint32_t fetchdat)
117 {
118         MMX_REG src;
119 
120         MMX_ENTER();
121 
122         fetch_ea_16(fetchdat);
123         MMX_GETSRC();
124 
125         cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
126         cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
127         cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
128         cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
129 
130         return 0;
131 }
opPCMPGTW_a32(uint32_t fetchdat)132 static int opPCMPGTW_a32(uint32_t fetchdat)
133 {
134         MMX_REG src;
135 
136         MMX_ENTER();
137 
138         fetch_ea_32(fetchdat);
139         MMX_GETSRC();
140 
141         cpu_state.MM[cpu_reg].w[0] = (cpu_state.MM[cpu_reg].sw[0] > src.sw[0]) ? 0xffff : 0;
142         cpu_state.MM[cpu_reg].w[1] = (cpu_state.MM[cpu_reg].sw[1] > src.sw[1]) ? 0xffff : 0;
143         cpu_state.MM[cpu_reg].w[2] = (cpu_state.MM[cpu_reg].sw[2] > src.sw[2]) ? 0xffff : 0;
144         cpu_state.MM[cpu_reg].w[3] = (cpu_state.MM[cpu_reg].sw[3] > src.sw[3]) ? 0xffff : 0;
145 
146         return 0;
147 }
148 
opPCMPEQD_a16(uint32_t fetchdat)149 static int opPCMPEQD_a16(uint32_t fetchdat)
150 {
151         MMX_REG src;
152 
153         MMX_ENTER();
154 
155         fetch_ea_16(fetchdat);
156         MMX_GETSRC();
157 
158         cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
159         cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
160 
161         return 0;
162 }
opPCMPEQD_a32(uint32_t fetchdat)163 static int opPCMPEQD_a32(uint32_t fetchdat)
164 {
165         MMX_REG src;
166 
167         MMX_ENTER();
168 
169         fetch_ea_16(fetchdat);
170         MMX_GETSRC();
171 
172         cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].l[0] == src.l[0]) ? 0xffffffff : 0;
173         cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].l[1] == src.l[1]) ? 0xffffffff : 0;
174 
175         return 0;
176 }
177 
opPCMPGTD_a16(uint32_t fetchdat)178 static int opPCMPGTD_a16(uint32_t fetchdat)
179 {
180         MMX_REG src;
181 
182         MMX_ENTER();
183 
184         fetch_ea_16(fetchdat);
185         MMX_GETSRC();
186 
187         cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
188         cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
189 
190         return 0;
191 }
opPCMPGTD_a32(uint32_t fetchdat)192 static int opPCMPGTD_a32(uint32_t fetchdat)
193 {
194         MMX_REG src;
195 
196         MMX_ENTER();
197 
198         fetch_ea_16(fetchdat);
199         MMX_GETSRC();
200 
201         cpu_state.MM[cpu_reg].l[0] = (cpu_state.MM[cpu_reg].sl[0] > src.sl[0]) ? 0xffffffff : 0;
202         cpu_state.MM[cpu_reg].l[1] = (cpu_state.MM[cpu_reg].sl[1] > src.sl[1]) ? 0xffffffff : 0;
203 
204         return 0;
205 }
206