1 // Copyright (c) 2012- PPSSPP Project. 2 3 // This program is free software: you can redistribute it and/or modify 4 // it under the terms of the GNU General Public License as published by 5 // the Free Software Foundation, version 2.0 or later versions. 6 7 // This program is distributed in the hope that it will be useful, 8 // but WITHOUT ANY WARRANTY; without even the implied warranty of 9 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 10 // GNU General Public License 2.0 for more details. 11 12 // A copy of the GPL 2.0 should have been included with the program. 13 // If not, see http://www.gnu.org/licenses/ 14 15 // Official git repository and contact information can be found at 16 // https://github.com/hrydgard/ppsspp and http://www.ppsspp.org/. 17 18 #pragma once 19 20 #include "Common/CommonTypes.h" 21 #include "Core/MIPS/MIPS.h" 22 23 #define CONDTYPE_MASK 0x00000007 24 #define CONDTYPE_EQ 0x00000001 25 #define CONDTYPE_NE 0x00000002 26 #define CONDTYPE_LEZ 0x00000003 27 #define CONDTYPE_GTZ 0x00000004 28 #define CONDTYPE_LTZ 0x00000005 29 #define CONDTYPE_GEZ 0x00000006 30 31 #define CONDTYPE_FPUFALSE CONDTYPE_EQ 32 #define CONDTYPE_FPUTRUE CONDTYPE_NE 33 34 // as long as the other flags are checked, 35 // there is no way to misinterpret these 36 // as CONDTYPE_X 37 #define MEMTYPE_MASK 0x00000007ULL 38 #define MEMTYPE_BYTE 0x00000001ULL 39 #define MEMTYPE_HWORD 0x00000002ULL 40 #define MEMTYPE_WORD 0x00000003ULL 41 #define MEMTYPE_FLOAT 0x00000004ULL 42 #define MEMTYPE_VQUAD 0x00000005ULL 43 44 #define IS_CONDMOVE 0x00000008ULL 45 #define DELAYSLOT 0x00000010ULL 46 #define BAD_INSTRUCTION 0x00000020ULL 47 #define LIKELY 0x00000040ULL 48 #define IS_CONDBRANCH 0x00000080ULL 49 #define IS_JUMP 0x00000100ULL 50 51 #define IN_RS 0x00000200ULL 52 #define IN_RS_ADDR (0x00000400ULL | IN_RS) 53 #define IN_RS_SHIFT (0x00000800ULL | IN_RS) 54 #define IN_RT 0x00001000ULL 55 #define IN_SA 0x00002000ULL 56 #define IN_IMM16 0x00004000ULL 57 #define IN_IMM26 0x00008000ULL 58 #define IN_MEM 0x00010000ULL 59 #define IN_OTHER 0x00020000ULL 60 #define IN_FPUFLAG 0x00040000ULL 61 #define IN_VFPU_CC 0x00080000ULL 62 63 #define OUT_RT 0x00100000ULL 64 #define OUT_RD 0x00200000ULL 65 #define OUT_RA 0x00400000ULL 66 #define OUT_MEM 0x00800000ULL 67 #define OUT_OTHER 0x01000000ULL 68 #define OUT_FPUFLAG 0x02000000ULL 69 #define OUT_VFPU_CC 0x04000000ULL 70 #define OUT_EAT_PREFIX 0x08000000ULL 71 72 #define VFPU_NO_PREFIX 0x10000000ULL 73 #define IS_VFPU 0x20000000ULL 74 #define IS_FPU 0x40000000ULL 75 76 #define IN_FS 0x000100000000ULL 77 #define IN_FT 0x000200000000ULL 78 #define IN_LO 0x000400000000ULL 79 #define IN_HI 0x000800000000ULL 80 81 #define OUT_FD 0x001000000000ULL 82 #define OUT_FS 0x002000000000ULL 83 #define OUT_LO 0x004000000000ULL 84 #define OUT_HI 0x008000000000ULL 85 86 #define IN_VS 0x010000000000ULL 87 #define IN_VT 0x020000000000ULL 88 #define OUT_FT 0x040000000000ULL 89 90 #define OUT_VD 0x100000000000ULL 91 92 #ifndef CDECL 93 #define CDECL 94 #endif 95 96 struct MIPSInfo { MIPSInfoMIPSInfo97 MIPSInfo() { 98 value = 0; 99 cycles = 0; 100 } 101 valueMIPSInfo102 explicit MIPSInfo(u64 v, u16 c = 0) : value(v), cycles(c) { 103 if (c == 0) { 104 cycles = 1; 105 if (v & IS_VFPU) 106 cycles++; 107 } 108 } 109 110 u64 operator & (const u64 &arg) const { 111 return value & arg; 112 } 113 114 u64 value : 48; 115 u64 cycles : 16; 116 }; 117 118 typedef void (CDECL *MIPSDisFunc)(MIPSOpcode opcode, char *out); 119 typedef void (CDECL *MIPSInterpretFunc)(MIPSOpcode opcode); 120 121 namespace MIPSComp { 122 class MIPSFrontendInterface; 123 } 124 125 void MIPSCompileOp(MIPSOpcode op, MIPSComp::MIPSFrontendInterface *jit); 126 void MIPSDisAsm(MIPSOpcode op, u32 pc, char *out, bool tabsToSpaces = false); 127 MIPSInfo MIPSGetInfo(MIPSOpcode op); 128 void MIPSInterpret(MIPSOpcode op); //only for those rare ones 129 int MIPSInterpret_RunUntil(u64 globalTicks); 130 MIPSInterpretFunc MIPSGetInterpretFunc(MIPSOpcode op); 131 132 int MIPSGetInstructionCycleEstimate(MIPSOpcode op); 133 const char *MIPSGetName(MIPSOpcode op); 134 const char *MIPSDisasmAt(u32 compilerPC); 135