1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|*Target Register Enum Values *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9/* Capstone Disassembly Engine */ 10/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */ 11 12 13#ifdef GET_REGINFO_ENUM 14#undef GET_REGINFO_ENUM 15 16enum { 17 SystemZ_NoRegister, 18 SystemZ_CC = 1, 19 SystemZ_F0D = 2, 20 SystemZ_F1D = 3, 21 SystemZ_F2D = 4, 22 SystemZ_F3D = 5, 23 SystemZ_F4D = 6, 24 SystemZ_F5D = 7, 25 SystemZ_F6D = 8, 26 SystemZ_F7D = 9, 27 SystemZ_F8D = 10, 28 SystemZ_F9D = 11, 29 SystemZ_F10D = 12, 30 SystemZ_F11D = 13, 31 SystemZ_F12D = 14, 32 SystemZ_F13D = 15, 33 SystemZ_F14D = 16, 34 SystemZ_F15D = 17, 35 SystemZ_F0Q = 18, 36 SystemZ_F1Q = 19, 37 SystemZ_F4Q = 20, 38 SystemZ_F5Q = 21, 39 SystemZ_F8Q = 22, 40 SystemZ_F9Q = 23, 41 SystemZ_F12Q = 24, 42 SystemZ_F13Q = 25, 43 SystemZ_F0S = 26, 44 SystemZ_F1S = 27, 45 SystemZ_F2S = 28, 46 SystemZ_F3S = 29, 47 SystemZ_F4S = 30, 48 SystemZ_F5S = 31, 49 SystemZ_F6S = 32, 50 SystemZ_F7S = 33, 51 SystemZ_F8S = 34, 52 SystemZ_F9S = 35, 53 SystemZ_F10S = 36, 54 SystemZ_F11S = 37, 55 SystemZ_F12S = 38, 56 SystemZ_F13S = 39, 57 SystemZ_F14S = 40, 58 SystemZ_F15S = 41, 59 SystemZ_R0D = 42, 60 SystemZ_R1D = 43, 61 SystemZ_R2D = 44, 62 SystemZ_R3D = 45, 63 SystemZ_R4D = 46, 64 SystemZ_R5D = 47, 65 SystemZ_R6D = 48, 66 SystemZ_R7D = 49, 67 SystemZ_R8D = 50, 68 SystemZ_R9D = 51, 69 SystemZ_R10D = 52, 70 SystemZ_R11D = 53, 71 SystemZ_R12D = 54, 72 SystemZ_R13D = 55, 73 SystemZ_R14D = 56, 74 SystemZ_R15D = 57, 75 SystemZ_R0H = 58, 76 SystemZ_R1H = 59, 77 SystemZ_R2H = 60, 78 SystemZ_R3H = 61, 79 SystemZ_R4H = 62, 80 SystemZ_R5H = 63, 81 SystemZ_R6H = 64, 82 SystemZ_R7H = 65, 83 SystemZ_R8H = 66, 84 SystemZ_R9H = 67, 85 SystemZ_R10H = 68, 86 SystemZ_R11H = 69, 87 SystemZ_R12H = 70, 88 SystemZ_R13H = 71, 89 SystemZ_R14H = 72, 90 SystemZ_R15H = 73, 91 SystemZ_R0L = 74, 92 SystemZ_R1L = 75, 93 SystemZ_R2L = 76, 94 SystemZ_R3L = 77, 95 SystemZ_R4L = 78, 96 SystemZ_R5L = 79, 97 SystemZ_R6L = 80, 98 SystemZ_R7L = 81, 99 SystemZ_R8L = 82, 100 SystemZ_R9L = 83, 101 SystemZ_R10L = 84, 102 SystemZ_R11L = 85, 103 SystemZ_R12L = 86, 104 SystemZ_R13L = 87, 105 SystemZ_R14L = 88, 106 SystemZ_R15L = 89, 107 SystemZ_R0Q = 90, 108 SystemZ_R2Q = 91, 109 SystemZ_R4Q = 92, 110 SystemZ_R6Q = 93, 111 SystemZ_R8Q = 94, 112 SystemZ_R10Q = 95, 113 SystemZ_R12Q = 96, 114 SystemZ_R14Q = 97, 115 SystemZ_NUM_TARGET_REGS // 98 116}; 117 118// Register classes 119enum { 120 SystemZ_GRX32BitRegClassID = 0, 121 SystemZ_FP32BitRegClassID = 1, 122 SystemZ_GR32BitRegClassID = 2, 123 SystemZ_GRH32BitRegClassID = 3, 124 SystemZ_ADDR32BitRegClassID = 4, 125 SystemZ_CCRegsRegClassID = 5, 126 SystemZ_FP64BitRegClassID = 6, 127 SystemZ_GR64BitRegClassID = 7, 128 SystemZ_ADDR64BitRegClassID = 8, 129 SystemZ_FP128BitRegClassID = 9, 130 SystemZ_GR128BitRegClassID = 10, 131 SystemZ_ADDR128BitRegClassID = 11 132}; 133 134// Subregister indices 135enum { 136 SystemZ_NoSubRegister, 137 SystemZ_subreg_h32, // 1 138 SystemZ_subreg_h64, // 2 139 SystemZ_subreg_hh32, // 3 140 SystemZ_subreg_hl32, // 4 141 SystemZ_subreg_l32, // 5 142 SystemZ_subreg_l64, // 6 143 SystemZ_NUM_TARGET_SUBREGS 144}; 145 146#endif // GET_REGINFO_ENUM 147 148/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 149|* *| 150|*MC Register Information *| 151|* *| 152|* Automatically generated file, do not edit! *| 153|* *| 154\*===----------------------------------------------------------------------===*/ 155 156 157#ifdef GET_REGINFO_MC_DESC 158#undef GET_REGINFO_MC_DESC 159 160static const MCPhysReg SystemZRegDiffLists[] = { 161 /* 0 */ 65193, 1, 1, 1, 0, 162 /* 5 */ 65469, 1, 0, 163 /* 8 */ 65519, 2, 0, 164 /* 11 */ 65521, 2, 0, 165 /* 14 */ 65523, 2, 0, 166 /* 17 */ 65525, 2, 0, 167 /* 20 */ 65512, 8, 0, 168 /* 23 */ 65512, 10, 0, 169 /* 26 */ 65512, 12, 0, 170 /* 29 */ 65512, 14, 0, 171 /* 32 */ 65512, 16, 0, 172 /* 35 */ 65522, 24, 65510, 24, 0, 173 /* 40 */ 65524, 24, 65510, 24, 0, 174 /* 45 */ 65526, 24, 65510, 24, 0, 175 /* 50 */ 65528, 24, 65510, 24, 0, 176 /* 55 */ 65504, 40, 0, 177 /* 58 */ 65520, 40, 0, 178 /* 61 */ 65504, 41, 0, 179 /* 64 */ 65520, 41, 0, 180 /* 67 */ 65504, 42, 0, 181 /* 70 */ 65520, 42, 0, 182 /* 73 */ 65504, 43, 0, 183 /* 76 */ 65520, 43, 0, 184 /* 79 */ 65504, 44, 0, 185 /* 82 */ 65520, 44, 0, 186 /* 85 */ 65504, 45, 0, 187 /* 88 */ 65520, 45, 0, 188 /* 91 */ 65504, 46, 0, 189 /* 94 */ 65520, 46, 0, 190 /* 97 */ 65504, 47, 0, 191 /* 100 */ 65520, 47, 0, 192 /* 103 */ 65504, 48, 0, 193 /* 106 */ 65520, 48, 0, 194 /* 109 */ 65405, 0, 195 /* 111 */ 65438, 0, 196 /* 113 */ 65511, 0, 197 /* 115 */ 65489, 32, 65520, 65519, 32, 65520, 0, 198 /* 122 */ 65490, 32, 65520, 65519, 32, 65520, 0, 199 /* 129 */ 65491, 32, 65520, 65519, 32, 65520, 0, 200 /* 136 */ 65492, 32, 65520, 65519, 32, 65520, 0, 201 /* 143 */ 65493, 32, 65520, 65519, 32, 65520, 0, 202 /* 150 */ 65494, 32, 65520, 65519, 32, 65520, 0, 203 /* 157 */ 65495, 32, 65520, 65519, 32, 65520, 0, 204 /* 164 */ 65496, 32, 65520, 65519, 32, 65520, 0, 205 /* 171 */ 65535, 0, 206}; 207 208static const uint16_t SystemZSubRegIdxLists[] = { 209 /* 0 */ 5, 1, 0, 210 /* 3 */ 6, 1, 2, 3, 0, 211 /* 8 */ 6, 5, 1, 2, 4, 3, 0, 212}; 213 214static const MCRegisterDesc SystemZRegDesc[] = { // Descriptors 215 { 2, 0, 0, 0, 0 }, 216 { 0, 4, 4, 2, 2737 }, 217 { 13, 38, 33, 1, 2737 }, 218 { 31, 38, 33, 1, 2737 }, 219 { 49, 38, 30, 1, 2737 }, 220 { 67, 38, 30, 1, 2737 }, 221 { 85, 38, 30, 1, 2737 }, 222 { 103, 38, 30, 1, 2737 }, 223 { 111, 38, 27, 1, 2737 }, 224 { 119, 38, 27, 1, 2737 }, 225 { 127, 38, 27, 1, 2737 }, 226 { 135, 38, 27, 1, 2737 }, 227 { 3, 38, 24, 1, 2737 }, 228 { 21, 38, 24, 1, 2737 }, 229 { 39, 38, 24, 1, 2737 }, 230 { 57, 38, 24, 1, 2737 }, 231 { 75, 38, 21, 1, 2737 }, 232 { 93, 38, 21, 1, 2737 }, 233 { 288, 35, 4, 3, 129 }, 234 { 296, 35, 4, 3, 129 }, 235 { 324, 40, 4, 3, 177 }, 236 { 332, 40, 4, 3, 177 }, 237 { 340, 45, 4, 3, 225 }, 238 { 348, 45, 4, 3, 225 }, 239 { 300, 50, 4, 3, 273 }, 240 { 314, 50, 4, 3, 273 }, 241 { 357, 4, 32, 2, 1809 }, 242 { 366, 4, 32, 2, 1809 }, 243 { 375, 4, 29, 2, 1809 }, 244 { 384, 4, 29, 2, 1809 }, 245 { 393, 4, 29, 2, 1809 }, 246 { 402, 4, 29, 2, 1809 }, 247 { 406, 4, 26, 2, 1809 }, 248 { 410, 4, 26, 2, 1809 }, 249 { 414, 4, 26, 2, 1809 }, 250 { 418, 4, 26, 2, 1809 }, 251 { 352, 4, 23, 2, 1809 }, 252 { 361, 4, 23, 2, 1809 }, 253 { 370, 4, 23, 2, 1809 }, 254 { 379, 4, 23, 2, 1809 }, 255 { 388, 4, 20, 2, 1809 }, 256 { 397, 4, 20, 2, 1809 }, 257 { 17, 119, 104, 0, 82 }, 258 { 35, 119, 98, 0, 82 }, 259 { 53, 119, 98, 0, 82 }, 260 { 71, 119, 92, 0, 82 }, 261 { 89, 119, 92, 0, 82 }, 262 { 107, 119, 86, 0, 82 }, 263 { 115, 119, 86, 0, 82 }, 264 { 123, 119, 80, 0, 82 }, 265 { 131, 119, 80, 0, 82 }, 266 { 139, 119, 74, 0, 82 }, 267 { 8, 119, 74, 0, 82 }, 268 { 26, 119, 68, 0, 82 }, 269 { 44, 119, 68, 0, 82 }, 270 { 62, 119, 62, 0, 82 }, 271 { 80, 119, 62, 0, 82 }, 272 { 98, 119, 56, 0, 82 }, 273 { 148, 4, 106, 2, 1778 }, 274 { 157, 4, 100, 2, 1778 }, 275 { 166, 4, 100, 2, 1778 }, 276 { 175, 4, 94, 2, 1778 }, 277 { 184, 4, 94, 2, 1778 }, 278 { 193, 4, 88, 2, 1778 }, 279 { 197, 4, 88, 2, 1778 }, 280 { 201, 4, 82, 2, 1778 }, 281 { 205, 4, 82, 2, 1778 }, 282 { 209, 4, 76, 2, 1778 }, 283 { 143, 4, 76, 2, 1778 }, 284 { 152, 4, 70, 2, 1778 }, 285 { 161, 4, 70, 2, 1778 }, 286 { 170, 4, 64, 2, 1778 }, 287 { 179, 4, 64, 2, 1778 }, 288 { 188, 4, 58, 2, 1778 }, 289 { 218, 4, 103, 2, 1746 }, 290 { 227, 4, 97, 2, 1746 }, 291 { 236, 4, 97, 2, 1746 }, 292 { 245, 4, 91, 2, 1746 }, 293 { 254, 4, 91, 2, 1746 }, 294 { 263, 4, 85, 2, 1746 }, 295 { 267, 4, 85, 2, 1746 }, 296 { 271, 4, 79, 2, 1746 }, 297 { 275, 4, 79, 2, 1746 }, 298 { 279, 4, 73, 2, 1746 }, 299 { 213, 4, 73, 2, 1746 }, 300 { 222, 4, 67, 2, 1746 }, 301 { 231, 4, 67, 2, 1746 }, 302 { 240, 4, 61, 2, 1746 }, 303 { 249, 4, 61, 2, 1746 }, 304 { 258, 4, 55, 2, 1746 }, 305 { 292, 115, 4, 8, 4 }, 306 { 310, 122, 4, 8, 4 }, 307 { 328, 129, 4, 8, 4 }, 308 { 336, 136, 4, 8, 4 }, 309 { 344, 143, 4, 8, 4 }, 310 { 283, 150, 4, 8, 4 }, 311 { 305, 157, 4, 8, 4 }, 312 { 319, 164, 4, 8, 4 }, 313}; 314 315 // GRX32Bit Register Class... 316 static const MCPhysReg GRX32Bit[] = { 317 SystemZ_R0L, SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R0H, SystemZ_R1H, SystemZ_R2H, SystemZ_R3H, SystemZ_R4H, SystemZ_R5H, SystemZ_R15L, SystemZ_R15H, SystemZ_R14L, SystemZ_R14H, SystemZ_R13L, SystemZ_R13H, SystemZ_R12L, SystemZ_R12H, SystemZ_R11L, SystemZ_R11H, SystemZ_R10L, SystemZ_R10H, SystemZ_R9L, SystemZ_R9H, SystemZ_R8L, SystemZ_R8H, SystemZ_R7L, SystemZ_R7H, SystemZ_R6L, SystemZ_R6H, 318 }; 319 320 // GRX32Bit Bit set. 321 static const uint8_t GRX32BitBits[] = { 322 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0xff, 0xff, 0x03, 323 }; 324 325 // FP32Bit Register Class... 326 static const MCPhysReg FP32Bit[] = { 327 SystemZ_F0S, SystemZ_F1S, SystemZ_F2S, SystemZ_F3S, SystemZ_F4S, SystemZ_F5S, SystemZ_F6S, SystemZ_F7S, SystemZ_F8S, SystemZ_F9S, SystemZ_F10S, SystemZ_F11S, SystemZ_F12S, SystemZ_F13S, SystemZ_F14S, SystemZ_F15S, 328 }; 329 330 // FP32Bit Bit set. 331 static const uint8_t FP32BitBits[] = { 332 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 333 }; 334 335 // GR32Bit Register Class... 336 static const MCPhysReg GR32Bit[] = { 337 SystemZ_R0L, SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R15L, SystemZ_R14L, SystemZ_R13L, SystemZ_R12L, SystemZ_R11L, SystemZ_R10L, SystemZ_R9L, SystemZ_R8L, SystemZ_R7L, SystemZ_R6L, 338 }; 339 340 // GR32Bit Bit set. 341 static const uint8_t GR32BitBits[] = { 342 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 343 }; 344 345 // GRH32Bit Register Class... 346 static const MCPhysReg GRH32Bit[] = { 347 SystemZ_R0H, SystemZ_R1H, SystemZ_R2H, SystemZ_R3H, SystemZ_R4H, SystemZ_R5H, SystemZ_R15H, SystemZ_R14H, SystemZ_R13H, SystemZ_R12H, SystemZ_R11H, SystemZ_R10H, SystemZ_R9H, SystemZ_R8H, SystemZ_R7H, SystemZ_R6H, 348 }; 349 350 // GRH32Bit Bit set. 351 static const uint8_t GRH32BitBits[] = { 352 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 353 }; 354 355 // ADDR32Bit Register Class... 356 static const MCPhysReg ADDR32Bit[] = { 357 SystemZ_R1L, SystemZ_R2L, SystemZ_R3L, SystemZ_R4L, SystemZ_R5L, SystemZ_R15L, SystemZ_R14L, SystemZ_R13L, SystemZ_R12L, SystemZ_R11L, SystemZ_R10L, SystemZ_R9L, SystemZ_R8L, SystemZ_R7L, SystemZ_R6L, 358 }; 359 360 // ADDR32Bit Bit set. 361 static const uint8_t ADDR32BitBits[] = { 362 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 363 }; 364 365 // CCRegs Register Class... 366 static const MCPhysReg CCRegs[] = { 367 SystemZ_CC, 368 }; 369 370 // CCRegs Bit set. 371 static const uint8_t CCRegsBits[] = { 372 0x02, 373 }; 374 375 // FP64Bit Register Class... 376 static const MCPhysReg FP64Bit[] = { 377 SystemZ_F0D, SystemZ_F1D, SystemZ_F2D, SystemZ_F3D, SystemZ_F4D, SystemZ_F5D, SystemZ_F6D, SystemZ_F7D, SystemZ_F8D, SystemZ_F9D, SystemZ_F10D, SystemZ_F11D, SystemZ_F12D, SystemZ_F13D, SystemZ_F14D, SystemZ_F15D, 378 }; 379 380 // FP64Bit Bit set. 381 static const uint8_t FP64BitBits[] = { 382 0xfc, 0xff, 0x03, 383 }; 384 385 // GR64Bit Register Class... 386 static const MCPhysReg GR64Bit[] = { 387 SystemZ_R0D, SystemZ_R1D, SystemZ_R2D, SystemZ_R3D, SystemZ_R4D, SystemZ_R5D, SystemZ_R15D, SystemZ_R14D, SystemZ_R13D, SystemZ_R12D, SystemZ_R11D, SystemZ_R10D, SystemZ_R9D, SystemZ_R8D, SystemZ_R7D, SystemZ_R6D, 388 }; 389 390 // GR64Bit Bit set. 391 static const uint8_t GR64BitBits[] = { 392 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0xff, 0x03, 393 }; 394 395 // ADDR64Bit Register Class... 396 static const MCPhysReg ADDR64Bit[] = { 397 SystemZ_R1D, SystemZ_R2D, SystemZ_R3D, SystemZ_R4D, SystemZ_R5D, SystemZ_R15D, SystemZ_R14D, SystemZ_R13D, SystemZ_R12D, SystemZ_R11D, SystemZ_R10D, SystemZ_R9D, SystemZ_R8D, SystemZ_R7D, SystemZ_R6D, 398 }; 399 400 // ADDR64Bit Bit set. 401 static const uint8_t ADDR64BitBits[] = { 402 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0xff, 0x03, 403 }; 404 405 // FP128Bit Register Class... 406 static const MCPhysReg FP128Bit[] = { 407 SystemZ_F0Q, SystemZ_F1Q, SystemZ_F4Q, SystemZ_F5Q, SystemZ_F8Q, SystemZ_F9Q, SystemZ_F12Q, SystemZ_F13Q, 408 }; 409 410 // FP128Bit Bit set. 411 static const uint8_t FP128BitBits[] = { 412 0x00, 0x00, 0xfc, 0x03, 413 }; 414 415 // GR128Bit Register Class... 416 static const MCPhysReg GR128Bit[] = { 417 SystemZ_R0Q, SystemZ_R2Q, SystemZ_R4Q, SystemZ_R12Q, SystemZ_R10Q, SystemZ_R8Q, SystemZ_R6Q, SystemZ_R14Q, 418 }; 419 420 // GR128Bit Bit set. 421 static const uint8_t GR128BitBits[] = { 422 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfc, 0x03, 423 }; 424 425 // ADDR128Bit Register Class... 426 static const MCPhysReg ADDR128Bit[] = { 427 SystemZ_R2Q, SystemZ_R4Q, SystemZ_R12Q, SystemZ_R10Q, SystemZ_R8Q, SystemZ_R6Q, SystemZ_R14Q, 428 }; 429 430 // ADDR128Bit Bit set. 431 static const uint8_t ADDR128BitBits[] = { 432 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xf8, 0x03, 433 }; 434 435static const MCRegisterClass SystemZMCRegisterClasses[] = { 436 { "GRX32Bit", GRX32Bit, GRX32BitBits, 32, sizeof(GRX32BitBits), SystemZ_GRX32BitRegClassID, 4, 4, 1, 1 }, 437 { "FP32Bit", FP32Bit, FP32BitBits, 16, sizeof(FP32BitBits), SystemZ_FP32BitRegClassID, 4, 4, 1, 1 }, 438 { "GR32Bit", GR32Bit, GR32BitBits, 16, sizeof(GR32BitBits), SystemZ_GR32BitRegClassID, 4, 4, 1, 1 }, 439 { "GRH32Bit", GRH32Bit, GRH32BitBits, 16, sizeof(GRH32BitBits), SystemZ_GRH32BitRegClassID, 4, 4, 1, 1 }, 440 { "ADDR32Bit", ADDR32Bit, ADDR32BitBits, 15, sizeof(ADDR32BitBits), SystemZ_ADDR32BitRegClassID, 4, 4, 1, 1 }, 441 { "CCRegs", CCRegs, CCRegsBits, 1, sizeof(CCRegsBits), SystemZ_CCRegsRegClassID, 4, 4, 1, 1 }, 442 { "FP64Bit", FP64Bit, FP64BitBits, 16, sizeof(FP64BitBits), SystemZ_FP64BitRegClassID, 8, 8, 1, 1 }, 443 { "GR64Bit", GR64Bit, GR64BitBits, 16, sizeof(GR64BitBits), SystemZ_GR64BitRegClassID, 8, 8, 1, 1 }, 444 { "ADDR64Bit", ADDR64Bit, ADDR64BitBits, 15, sizeof(ADDR64BitBits), SystemZ_ADDR64BitRegClassID, 8, 8, 1, 1 }, 445 { "FP128Bit", FP128Bit, FP128BitBits, 8, sizeof(FP128BitBits), SystemZ_FP128BitRegClassID, 16, 16, 1, 1 }, 446 { "GR128Bit", GR128Bit, GR128BitBits, 8, sizeof(GR128BitBits), SystemZ_GR128BitRegClassID, 16, 16, 1, 1 }, 447 { "ADDR128Bit", ADDR128Bit, ADDR128BitBits, 7, sizeof(ADDR128BitBits), SystemZ_ADDR128BitRegClassID, 16, 16, 1, 1 }, 448}; 449 450#endif // GET_REGINFO_MC_DESC 451