1 /*
2  * STM32F2XX Timer
3  *
4  * Copyright (c) 2014 Alistair Francis <alistair@alistair23.me>
5  *
6  * Permission is hereby granted, free of charge, to any person obtaining a copy
7  * of this software and associated documentation files (the "Software"), to deal
8  * in the Software without restriction, including without limitation the rights
9  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10  * copies of the Software, and to permit persons to whom the Software is
11  * furnished to do so, subject to the following conditions:
12  *
13  * The above copyright notice and this permission notice shall be included in
14  * all copies or substantial portions of the Software.
15  *
16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22  * THE SOFTWARE.
23  */
24 
25 #ifndef HW_STM32F2XX_TIMER_H
26 #define HW_STM32F2XX_TIMER_H
27 
28 #include "hw/sysbus.h"
29 #include "qemu/timer.h"
30 
31 #define TIM_CR1      0x00
32 #define TIM_CR2      0x04
33 #define TIM_SMCR     0x08
34 #define TIM_DIER     0x0C
35 #define TIM_SR       0x10
36 #define TIM_EGR      0x14
37 #define TIM_CCMR1    0x18
38 #define TIM_CCMR2    0x1C
39 #define TIM_CCER     0x20
40 #define TIM_CNT      0x24
41 #define TIM_PSC      0x28
42 #define TIM_ARR      0x2C
43 #define TIM_CCR1     0x34
44 #define TIM_CCR2     0x38
45 #define TIM_CCR3     0x3C
46 #define TIM_CCR4     0x40
47 #define TIM_DCR      0x48
48 #define TIM_DMAR     0x4C
49 #define TIM_OR       0x50
50 
51 #define TIM_CR1_CEN   1
52 
53 #define TIM_EGR_UG 1
54 
55 #define TIM_CCER_CC2E   (1 << 4)
56 #define TIM_CCMR1_OC2M2 (1 << 14)
57 #define TIM_CCMR1_OC2M1 (1 << 13)
58 #define TIM_CCMR1_OC2M0 (1 << 12)
59 #define TIM_CCMR1_OC2PE (1 << 11)
60 
61 #define TIM_DIER_UIE  1
62 
63 #define TYPE_STM32F2XX_TIMER "stm32f2xx-timer"
64 #define STM32F2XXTIMER(obj) OBJECT_CHECK(STM32F2XXTimerState, \
65                             (obj), TYPE_STM32F2XX_TIMER)
66 
67 typedef struct STM32F2XXTimerState {
68     /* <private> */
69     SysBusDevice parent_obj;
70 
71     /* <public> */
72     MemoryRegion iomem;
73     QEMUTimer *timer;
74     qemu_irq irq;
75 
76     int64_t tick_offset;
77     uint64_t hit_time;
78     uint64_t freq_hz;
79 
80     uint32_t tim_cr1;
81     uint32_t tim_cr2;
82     uint32_t tim_smcr;
83     uint32_t tim_dier;
84     uint32_t tim_sr;
85     uint32_t tim_egr;
86     uint32_t tim_ccmr1;
87     uint32_t tim_ccmr2;
88     uint32_t tim_ccer;
89     uint32_t tim_psc;
90     uint32_t tim_arr;
91     uint32_t tim_ccr1;
92     uint32_t tim_ccr2;
93     uint32_t tim_ccr3;
94     uint32_t tim_ccr4;
95     uint32_t tim_dcr;
96     uint32_t tim_dmar;
97     uint32_t tim_or;
98 } STM32F2XXTimerState;
99 
100 #endif /* HW_STM32F2XX_TIMER_H */
101