1.. _skiboot-5.4.5: 2 3============= 4skiboot-5.4.5 5============= 6 7skiboot-5.4.5 was released on Friday June 9th, 2017. It replaces 8:ref:`skiboot-5.4.4` as the current stable release in the 5.4.x series. 9 10Over :ref:`skiboot-5.4.4`, we have a small number of bug fixes: 11 12 13- On FSP platforms: notify FSP of Platform Log ID after Host Initiated Reset Reload 14 Trigging a Host Initiated Reset (when the host detects the FSP has gone 15 out to lunch and should be rebooted), would cause "Unknown Command" messages 16 to appear in the OPAL log. 17 18 This patch implements those messages. 19 20 Log showing unknown command: :: 21 22 / # cat /sys/firmware/opal/msglog | grep -i ,3 23 [ 110.232114723,3] FSP: fsp_trigger_reset() entry 24 [ 188.431793837,3] FSP #0: Link down, starting R&R 25 [ 464.109239162,3] FSP #0: Got XUP with no pending message ! 26 [ 466.340598554,3] FSP-DPO: Unknown command 0xce0900 27 [ 466.340600126,3] FSP: Unhandled message ce0900 28 29- hw/i2c: Fix early lock drop 30 31 When interacting with an I2C master the p8-i2c driver (common to p9) 32 aquires a per-master lock which it holds for the duration of it's 33 interaction with the master. Unfortunately, when 34 p8_i2c_check_initial_status() detects that the master is busy with 35 another transaction it drops the lock and returns OPAL_BUSY. This is 36 contrary to the driver's locking strategy which requires that the 37 caller aquire and drop the lock. This leads to a crash due to the 38 double unlock(), which skiboot treats as fatal. 39 40- head.S: store all of LR and CTR 41 42 When saving the CTR and LR registers the skiboot exception handlers use the 43 'stw' instruction which only saves the lower 32 bits of the register. Given 44 these are both 64 bit registers this leads to some strange register dumps, 45 for example: :: 46 47 *********************************************** 48 Unexpected exception 200 ! 49 SRR0 : 0000000030016968 SRR1 : 9000000000201000 50 HSRR0: 0000000000000180 HSRR1: 9000000000001000 51 LR : 3003438830823f50 CTR : 3003438800000018 52 CFAR : 00000000300168fc 53 CR : 40004208 XER: 00000000 54 55 In this dump the upper 32 bits of LR and CTR are actually stack gunk 56 which obscures the underlying issue. 57