1 /*
2  * (C) Copyright 2007
3  * Sascha Hauer, Pengutronix
4  *
5  * (C) Copyright 2009 Freescale Semiconductor, Inc.
6  *
7  * See file CREDITS for list of people who contributed to this
8  * project.
9  *
10  * This program is free software; you can redistribute it and/or
11  * modify it under the terms of the GNU General Public License as
12  * published by the Free Software Foundation; either version 2 of
13  * the License, or (at your option) any later version.
14  *
15  * This program is distributed in the hope that it will be useful,
16  * but WITHOUT ANY WARRANTY; without even the implied warranty of
17  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
18  * GNU General Public License for more details.
19  *
20  * You should have received a copy of the GNU General Public License
21  * along with this program; if not, write to the Free Software
22  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
23  * MA 02111-1307 USA
24  */
25 
26 #include <common.h>
27 #include <asm/arch/imx-regs.h>
28 #include <asm/arch/clock.h>
29 #include <asm/errno.h>
30 #include <asm/io.h>
31 
32 #ifdef CONFIG_FSL_ESDHC
33 #include <fsl_esdhc.h>
34 #endif
35 
get_cpu_rev(void)36 u32 get_cpu_rev(void)
37 {
38 	int reg;
39 	int system_rev;
40 
41 	reg = __raw_readl(ROM_SI_REV);
42 	switch (reg) {
43 	case 0x02:
44 		system_rev = 0x51000 | CHIP_REV_1_1;
45 		break;
46 	case 0x10:
47 		if ((__raw_readl(GPIO1_BASE_ADDR + 0x0) & (0x1 << 22)) == 0)
48 			system_rev = 0x51000 | CHIP_REV_2_5;
49 		else
50 			system_rev = 0x51000 | CHIP_REV_2_0;
51 		break;
52 	case 0x20:
53 		system_rev = 0x51000 | CHIP_REV_3_0;
54 		break;
55 	return system_rev;
56 	default:
57 		system_rev = 0x51000 | CHIP_REV_1_0;
58 		break;
59 	}
60 	return system_rev;
61 }
62 
63 
64 #if defined(CONFIG_DISPLAY_CPUINFO)
print_cpuinfo(void)65 int print_cpuinfo(void)
66 {
67 	u32 cpurev;
68 
69 	cpurev = get_cpu_rev();
70 	printf("CPU:   Freescale i.MX51 family rev%d.%d at %d MHz\n",
71 		(cpurev & 0xF0) >> 4,
72 		(cpurev & 0x0F) >> 4,
73 		mxc_get_clock(MXC_ARM_CLK) / 1000000);
74 	return 0;
75 }
76 #endif
77 
78 /*
79  * Initializes on-chip ethernet controllers.
80  * to override, implement board_eth_init()
81  */
82 #if defined(CONFIG_FEC_MXC)
83 extern int fecmxc_initialize(bd_t *bis);
84 #endif
85 
cpu_eth_init(bd_t * bis)86 int cpu_eth_init(bd_t *bis)
87 {
88 	int rc = -ENODEV;
89 
90 #if defined(CONFIG_FEC_MXC)
91 	rc = fecmxc_initialize(bis);
92 #endif
93 
94 	return rc;
95 }
96 
97 /*
98  * Initializes on-chip MMC controllers.
99  * to override, implement board_mmc_init()
100  */
cpu_mmc_init(bd_t * bis)101 int cpu_mmc_init(bd_t *bis)
102 {
103 #ifdef CONFIG_FSL_ESDHC
104 	return fsl_esdhc_mmc_init(bis);
105 #else
106 	return 0;
107 #endif
108 }
109 
110 
reset_cpu(ulong addr)111 void reset_cpu(ulong addr)
112 {
113 	__raw_writew(4, WDOG1_BASE_ADDR);
114 }
115