1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2017, STMicroelectronics - All Rights Reserved
4  * Author(s): Patrice Chotard, <patrice.chotard@st.com> for STMicroelectronics.
5  */
6 
7 #ifndef __DWC3_STI_UBOOT_H_
8 #define __DWC3_STI_UBOOT_H_
9 
10 /* glue registers */
11 #define CLKRST_CTRL		0x00
12 #define AUX_CLK_EN		BIT(0)
13 #define SW_PIPEW_RESET_N	BIT(4)
14 #define EXT_CFG_RESET_N		BIT(8)
15 
16 #define XHCI_REVISION		BIT(12)
17 
18 #define USB2_VBUS_MNGMNT_SEL1	0x2C
19 #define USB2_VBUS_UTMIOTG	0x1
20 
21 #define SEL_OVERRIDE_VBUSVALID(n)	((n) << 0)
22 #define SEL_OVERRIDE_POWERPRESENT(n)	((n) << 4)
23 #define SEL_OVERRIDE_BVALID(n)		((n) << 8)
24 
25 /* Static DRD configuration */
26 #define USB3_CONTROL_MASK		0xf77
27 
28 #define USB3_DEVICE_NOT_HOST		BIT(0)
29 #define USB3_FORCE_VBUSVALID		BIT(1)
30 #define USB3_DELAY_VBUSVALID		BIT(2)
31 #define USB3_SEL_FORCE_OPMODE		BIT(4)
32 #define USB3_FORCE_OPMODE(n)		((n) << 5)
33 #define USB3_SEL_FORCE_DPPULLDOWN2	BIT(8)
34 #define USB3_FORCE_DPPULLDOWN2		BIT(9)
35 #define USB3_SEL_FORCE_DMPULLDOWN2	BIT(10)
36 #define USB3_FORCE_DMPULLDOWN2		BIT(11)
37 
38 int sti_dwc3_init(enum usb_dr_mode mode);
39 
40 #endif /* __DWC3_STI_UBOOT_H_ */
41