1/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 2|* *| 3|*Target Register Enum Values *| 4|* *| 5|* Automatically generated file, do not edit! *| 6|* *| 7\*===----------------------------------------------------------------------===*/ 8 9/* Capstone Disassembly Engine */ 10/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2014 */ 11 12 13#ifdef GET_REGINFO_ENUM 14#undef GET_REGINFO_ENUM 15 16enum { 17 PPC_NoRegister, 18 PPC_BP = 1, 19 PPC_CARRY = 2, 20 PPC_CC = 3, 21 PPC_CTR = 4, 22 PPC_FP = 5, 23 PPC_LR = 6, 24 PPC_RM = 7, 25 PPC_VRSAVE = 8, 26 PPC_ZERO = 9, 27 PPC_BP8 = 10, 28 PPC_CR0 = 11, 29 PPC_CR1 = 12, 30 PPC_CR2 = 13, 31 PPC_CR3 = 14, 32 PPC_CR4 = 15, 33 PPC_CR5 = 16, 34 PPC_CR6 = 17, 35 PPC_CR7 = 18, 36 PPC_CTR8 = 19, 37 PPC_F0 = 20, 38 PPC_F1 = 21, 39 PPC_F2 = 22, 40 PPC_F3 = 23, 41 PPC_F4 = 24, 42 PPC_F5 = 25, 43 PPC_F6 = 26, 44 PPC_F7 = 27, 45 PPC_F8 = 28, 46 PPC_F9 = 29, 47 PPC_F10 = 30, 48 PPC_F11 = 31, 49 PPC_F12 = 32, 50 PPC_F13 = 33, 51 PPC_F14 = 34, 52 PPC_F15 = 35, 53 PPC_F16 = 36, 54 PPC_F17 = 37, 55 PPC_F18 = 38, 56 PPC_F19 = 39, 57 PPC_F20 = 40, 58 PPC_F21 = 41, 59 PPC_F22 = 42, 60 PPC_F23 = 43, 61 PPC_F24 = 44, 62 PPC_F25 = 45, 63 PPC_F26 = 46, 64 PPC_F27 = 47, 65 PPC_F28 = 48, 66 PPC_F29 = 49, 67 PPC_F30 = 50, 68 PPC_F31 = 51, 69 PPC_FP8 = 52, 70 PPC_LR8 = 53, 71 PPC_R0 = 54, 72 PPC_R1 = 55, 73 PPC_R2 = 56, 74 PPC_R3 = 57, 75 PPC_R4 = 58, 76 PPC_R5 = 59, 77 PPC_R6 = 60, 78 PPC_R7 = 61, 79 PPC_R8 = 62, 80 PPC_R9 = 63, 81 PPC_R10 = 64, 82 PPC_R11 = 65, 83 PPC_R12 = 66, 84 PPC_R13 = 67, 85 PPC_R14 = 68, 86 PPC_R15 = 69, 87 PPC_R16 = 70, 88 PPC_R17 = 71, 89 PPC_R18 = 72, 90 PPC_R19 = 73, 91 PPC_R20 = 74, 92 PPC_R21 = 75, 93 PPC_R22 = 76, 94 PPC_R23 = 77, 95 PPC_R24 = 78, 96 PPC_R25 = 79, 97 PPC_R26 = 80, 98 PPC_R27 = 81, 99 PPC_R28 = 82, 100 PPC_R29 = 83, 101 PPC_R30 = 84, 102 PPC_R31 = 85, 103 PPC_V0 = 86, 104 PPC_V1 = 87, 105 PPC_V2 = 88, 106 PPC_V3 = 89, 107 PPC_V4 = 90, 108 PPC_V5 = 91, 109 PPC_V6 = 92, 110 PPC_V7 = 93, 111 PPC_V8 = 94, 112 PPC_V9 = 95, 113 PPC_V10 = 96, 114 PPC_V11 = 97, 115 PPC_V12 = 98, 116 PPC_V13 = 99, 117 PPC_V14 = 100, 118 PPC_V15 = 101, 119 PPC_V16 = 102, 120 PPC_V17 = 103, 121 PPC_V18 = 104, 122 PPC_V19 = 105, 123 PPC_V20 = 106, 124 PPC_V21 = 107, 125 PPC_V22 = 108, 126 PPC_V23 = 109, 127 PPC_V24 = 110, 128 PPC_V25 = 111, 129 PPC_V26 = 112, 130 PPC_V27 = 113, 131 PPC_V28 = 114, 132 PPC_V29 = 115, 133 PPC_V30 = 116, 134 PPC_V31 = 117, 135 PPC_VF0 = 118, 136 PPC_VF1 = 119, 137 PPC_VF2 = 120, 138 PPC_VF3 = 121, 139 PPC_VF4 = 122, 140 PPC_VF5 = 123, 141 PPC_VF6 = 124, 142 PPC_VF7 = 125, 143 PPC_VF8 = 126, 144 PPC_VF9 = 127, 145 PPC_VF10 = 128, 146 PPC_VF11 = 129, 147 PPC_VF12 = 130, 148 PPC_VF13 = 131, 149 PPC_VF14 = 132, 150 PPC_VF15 = 133, 151 PPC_VF16 = 134, 152 PPC_VF17 = 135, 153 PPC_VF18 = 136, 154 PPC_VF19 = 137, 155 PPC_VF20 = 138, 156 PPC_VF21 = 139, 157 PPC_VF22 = 140, 158 PPC_VF23 = 141, 159 PPC_VF24 = 142, 160 PPC_VF25 = 143, 161 PPC_VF26 = 144, 162 PPC_VF27 = 145, 163 PPC_VF28 = 146, 164 PPC_VF29 = 147, 165 PPC_VF30 = 148, 166 PPC_VF31 = 149, 167 PPC_VSH0 = 150, 168 PPC_VSH1 = 151, 169 PPC_VSH2 = 152, 170 PPC_VSH3 = 153, 171 PPC_VSH4 = 154, 172 PPC_VSH5 = 155, 173 PPC_VSH6 = 156, 174 PPC_VSH7 = 157, 175 PPC_VSH8 = 158, 176 PPC_VSH9 = 159, 177 PPC_VSH10 = 160, 178 PPC_VSH11 = 161, 179 PPC_VSH12 = 162, 180 PPC_VSH13 = 163, 181 PPC_VSH14 = 164, 182 PPC_VSH15 = 165, 183 PPC_VSH16 = 166, 184 PPC_VSH17 = 167, 185 PPC_VSH18 = 168, 186 PPC_VSH19 = 169, 187 PPC_VSH20 = 170, 188 PPC_VSH21 = 171, 189 PPC_VSH22 = 172, 190 PPC_VSH23 = 173, 191 PPC_VSH24 = 174, 192 PPC_VSH25 = 175, 193 PPC_VSH26 = 176, 194 PPC_VSH27 = 177, 195 PPC_VSH28 = 178, 196 PPC_VSH29 = 179, 197 PPC_VSH30 = 180, 198 PPC_VSH31 = 181, 199 PPC_VSL0 = 182, 200 PPC_VSL1 = 183, 201 PPC_VSL2 = 184, 202 PPC_VSL3 = 185, 203 PPC_VSL4 = 186, 204 PPC_VSL5 = 187, 205 PPC_VSL6 = 188, 206 PPC_VSL7 = 189, 207 PPC_VSL8 = 190, 208 PPC_VSL9 = 191, 209 PPC_VSL10 = 192, 210 PPC_VSL11 = 193, 211 PPC_VSL12 = 194, 212 PPC_VSL13 = 195, 213 PPC_VSL14 = 196, 214 PPC_VSL15 = 197, 215 PPC_VSL16 = 198, 216 PPC_VSL17 = 199, 217 PPC_VSL18 = 200, 218 PPC_VSL19 = 201, 219 PPC_VSL20 = 202, 220 PPC_VSL21 = 203, 221 PPC_VSL22 = 204, 222 PPC_VSL23 = 205, 223 PPC_VSL24 = 206, 224 PPC_VSL25 = 207, 225 PPC_VSL26 = 208, 226 PPC_VSL27 = 209, 227 PPC_VSL28 = 210, 228 PPC_VSL29 = 211, 229 PPC_VSL30 = 212, 230 PPC_VSL31 = 213, 231 PPC_X0 = 214, 232 PPC_X1 = 215, 233 PPC_X2 = 216, 234 PPC_X3 = 217, 235 PPC_X4 = 218, 236 PPC_X5 = 219, 237 PPC_X6 = 220, 238 PPC_X7 = 221, 239 PPC_X8 = 222, 240 PPC_X9 = 223, 241 PPC_X10 = 224, 242 PPC_X11 = 225, 243 PPC_X12 = 226, 244 PPC_X13 = 227, 245 PPC_X14 = 228, 246 PPC_X15 = 229, 247 PPC_X16 = 230, 248 PPC_X17 = 231, 249 PPC_X18 = 232, 250 PPC_X19 = 233, 251 PPC_X20 = 234, 252 PPC_X21 = 235, 253 PPC_X22 = 236, 254 PPC_X23 = 237, 255 PPC_X24 = 238, 256 PPC_X25 = 239, 257 PPC_X26 = 240, 258 PPC_X27 = 241, 259 PPC_X28 = 242, 260 PPC_X29 = 243, 261 PPC_X30 = 244, 262 PPC_X31 = 245, 263 PPC_ZERO8 = 246, 264 PPC_CR0EQ = 247, 265 PPC_CR1EQ = 248, 266 PPC_CR2EQ = 249, 267 PPC_CR3EQ = 250, 268 PPC_CR4EQ = 251, 269 PPC_CR5EQ = 252, 270 PPC_CR6EQ = 253, 271 PPC_CR7EQ = 254, 272 PPC_CR0GT = 255, 273 PPC_CR1GT = 256, 274 PPC_CR2GT = 257, 275 PPC_CR3GT = 258, 276 PPC_CR4GT = 259, 277 PPC_CR5GT = 260, 278 PPC_CR6GT = 261, 279 PPC_CR7GT = 262, 280 PPC_CR0LT = 263, 281 PPC_CR1LT = 264, 282 PPC_CR2LT = 265, 283 PPC_CR3LT = 266, 284 PPC_CR4LT = 267, 285 PPC_CR5LT = 268, 286 PPC_CR6LT = 269, 287 PPC_CR7LT = 270, 288 PPC_CR0UN = 271, 289 PPC_CR1UN = 272, 290 PPC_CR2UN = 273, 291 PPC_CR3UN = 274, 292 PPC_CR4UN = 275, 293 PPC_CR5UN = 276, 294 PPC_CR6UN = 277, 295 PPC_CR7UN = 278, 296 PPC_NUM_TARGET_REGS // 279 297}; 298 299// Register classes 300enum { 301 PPC_GPRCRegClassID = 0, 302 PPC_GPRC_NOR0RegClassID = 1, 303 PPC_GPRC_and_GPRC_NOR0RegClassID = 2, 304 PPC_CRBITRCRegClassID = 3, 305 PPC_F4RCRegClassID = 4, 306 PPC_CRRCRegClassID = 5, 307 PPC_CARRYRCRegClassID = 6, 308 PPC_CCRCRegClassID = 7, 309 PPC_CTRRCRegClassID = 8, 310 PPC_VRSAVERCRegClassID = 9, 311 PPC_VSFRCRegClassID = 10, 312 PPC_G8RCRegClassID = 11, 313 PPC_G8RC_NOX0RegClassID = 12, 314 PPC_G8RC_and_G8RC_NOX0RegClassID = 13, 315 PPC_F8RCRegClassID = 14, 316 PPC_VFRCRegClassID = 15, 317 PPC_CTRRC8RegClassID = 16, 318 PPC_VSRCRegClassID = 17, 319 PPC_VRRCRegClassID = 18, 320 PPC_VSHRCRegClassID = 19, 321 PPC_VSLRCRegClassID = 20 322}; 323 324// Subregister indices 325enum { 326 PPC_NoSubRegister, 327 PPC_sub_32, // 1 328 PPC_sub_64, // 2 329 PPC_sub_128, // 3 330 PPC_sub_eq, // 4 331 PPC_sub_gt, // 5 332 PPC_sub_lt, // 6 333 PPC_sub_un, // 7 334 PPC_NUM_TARGET_SUBREGS 335}; 336#endif // GET_REGINFO_ENUM 337 338/*===- TableGen'erated file -------------------------------------*- C++ -*-===*\ 339|* *| 340|*MC Register Information *| 341|* *| 342|* Automatically generated file, do not edit! *| 343|* *| 344\*===----------------------------------------------------------------------===*/ 345 346 347#ifdef GET_REGINFO_MC_DESC 348#undef GET_REGINFO_MC_DESC 349 350static const MCPhysReg PPCRegDiffLists[] = { 351 /* 0 */ 0, 0, 352 /* 2 */ 2, 1, 1, 1, 1, 1, 1, 1, 0, 353 /* 11 */ 65527, 14, 1, 1, 1, 0, 354 /* 17 */ 65527, 17, 1, 1, 1, 0, 355 /* 23 */ 65527, 20, 1, 1, 1, 0, 356 /* 29 */ 65527, 23, 1, 1, 1, 0, 357 /* 35 */ 65527, 26, 1, 1, 1, 0, 358 /* 41 */ 65527, 29, 1, 1, 1, 0, 359 /* 47 */ 65527, 32, 1, 1, 1, 0, 360 /* 53 */ 65527, 35, 1, 1, 1, 0, 361 /* 59 */ 6, 0, 362 /* 61 */ 9, 0, 363 /* 63 */ 11, 0, 364 /* 65 */ 252, 65528, 65528, 24, 0, 365 /* 70 */ 28, 0, 366 /* 72 */ 29, 0, 367 /* 74 */ 65472, 32, 0, 368 /* 77 */ 47, 0, 369 /* 79 */ 65504, 64, 0, 370 /* 82 */ 160, 0, 371 /* 84 */ 162, 0, 372 /* 86 */ 237, 0, 373 /* 88 */ 64471, 0, 374 /* 90 */ 64500, 0, 375 /* 92 */ 64533, 0, 376 /* 94 */ 64566, 0, 377 /* 96 */ 64813, 0, 378 /* 98 */ 65276, 0, 379 /* 100 */ 65284, 0, 380 /* 102 */ 65292, 0, 381 /* 104 */ 65299, 0, 382 /* 106 */ 65300, 0, 383 /* 108 */ 65374, 0, 384 /* 110 */ 65376, 0, 385 /* 112 */ 65403, 0, 386 /* 114 */ 65404, 0, 387 /* 116 */ 65489, 0, 388 /* 118 */ 65500, 0, 389 /* 120 */ 65527, 0, 390 /* 122 */ 65532, 0, 391 /* 124 */ 65535, 0, 392}; 393 394static const uint16_t PPCSubRegIdxLists[] = { 395 /* 0 */ 1, 0, 396 /* 2 */ 3, 2, 0, 397 /* 5 */ 6, 5, 4, 7, 0, 398}; 399 400static const MCRegisterDesc PPCRegDesc[] = { // Descriptors 401 { 4, 0, 0, 0, 0 }, 402 { 962, 1, 61, 1, 1985 }, 403 { 1119, 1, 1, 1, 1985 }, 404 { 896, 1, 1, 1, 32 }, 405 { 1019, 1, 1, 1, 945 }, 406 { 965, 1, 77, 1, 945 }, 407 { 1016, 1, 1, 1, 945 }, 408 { 906, 1, 1, 1, 945 }, 409 { 899, 1, 1, 1, 945 }, 410 { 957, 1, 86, 1, 945 }, 411 { 792, 120, 1, 0, 0 }, 412 { 101, 65, 1, 5, 177 }, 413 { 212, 65, 1, 5, 273 }, 414 { 294, 65, 1, 5, 369 }, 415 { 376, 65, 1, 5, 465 }, 416 { 458, 65, 1, 5, 561 }, 417 { 540, 65, 1, 5, 657 }, 418 { 622, 65, 1, 5, 753 }, 419 { 704, 65, 1, 5, 849 }, 420 { 804, 1, 1, 1, 1153 }, 421 { 88, 1, 84, 1, 1153 }, 422 { 199, 1, 84, 1, 1153 }, 423 { 281, 1, 84, 1, 1153 }, 424 { 363, 1, 84, 1, 1153 }, 425 { 445, 1, 84, 1, 1153 }, 426 { 527, 1, 84, 1, 1153 }, 427 { 609, 1, 84, 1, 1153 }, 428 { 691, 1, 84, 1, 1153 }, 429 { 773, 1, 84, 1, 1153 }, 430 { 874, 1, 84, 1, 1153 }, 431 { 1, 1, 84, 1, 1153 }, 432 { 112, 1, 84, 1, 1153 }, 433 { 223, 1, 84, 1, 1153 }, 434 { 305, 1, 84, 1, 1153 }, 435 { 387, 1, 84, 1, 1153 }, 436 { 469, 1, 84, 1, 1153 }, 437 { 551, 1, 84, 1, 1153 }, 438 { 633, 1, 84, 1, 1153 }, 439 { 715, 1, 84, 1, 1153 }, 440 { 816, 1, 84, 1, 1153 }, 441 { 30, 1, 84, 1, 1153 }, 442 { 141, 1, 84, 1, 1153 }, 443 { 252, 1, 84, 1, 1153 }, 444 { 334, 1, 84, 1, 1153 }, 445 { 416, 1, 84, 1, 1153 }, 446 { 498, 1, 84, 1, 1153 }, 447 { 580, 1, 84, 1, 1153 }, 448 { 662, 1, 84, 1, 1153 }, 449 { 744, 1, 84, 1, 1153 }, 450 { 845, 1, 84, 1, 1153 }, 451 { 59, 1, 84, 1, 1153 }, 452 { 170, 1, 84, 1, 1153 }, 453 { 796, 116, 1, 0, 1008 }, 454 { 800, 1, 1, 1, 1121 }, 455 { 102, 1, 82, 1, 1121 }, 456 { 213, 1, 82, 1, 1121 }, 457 { 295, 1, 82, 1, 1121 }, 458 { 377, 1, 82, 1, 1121 }, 459 { 459, 1, 82, 1, 1121 }, 460 { 541, 1, 82, 1, 1121 }, 461 { 623, 1, 82, 1, 1121 }, 462 { 705, 1, 82, 1, 1121 }, 463 { 801, 1, 82, 1, 1121 }, 464 { 887, 1, 82, 1, 1121 }, 465 { 17, 1, 82, 1, 1121 }, 466 { 128, 1, 82, 1, 1121 }, 467 { 239, 1, 82, 1, 1121 }, 468 { 321, 1, 82, 1, 1121 }, 469 { 403, 1, 82, 1, 1121 }, 470 { 485, 1, 82, 1, 1121 }, 471 { 567, 1, 82, 1, 1121 }, 472 { 649, 1, 82, 1, 1121 }, 473 { 731, 1, 82, 1, 1121 }, 474 { 832, 1, 82, 1, 1121 }, 475 { 46, 1, 82, 1, 1121 }, 476 { 157, 1, 82, 1, 1121 }, 477 { 268, 1, 82, 1, 1121 }, 478 { 350, 1, 82, 1, 1121 }, 479 { 432, 1, 82, 1, 1121 }, 480 { 514, 1, 82, 1, 1121 }, 481 { 596, 1, 82, 1, 1121 }, 482 { 678, 1, 82, 1, 1121 }, 483 { 760, 1, 82, 1, 1121 }, 484 { 861, 1, 82, 1, 1121 }, 485 { 75, 1, 82, 1, 1121 }, 486 { 186, 1, 82, 1, 1121 }, 487 { 105, 75, 80, 3, 1121 }, 488 { 216, 75, 80, 3, 1121 }, 489 { 298, 75, 80, 3, 1121 }, 490 { 380, 75, 80, 3, 1121 }, 491 { 462, 75, 80, 3, 1121 }, 492 { 544, 75, 80, 3, 1121 }, 493 { 626, 75, 80, 3, 1121 }, 494 { 708, 75, 80, 3, 1121 }, 495 { 809, 75, 80, 3, 1121 }, 496 { 890, 75, 80, 3, 1121 }, 497 { 21, 75, 80, 3, 1121 }, 498 { 132, 75, 80, 3, 1121 }, 499 { 243, 75, 80, 3, 1121 }, 500 { 325, 75, 80, 3, 1121 }, 501 { 407, 75, 80, 3, 1121 }, 502 { 489, 75, 80, 3, 1121 }, 503 { 571, 75, 80, 3, 1121 }, 504 { 653, 75, 80, 3, 1121 }, 505 { 735, 75, 80, 3, 1121 }, 506 { 836, 75, 80, 3, 1121 }, 507 { 50, 75, 80, 3, 1121 }, 508 { 161, 75, 80, 3, 1121 }, 509 { 272, 75, 80, 3, 1121 }, 510 { 354, 75, 80, 3, 1121 }, 511 { 436, 75, 80, 3, 1121 }, 512 { 518, 75, 80, 3, 1121 }, 513 { 600, 75, 80, 3, 1121 }, 514 { 682, 75, 80, 3, 1121 }, 515 { 764, 75, 80, 3, 1121 }, 516 { 865, 75, 80, 3, 1121 }, 517 { 79, 75, 80, 3, 1121 }, 518 { 190, 75, 80, 3, 1121 }, 519 { 87, 1, 79, 1, 1953 }, 520 { 198, 1, 79, 1, 1953 }, 521 { 280, 1, 79, 1, 1953 }, 522 { 362, 1, 79, 1, 1953 }, 523 { 444, 1, 79, 1, 1953 }, 524 { 526, 1, 79, 1, 1953 }, 525 { 608, 1, 79, 1, 1953 }, 526 { 690, 1, 79, 1, 1953 }, 527 { 772, 1, 79, 1, 1953 }, 528 { 873, 1, 79, 1, 1953 }, 529 { 0, 1, 79, 1, 1953 }, 530 { 111, 1, 79, 1, 1953 }, 531 { 222, 1, 79, 1, 1953 }, 532 { 304, 1, 79, 1, 1953 }, 533 { 386, 1, 79, 1, 1953 }, 534 { 468, 1, 79, 1, 1953 }, 535 { 550, 1, 79, 1, 1953 }, 536 { 632, 1, 79, 1, 1953 }, 537 { 714, 1, 79, 1, 1953 }, 538 { 815, 1, 79, 1, 1953 }, 539 { 29, 1, 79, 1, 1953 }, 540 { 140, 1, 79, 1, 1953 }, 541 { 251, 1, 79, 1, 1953 }, 542 { 333, 1, 79, 1, 1953 }, 543 { 415, 1, 79, 1, 1953 }, 544 { 497, 1, 79, 1, 1953 }, 545 { 579, 1, 79, 1, 1953 }, 546 { 661, 1, 79, 1, 1953 }, 547 { 743, 1, 79, 1, 1953 }, 548 { 844, 1, 79, 1, 1953 }, 549 { 58, 1, 79, 1, 1953 }, 550 { 169, 1, 79, 1, 1953 }, 551 { 91, 74, 1, 2, 1889 }, 552 { 202, 74, 1, 2, 1889 }, 553 { 284, 74, 1, 2, 1889 }, 554 { 366, 74, 1, 2, 1889 }, 555 { 448, 74, 1, 2, 1889 }, 556 { 530, 74, 1, 2, 1889 }, 557 { 612, 74, 1, 2, 1889 }, 558 { 694, 74, 1, 2, 1889 }, 559 { 776, 74, 1, 2, 1889 }, 560 { 877, 74, 1, 2, 1889 }, 561 { 5, 74, 1, 2, 1889 }, 562 { 116, 74, 1, 2, 1889 }, 563 { 227, 74, 1, 2, 1889 }, 564 { 309, 74, 1, 2, 1889 }, 565 { 391, 74, 1, 2, 1889 }, 566 { 473, 74, 1, 2, 1889 }, 567 { 555, 74, 1, 2, 1889 }, 568 { 637, 74, 1, 2, 1889 }, 569 { 719, 74, 1, 2, 1889 }, 570 { 820, 74, 1, 2, 1889 }, 571 { 34, 74, 1, 2, 1889 }, 572 { 145, 74, 1, 2, 1889 }, 573 { 256, 74, 1, 2, 1889 }, 574 { 338, 74, 1, 2, 1889 }, 575 { 420, 74, 1, 2, 1889 }, 576 { 502, 74, 1, 2, 1889 }, 577 { 584, 74, 1, 2, 1889 }, 578 { 666, 74, 1, 2, 1889 }, 579 { 748, 74, 1, 2, 1889 }, 580 { 849, 74, 1, 2, 1889 }, 581 { 63, 74, 1, 2, 1889 }, 582 { 174, 74, 1, 2, 1889 }, 583 { 96, 108, 1, 3, 1793 }, 584 { 207, 108, 1, 3, 1793 }, 585 { 289, 108, 1, 3, 1793 }, 586 { 371, 108, 1, 3, 1793 }, 587 { 453, 108, 1, 3, 1793 }, 588 { 535, 108, 1, 3, 1793 }, 589 { 617, 108, 1, 3, 1793 }, 590 { 699, 108, 1, 3, 1793 }, 591 { 781, 108, 1, 3, 1793 }, 592 { 882, 108, 1, 3, 1793 }, 593 { 11, 108, 1, 3, 1793 }, 594 { 122, 108, 1, 3, 1793 }, 595 { 233, 108, 1, 3, 1793 }, 596 { 315, 108, 1, 3, 1793 }, 597 { 397, 108, 1, 3, 1793 }, 598 { 479, 108, 1, 3, 1793 }, 599 { 561, 108, 1, 3, 1793 }, 600 { 643, 108, 1, 3, 1793 }, 601 { 725, 108, 1, 3, 1793 }, 602 { 826, 108, 1, 3, 1793 }, 603 { 40, 108, 1, 3, 1793 }, 604 { 151, 108, 1, 3, 1793 }, 605 { 262, 108, 1, 3, 1793 }, 606 { 344, 108, 1, 3, 1793 }, 607 { 426, 108, 1, 3, 1793 }, 608 { 508, 108, 1, 3, 1793 }, 609 { 590, 108, 1, 3, 1793 }, 610 { 672, 108, 1, 3, 1793 }, 611 { 754, 108, 1, 3, 1793 }, 612 { 855, 108, 1, 3, 1793 }, 613 { 69, 108, 1, 3, 1793 }, 614 { 180, 108, 1, 3, 1793 }, 615 { 108, 110, 1, 0, 1825 }, 616 { 219, 110, 1, 0, 1825 }, 617 { 301, 110, 1, 0, 1825 }, 618 { 383, 110, 1, 0, 1825 }, 619 { 465, 110, 1, 0, 1825 }, 620 { 547, 110, 1, 0, 1825 }, 621 { 629, 110, 1, 0, 1825 }, 622 { 711, 110, 1, 0, 1825 }, 623 { 812, 110, 1, 0, 1825 }, 624 { 893, 110, 1, 0, 1825 }, 625 { 25, 110, 1, 0, 1825 }, 626 { 136, 110, 1, 0, 1825 }, 627 { 247, 110, 1, 0, 1825 }, 628 { 329, 110, 1, 0, 1825 }, 629 { 411, 110, 1, 0, 1825 }, 630 { 493, 110, 1, 0, 1825 }, 631 { 575, 110, 1, 0, 1825 }, 632 { 657, 110, 1, 0, 1825 }, 633 { 739, 110, 1, 0, 1825 }, 634 { 840, 110, 1, 0, 1825 }, 635 { 54, 110, 1, 0, 1825 }, 636 { 165, 110, 1, 0, 1825 }, 637 { 276, 110, 1, 0, 1825 }, 638 { 358, 110, 1, 0, 1825 }, 639 { 440, 110, 1, 0, 1825 }, 640 { 522, 110, 1, 0, 1825 }, 641 { 604, 110, 1, 0, 1825 }, 642 { 686, 110, 1, 0, 1825 }, 643 { 768, 110, 1, 0, 1825 }, 644 { 869, 110, 1, 0, 1825 }, 645 { 83, 110, 1, 0, 1825 }, 646 { 194, 110, 1, 0, 1825 }, 647 { 786, 104, 1, 0, 1539 }, 648 { 968, 1, 106, 1, 1539 }, 649 { 974, 1, 106, 1, 1508 }, 650 { 980, 1, 106, 1, 1508 }, 651 { 986, 1, 106, 1, 1508 }, 652 { 992, 1, 106, 1, 1508 }, 653 { 998, 1, 106, 1, 1508 }, 654 { 1004, 1, 106, 1, 1508 }, 655 { 1010, 1, 106, 1, 1508 }, 656 { 1023, 1, 102, 1, 1476 }, 657 { 1029, 1, 102, 1, 1476 }, 658 { 1035, 1, 102, 1, 1476 }, 659 { 1041, 1, 102, 1, 1476 }, 660 { 1047, 1, 102, 1, 1476 }, 661 { 1053, 1, 102, 1, 1476 }, 662 { 1059, 1, 102, 1, 1476 }, 663 { 1065, 1, 102, 1, 1476 }, 664 { 1071, 1, 100, 1, 1444 }, 665 { 1077, 1, 100, 1, 1444 }, 666 { 1083, 1, 100, 1, 1444 }, 667 { 1089, 1, 100, 1, 1444 }, 668 { 1095, 1, 100, 1, 1444 }, 669 { 1101, 1, 100, 1, 1444 }, 670 { 1107, 1, 100, 1, 1444 }, 671 { 1113, 1, 100, 1, 1444 }, 672 { 909, 1, 98, 1, 1412 }, 673 { 915, 1, 98, 1, 1412 }, 674 { 921, 1, 98, 1, 1412 }, 675 { 927, 1, 98, 1, 1412 }, 676 { 933, 1, 98, 1, 1412 }, 677 { 939, 1, 98, 1, 1412 }, 678 { 945, 1, 98, 1, 1412 }, 679 { 951, 1, 98, 1, 1412 }, 680}; 681 682 683 // GPRC Register Class... 684 static const MCPhysReg GPRC[] = { 685 PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R30, PPC_R29, PPC_R28, PPC_R27, PPC_R26, PPC_R25, PPC_R24, PPC_R23, PPC_R22, PPC_R21, PPC_R20, PPC_R19, PPC_R18, PPC_R17, PPC_R16, PPC_R15, PPC_R14, PPC_R13, PPC_R31, PPC_R0, PPC_R1, PPC_FP, PPC_BP, 686 }; 687 688 // GPRC Bit set. 689 static const uint8_t GPRCBits[] = { 690 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, 691 }; 692 693 // GPRC_NOR0 Register Class... 694 static const MCPhysReg GPRC_NOR0[] = { 695 PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R30, PPC_R29, PPC_R28, PPC_R27, PPC_R26, PPC_R25, PPC_R24, PPC_R23, PPC_R22, PPC_R21, PPC_R20, PPC_R19, PPC_R18, PPC_R17, PPC_R16, PPC_R15, PPC_R14, PPC_R13, PPC_R31, PPC_R1, PPC_FP, PPC_BP, PPC_ZERO, 696 }; 697 698 // GPRC_NOR0 Bit set. 699 static const uint8_t GPRC_NOR0Bits[] = { 700 0x22, 0x02, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x3f, 701 }; 702 703 // GPRC_and_GPRC_NOR0 Register Class... 704 static const MCPhysReg GPRC_and_GPRC_NOR0[] = { 705 PPC_R2, PPC_R3, PPC_R4, PPC_R5, PPC_R6, PPC_R7, PPC_R8, PPC_R9, PPC_R10, PPC_R11, PPC_R12, PPC_R30, PPC_R29, PPC_R28, PPC_R27, PPC_R26, PPC_R25, PPC_R24, PPC_R23, PPC_R22, PPC_R21, PPC_R20, PPC_R19, PPC_R18, PPC_R17, PPC_R16, PPC_R15, PPC_R14, PPC_R13, PPC_R31, PPC_R1, PPC_FP, PPC_BP, 706 }; 707 708 // GPRC_and_GPRC_NOR0 Bit set. 709 static const uint8_t GPRC_and_GPRC_NOR0Bits[] = { 710 0x22, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x3f, 711 }; 712 713 // CRBITRC Register Class... 714 static const MCPhysReg CRBITRC[] = { 715 PPC_CR2LT, PPC_CR2GT, PPC_CR2EQ, PPC_CR2UN, PPC_CR3LT, PPC_CR3GT, PPC_CR3EQ, PPC_CR3UN, PPC_CR4LT, PPC_CR4GT, PPC_CR4EQ, PPC_CR4UN, PPC_CR5LT, PPC_CR5GT, PPC_CR5EQ, PPC_CR5UN, PPC_CR6LT, PPC_CR6GT, PPC_CR6EQ, PPC_CR6UN, PPC_CR7LT, PPC_CR7GT, PPC_CR7EQ, PPC_CR7UN, PPC_CR1LT, PPC_CR1GT, PPC_CR1EQ, PPC_CR1UN, PPC_CR0LT, PPC_CR0GT, PPC_CR0EQ, PPC_CR0UN, 716 }; 717 718 // CRBITRC Bit set. 719 static const uint8_t CRBITRCBits[] = { 720 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, 721 }; 722 723 // F4RC Register Class... 724 static const MCPhysReg F4RC[] = { 725 PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14, 726 }; 727 728 // F4RC Bit set. 729 static const uint8_t F4RCBits[] = { 730 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, 731 }; 732 733 // CRRC Register Class... 734 static const MCPhysReg CRRC[] = { 735 PPC_CR0, PPC_CR1, PPC_CR5, PPC_CR6, PPC_CR7, PPC_CR2, PPC_CR3, PPC_CR4, 736 }; 737 738 // CRRC Bit set. 739 static const uint8_t CRRCBits[] = { 740 0x00, 0xf8, 0x07, 741 }; 742 743 // CARRYRC Register Class... 744 static const MCPhysReg CARRYRC[] = { 745 PPC_CARRY, 746 }; 747 748 // CARRYRC Bit set. 749 static const uint8_t CARRYRCBits[] = { 750 0x04, 751 }; 752 753 // CCRC Register Class... 754 static const MCPhysReg CCRC[] = { 755 PPC_CC, 756 }; 757 758 // CCRC Bit set. 759 static const uint8_t CCRCBits[] = { 760 0x08, 761 }; 762 763 // CTRRC Register Class... 764 static const MCPhysReg CTRRC[] = { 765 PPC_CTR, 766 }; 767 768 // CTRRC Bit set. 769 static const uint8_t CTRRCBits[] = { 770 0x10, 771 }; 772 773 // VRSAVERC Register Class... 774 static const MCPhysReg VRSAVERC[] = { 775 PPC_VRSAVE, 776 }; 777 778 // VRSAVERC Bit set. 779 static const uint8_t VRSAVERCBits[] = { 780 0x00, 0x01, 781 }; 782 783 // VSFRC Register Class... 784 static const MCPhysReg VSFRC[] = { 785 PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14, PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19, PPC_VF31, PPC_VF30, PPC_VF29, PPC_VF28, PPC_VF27, PPC_VF26, PPC_VF25, PPC_VF24, PPC_VF23, PPC_VF22, PPC_VF21, PPC_VF20, 786 }; 787 788 // VSFRC Bit set. 789 static const uint8_t VSFRCBits[] = { 790 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, 791 }; 792 793 // G8RC Register Class... 794 static const MCPhysReg G8RC[] = { 795 PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X0, PPC_X1, PPC_FP8, PPC_BP8, 796 }; 797 798 // G8RC Bit set. 799 static const uint8_t G8RCBits[] = { 800 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, 801 }; 802 803 // G8RC_NOX0 Register Class... 804 static const MCPhysReg G8RC_NOX0[] = { 805 PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X1, PPC_FP8, PPC_BP8, PPC_ZERO8, 806 }; 807 808 // G8RC_NOX0 Bit set. 809 static const uint8_t G8RC_NOX0Bits[] = { 810 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x7f, 811 }; 812 813 // G8RC_and_G8RC_NOX0 Register Class... 814 static const MCPhysReg G8RC_and_G8RC_NOX0[] = { 815 PPC_X2, PPC_X3, PPC_X4, PPC_X5, PPC_X6, PPC_X7, PPC_X8, PPC_X9, PPC_X10, PPC_X11, PPC_X12, PPC_X30, PPC_X29, PPC_X28, PPC_X27, PPC_X26, PPC_X25, PPC_X24, PPC_X23, PPC_X22, PPC_X21, PPC_X20, PPC_X19, PPC_X18, PPC_X17, PPC_X16, PPC_X15, PPC_X14, PPC_X31, PPC_X13, PPC_X1, PPC_FP8, PPC_BP8, 816 }; 817 818 // G8RC_and_G8RC_NOX0 Bit set. 819 static const uint8_t G8RC_and_G8RC_NOX0Bits[] = { 820 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x80, 0xff, 0xff, 0xff, 0x3f, 821 }; 822 823 // F8RC Register Class... 824 static const MCPhysReg F8RC[] = { 825 PPC_F0, PPC_F1, PPC_F2, PPC_F3, PPC_F4, PPC_F5, PPC_F6, PPC_F7, PPC_F8, PPC_F9, PPC_F10, PPC_F11, PPC_F12, PPC_F13, PPC_F31, PPC_F30, PPC_F29, PPC_F28, PPC_F27, PPC_F26, PPC_F25, PPC_F24, PPC_F23, PPC_F22, PPC_F21, PPC_F20, PPC_F19, PPC_F18, PPC_F17, PPC_F16, PPC_F15, PPC_F14, 826 }; 827 828 // F8RC Bit set. 829 static const uint8_t F8RCBits[] = { 830 0x00, 0x00, 0xf0, 0xff, 0xff, 0xff, 0x0f, 831 }; 832 833 // VFRC Register Class... 834 static const MCPhysReg VFRC[] = { 835 PPC_VF2, PPC_VF3, PPC_VF4, PPC_VF5, PPC_VF0, PPC_VF1, PPC_VF6, PPC_VF7, PPC_VF8, PPC_VF9, PPC_VF10, PPC_VF11, PPC_VF12, PPC_VF13, PPC_VF14, PPC_VF15, PPC_VF16, PPC_VF17, PPC_VF18, PPC_VF19, PPC_VF31, PPC_VF30, PPC_VF29, PPC_VF28, PPC_VF27, PPC_VF26, PPC_VF25, PPC_VF24, PPC_VF23, PPC_VF22, PPC_VF21, PPC_VF20, 836 }; 837 838 // VFRC Bit set. 839 static const uint8_t VFRCBits[] = { 840 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, 841 }; 842 843 // CTRRC8 Register Class... 844 static const MCPhysReg CTRRC8[] = { 845 PPC_CTR8, 846 }; 847 848 // CTRRC8 Bit set. 849 static const uint8_t CTRRC8Bits[] = { 850 0x00, 0x00, 0x08, 851 }; 852 853 // VSRC Register Class... 854 static const MCPhysReg VSRC[] = { 855 PPC_VSL0, PPC_VSL1, PPC_VSL2, PPC_VSL3, PPC_VSL4, PPC_VSL5, PPC_VSL6, PPC_VSL7, PPC_VSL8, PPC_VSL9, PPC_VSL10, PPC_VSL11, PPC_VSL12, PPC_VSL13, PPC_VSL31, PPC_VSL30, PPC_VSL29, PPC_VSL28, PPC_VSL27, PPC_VSL26, PPC_VSL25, PPC_VSL24, PPC_VSL23, PPC_VSL22, PPC_VSL21, PPC_VSL20, PPC_VSL19, PPC_VSL18, PPC_VSL17, PPC_VSL16, PPC_VSL15, PPC_VSL14, PPC_VSH2, PPC_VSH3, PPC_VSH4, PPC_VSH5, PPC_VSH0, PPC_VSH1, PPC_VSH6, PPC_VSH7, PPC_VSH8, PPC_VSH9, PPC_VSH10, PPC_VSH11, PPC_VSH12, PPC_VSH13, PPC_VSH14, PPC_VSH15, PPC_VSH16, PPC_VSH17, PPC_VSH18, PPC_VSH19, PPC_VSH31, PPC_VSH30, PPC_VSH29, PPC_VSH28, PPC_VSH27, PPC_VSH26, PPC_VSH25, PPC_VSH24, PPC_VSH23, PPC_VSH22, PPC_VSH21, PPC_VSH20, 856 }; 857 858 // VSRC Bit set. 859 static const uint8_t VSRCBits[] = { 860 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0xff, 0x3f, 861 }; 862 863 // VRRC Register Class... 864 static const MCPhysReg VRRC[] = { 865 PPC_V2, PPC_V3, PPC_V4, PPC_V5, PPC_V0, PPC_V1, PPC_V6, PPC_V7, PPC_V8, PPC_V9, PPC_V10, PPC_V11, PPC_V12, PPC_V13, PPC_V14, PPC_V15, PPC_V16, PPC_V17, PPC_V18, PPC_V19, PPC_V31, PPC_V30, PPC_V29, PPC_V28, PPC_V27, PPC_V26, PPC_V25, PPC_V24, PPC_V23, PPC_V22, PPC_V21, PPC_V20, 866 }; 867 868 // VRRC Bit set. 869 static const uint8_t VRRCBits[] = { 870 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, 871 }; 872 873 // VSHRC Register Class... 874 static const MCPhysReg VSHRC[] = { 875 PPC_VSH2, PPC_VSH3, PPC_VSH4, PPC_VSH5, PPC_VSH0, PPC_VSH1, PPC_VSH6, PPC_VSH7, PPC_VSH8, PPC_VSH9, PPC_VSH10, PPC_VSH11, PPC_VSH12, PPC_VSH13, PPC_VSH14, PPC_VSH15, PPC_VSH16, PPC_VSH17, PPC_VSH18, PPC_VSH19, PPC_VSH31, PPC_VSH30, PPC_VSH29, PPC_VSH28, PPC_VSH27, PPC_VSH26, PPC_VSH25, PPC_VSH24, PPC_VSH23, PPC_VSH22, PPC_VSH21, PPC_VSH20, 876 }; 877 878 // VSHRC Bit set. 879 static const uint8_t VSHRCBits[] = { 880 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, 881 }; 882 883 // VSLRC Register Class... 884 static const MCPhysReg VSLRC[] = { 885 PPC_VSL0, PPC_VSL1, PPC_VSL2, PPC_VSL3, PPC_VSL4, PPC_VSL5, PPC_VSL6, PPC_VSL7, PPC_VSL8, PPC_VSL9, PPC_VSL10, PPC_VSL11, PPC_VSL12, PPC_VSL13, PPC_VSL31, PPC_VSL30, PPC_VSL29, PPC_VSL28, PPC_VSL27, PPC_VSL26, PPC_VSL25, PPC_VSL24, PPC_VSL23, PPC_VSL22, PPC_VSL21, PPC_VSL20, PPC_VSL19, PPC_VSL18, PPC_VSL17, PPC_VSL16, PPC_VSL15, PPC_VSL14, 886 }; 887 888 // VSLRC Bit set. 889 static const uint8_t VSLRCBits[] = { 890 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xc0, 0xff, 0xff, 0xff, 0x3f, 891 }; 892 893static const MCRegisterClass PPCMCRegisterClasses[] = { 894 { "GPRC", GPRC, GPRCBits, 34, sizeof(GPRCBits), PPC_GPRCRegClassID, 4, 4, 1, 1 }, 895 { "GPRC_NOR0", GPRC_NOR0, GPRC_NOR0Bits, 34, sizeof(GPRC_NOR0Bits), PPC_GPRC_NOR0RegClassID, 4, 4, 1, 1 }, 896 { "GPRC_and_GPRC_NOR0", GPRC_and_GPRC_NOR0, GPRC_and_GPRC_NOR0Bits, 33, sizeof(GPRC_and_GPRC_NOR0Bits), PPC_GPRC_and_GPRC_NOR0RegClassID, 4, 4, 1, 1 }, 897 { "CRBITRC", CRBITRC, CRBITRCBits, 32, sizeof(CRBITRCBits), PPC_CRBITRCRegClassID, 4, 4, 1, 1 }, 898 { "F4RC", F4RC, F4RCBits, 32, sizeof(F4RCBits), PPC_F4RCRegClassID, 4, 4, 1, 1 }, 899 { "CRRC", CRRC, CRRCBits, 8, sizeof(CRRCBits), PPC_CRRCRegClassID, 4, 4, 1, 1 }, 900 { "CARRYRC", CARRYRC, CARRYRCBits, 1, sizeof(CARRYRCBits), PPC_CARRYRCRegClassID, 4, 4, -1, 1 }, 901 { "CCRC", CCRC, CCRCBits, 1, sizeof(CCRCBits), PPC_CCRCRegClassID, 4, 4, 1, 0 }, 902 { "CTRRC", CTRRC, CTRRCBits, 1, sizeof(CTRRCBits), PPC_CTRRCRegClassID, 4, 4, 1, 0 }, 903 { "VRSAVERC", VRSAVERC, VRSAVERCBits, 1, sizeof(VRSAVERCBits), PPC_VRSAVERCRegClassID, 4, 4, 1, 1 }, 904 { "VSFRC", VSFRC, VSFRCBits, 64, sizeof(VSFRCBits), PPC_VSFRCRegClassID, 8, 8, 1, 1 }, 905 { "G8RC", G8RC, G8RCBits, 34, sizeof(G8RCBits), PPC_G8RCRegClassID, 8, 8, 1, 1 }, 906 { "G8RC_NOX0", G8RC_NOX0, G8RC_NOX0Bits, 34, sizeof(G8RC_NOX0Bits), PPC_G8RC_NOX0RegClassID, 8, 8, 1, 1 }, 907 { "G8RC_and_G8RC_NOX0", G8RC_and_G8RC_NOX0, G8RC_and_G8RC_NOX0Bits, 33, sizeof(G8RC_and_G8RC_NOX0Bits), PPC_G8RC_and_G8RC_NOX0RegClassID, 8, 8, 1, 1 }, 908 { "F8RC", F8RC, F8RCBits, 32, sizeof(F8RCBits), PPC_F8RCRegClassID, 8, 8, 1, 1 }, 909 { "VFRC", VFRC, VFRCBits, 32, sizeof(VFRCBits), PPC_VFRCRegClassID, 8, 8, 1, 1 }, 910 { "CTRRC8", CTRRC8, CTRRC8Bits, 1, sizeof(CTRRC8Bits), PPC_CTRRC8RegClassID, 8, 8, 1, 0 }, 911 { "VSRC", VSRC, VSRCBits, 64, sizeof(VSRCBits), PPC_VSRCRegClassID, 16, 16, 1, 1 }, 912 { "VRRC", VRRC, VRRCBits, 32, sizeof(VRRCBits), PPC_VRRCRegClassID, 16, 16, 1, 1 }, 913 { "VSHRC", VSHRC, VSHRCBits, 32, sizeof(VSHRCBits), PPC_VSHRCRegClassID, 16, 16, 1, 1 }, 914 { "VSLRC", VSLRC, VSLRCBits, 32, sizeof(VSLRCBits), PPC_VSLRCRegClassID, 16, 16, 1, 1 }, 915}; 916 917#endif // GET_REGINFO_MC_DESC 918