1 /* 2 * U-boot - Configuration file for BF526 EZBrd board 3 */ 4 5 #ifndef __CONFIG_BF526_EZBRD_H__ 6 #define __CONFIG_BF526_EZBRD_H__ 7 8 #include <asm/config-pre.h> 9 10 11 /* 12 * Processor Settings 13 */ 14 #define CONFIG_BFIN_CPU bf526-0.0 15 #define CONFIG_BFIN_BOOT_MODE BFIN_BOOT_PARA 16 17 18 /* 19 * Clock Settings 20 * CCLK = (CLKIN * VCO_MULT) / CCLK_DIV 21 * SCLK = (CLKIN * VCO_MULT) / SCLK_DIV 22 */ 23 /* CONFIG_CLKIN_HZ is any value in Hz */ 24 #define CONFIG_CLKIN_HZ 25000000 25 /* CLKIN_HALF controls the DF bit in PLL_CTL 0 = CLKIN */ 26 /* 1 = CLKIN / 2 */ 27 #define CONFIG_CLKIN_HALF 0 28 /* PLL_BYPASS controls the BYPASS bit in PLL_CTL 0 = do not bypass */ 29 /* 1 = bypass PLL */ 30 #define CONFIG_PLL_BYPASS 0 31 /* VCO_MULT controls the MSEL (multiplier) bits in PLL_CTL */ 32 /* Values can range from 0-63 (where 0 means 64) */ 33 #define CONFIG_VCO_MULT 16 34 /* CCLK_DIV controls the core clock divider */ 35 /* Values can be 1, 2, 4, or 8 ONLY */ 36 #define CONFIG_CCLK_DIV 1 37 /* SCLK_DIV controls the system clock divider */ 38 /* Values can range from 1-15 */ 39 #define CONFIG_SCLK_DIV 5 40 41 42 /* 43 * Memory Settings 44 */ 45 /* This board has a 64meg MT48H32M16 */ 46 #define CONFIG_MEM_ADD_WDTH 10 47 #define CONFIG_MEM_SIZE 64 48 49 #define CONFIG_EBIU_SDRRC_VAL 0x0267 50 #define CONFIG_EBIU_SDGCTL_VAL (SCTLE | CL_2 | PASR_ALL | TRAS_6 | TRP_4 | TRCD_2 | TWR_2 | PSS) 51 52 #define CONFIG_EBIU_AMGCTL_VAL (AMCKEN | AMBEN_ALL) 53 #define CONFIG_EBIU_AMBCTL0_VAL (B1WAT_15 | B1RAT_15 | B1HT_3 | B1RDYPOL | B0WAT_15 | B0RAT_15 | B0HT_3 | B0RDYPOL) 54 #define CONFIG_EBIU_AMBCTL1_VAL (B3WAT_15 | B3RAT_15 | B3HT_3 | B3RDYPOL | B2WAT_15 | B2RAT_15 | B2HT_3 | B2RDYPOL) 55 56 #define CONFIG_SYS_MONITOR_LEN (512 * 1024) 57 #define CONFIG_SYS_MALLOC_LEN (512 * 1024) 58 59 60 /* 61 * NAND Settings 62 * (can't be used same time as ethernet) 63 */ 64 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_NAND) 65 #define CONFIG_BFIN_NFC 66 #endif 67 #ifdef CONFIG_BFIN_NFC 68 #define CONFIG_BFIN_NFC_CTL_VAL 0x0033 69 #define CONFIG_DRIVER_NAND_BFIN 70 #define CONFIG_SYS_NAND_BASE 0 /* not actually used */ 71 #define CONFIG_SYS_MAX_NAND_DEVICE 1 72 #define NAND_MAX_CHIPS 1 73 #define CONFIG_CMD_NAND 74 #endif 75 76 77 /* 78 * Network Settings 79 */ 80 #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) && \ 81 !defined(__ADSPBF524__) && !defined(__ADSPBF525__) && !defined(CONFIG_BFIN_NFC) 82 #define ADI_CMDS_NETWORK 1 83 #define CONFIG_BFIN_MAC 84 #define CONFIG_RMII 85 #define CONFIG_NETCONSOLE 1 86 #define CONFIG_NET_MULTI 1 87 #endif 88 #define CONFIG_HOSTNAME bf526-ezbrd 89 /* Uncomment next line to use fixed MAC address */ 90 /* #define CONFIG_ETHADDR 02:80:ad:20:31:e8 */ 91 92 93 /* 94 * Flash Settings 95 */ 96 #define CONFIG_FLASH_CFI_DRIVER 97 #define CONFIG_SYS_FLASH_BASE 0x20000000 98 #define CONFIG_SYS_FLASH_CFI 99 #define CONFIG_SYS_FLASH_PROTECTION 100 #define CONFIG_SYS_MAX_FLASH_BANKS 1 101 #define CONFIG_SYS_MAX_FLASH_SECT 71 102 103 104 /* 105 * SPI Settings 106 */ 107 #define CONFIG_BFIN_SPI 108 #define CONFIG_ENV_SPI_MAX_HZ 30000000 109 #define CONFIG_SF_DEFAULT_SPEED 30000000 110 #define CONFIG_SPI_FLASH 111 #define CONFIG_SPI_FLASH_SST 112 113 114 /* 115 * Env Storage Settings 116 */ 117 #if (CONFIG_BFIN_BOOT_MODE == BFIN_BOOT_SPI_MASTER) 118 #define CONFIG_ENV_IS_IN_SPI_FLASH 119 #define CONFIG_ENV_OFFSET 0x4000 120 #define CONFIG_ENV_SIZE 0x2000 121 #define CONFIG_ENV_SECT_SIZE 0x2000 122 #else 123 #define CONFIG_ENV_IS_IN_FLASH 124 #define CONFIG_ENV_OFFSET 0x4000 125 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_ENV_OFFSET) 126 #define CONFIG_ENV_SIZE 0x2000 127 #define CONFIG_ENV_SECT_SIZE 0x2000 128 #endif 129 #define CONFIG_ENV_IS_EMBEDDED_IN_LDR 130 131 132 /* 133 * I2C Settings 134 */ 135 #define CONFIG_BFIN_TWI_I2C 1 136 #define CONFIG_HARD_I2C 1 137 #define CONFIG_SYS_I2C_SPEED 50000 138 #define CONFIG_SYS_I2C_SLAVE 0 139 140 141 /* 142 * USB Settings 143 */ 144 #if !defined(__ADSPBF522__) && !defined(__ADSPBF523__) 145 #define CONFIG_USB 146 #define CONFIG_MUSB_HCD 147 #define CONFIG_USB_BLACKFIN 148 #define CONFIG_USB_STORAGE 149 #define CONFIG_MUSB_TIMEOUT 100000 150 #endif 151 152 153 /* 154 * Misc Settings 155 */ 156 #define CONFIG_MISC_INIT_R 157 #define CONFIG_RTC_BFIN 158 #define CONFIG_UART_CONSOLE 1 159 160 /* define to enable run status via led */ 161 /* #define CONFIG_STATUS_LED */ 162 #ifdef CONFIG_STATUS_LED 163 #define CONFIG_BOARD_SPECIFIC_LED 164 #ifndef __ASSEMBLY__ 165 typedef unsigned int led_id_t; 166 void __led_init(led_id_t mask, int state); 167 void __led_set(led_id_t mask, int state); 168 void __led_toggle(led_id_t mask); 169 #endif 170 /* use LED0 to indicate booting/alive */ 171 #define STATUS_LED_BOOT 0 172 #define STATUS_LED_BIT 1 173 #define STATUS_LED_STATE STATUS_LED_ON 174 #define STATUS_LED_PERIOD (CONFIG_SYS_HZ / 4) 175 /* use LED1 to indicate crash */ 176 #define STATUS_LED_CRASH 1 177 #define STATUS_LED_BIT1 2 178 #define STATUS_LED_STATE1 STATUS_LED_ON 179 #define STATUS_LED_PERIOD1 (CONFIG_SYS_HZ / 2) 180 #endif 181 182 183 /* 184 * Pull in common ADI header for remaining command/environment setup 185 */ 186 #include <configs/bfin_adi_common.h> 187 188 #endif 189