1
2 /*
3 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
4 *
5 * Copyright (c) 2004-2007 Fabrice Bellard
6 * Copyright (c) 2007 Jocelyn Mayer
7 *
8 * Permission is hereby granted, free of charge, to any person obtaining a copy
9 * of this software and associated documentation files (the "Software"), to deal
10 * in the Software without restriction, including without limitation the rights
11 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
12 * copies of the Software, and to permit persons to whom the Software is
13 * furnished to do so, subject to the following conditions:
14 *
15 * The above copyright notice and this permission notice shall be included in
16 * all copies or substantial portions of the Software.
17 *
18 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
19 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
20 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
21 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
22 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
23 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
24 * THE SOFTWARE.
25 */
26
27 #include "qemu/osdep.h"
28 #include "qemu-common.h"
29 #include "qemu/datadir.h"
30 #include "qemu/units.h"
31 #include "qapi/error.h"
32 #include "hw/ppc/ppc.h"
33 #include "hw/qdev-properties.h"
34 #include "mac.h"
35 #include "hw/input/adb.h"
36 #include "sysemu/sysemu.h"
37 #include "net/net.h"
38 #include "hw/isa/isa.h"
39 #include "hw/pci/pci.h"
40 #include "hw/pci/pci_host.h"
41 #include "hw/nvram/fw_cfg.h"
42 #include "hw/char/escc.h"
43 #include "hw/misc/macio/macio.h"
44 #include "hw/loader.h"
45 #include "hw/fw-path-provider.h"
46 #include "elf.h"
47 #include "qemu/error-report.h"
48 #include "sysemu/kvm.h"
49 #include "sysemu/reset.h"
50 #include "kvm_ppc.h"
51
52 #define MAX_IDE_BUS 2
53 #define CFG_ADDR 0xf0000510
54 #define TBFREQ 16600000UL
55 #define CLOCKFREQ 266000000UL
56 #define BUSFREQ 66000000UL
57
58 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
59
60 #define GRACKLE_BASE 0xfec00000
61 #define PROM_BASE 0xffc00000
62 #define PROM_SIZE (4 * MiB)
63
64 /* FreeBSD headers define this */
65 #ifdef round_page
66 #undef round_page
67 #endif
68
fw_cfg_boot_set(void * opaque,const char * boot_device,Error ** errp)69 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
70 Error **errp)
71 {
72 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
73 }
74
translate_kernel_address(void * opaque,uint64_t addr)75 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
76 {
77 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
78 }
79
ppc_heathrow_reset(void * opaque)80 static void ppc_heathrow_reset(void *opaque)
81 {
82 PowerPCCPU *cpu = opaque;
83
84 cpu_reset(CPU(cpu));
85 }
86
ppc_heathrow_init(MachineState * machine)87 static void ppc_heathrow_init(MachineState *machine)
88 {
89 ram_addr_t ram_size = machine->ram_size;
90 const char *bios_name = machine->firmware ?: PROM_FILENAME;
91 const char *boot_device = machine->boot_order;
92 PowerPCCPU *cpu = NULL;
93 CPUPPCState *env = NULL;
94 char *filename;
95 int i;
96 MemoryRegion *bios = g_new(MemoryRegion, 1);
97 uint32_t kernel_base, initrd_base, cmdline_base = 0;
98 int32_t kernel_size, initrd_size;
99 PCIBus *pci_bus;
100 PCIDevice *macio;
101 MACIOIDEState *macio_ide;
102 ESCCState *escc;
103 SysBusDevice *s;
104 DeviceState *dev, *pic_dev, *grackle_dev;
105 BusState *adb_bus;
106 uint64_t bios_addr;
107 int bios_size;
108 unsigned int smp_cpus = machine->smp.cpus;
109 uint16_t ppc_boot_device;
110 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
111 void *fw_cfg;
112 uint64_t tbfreq;
113
114 /* init CPUs */
115 for (i = 0; i < smp_cpus; i++) {
116 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
117 env = &cpu->env;
118
119 /* Set time-base frequency to 16.6 Mhz */
120 cpu_ppc_tb_init(env, TBFREQ);
121 qemu_register_reset(ppc_heathrow_reset, cpu);
122 }
123
124 /* allocate RAM */
125 if (ram_size > 2047 * MiB) {
126 error_report("Too much memory for this machine: %" PRId64 " MB, "
127 "maximum 2047 MB", ram_size / MiB);
128 exit(1);
129 }
130
131 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
132
133 /* allocate and load firmware ROM */
134 memory_region_init_rom(bios, NULL, "ppc_heathrow.bios", PROM_SIZE,
135 &error_fatal);
136 memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
137
138 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
139 if (filename) {
140 /* Load OpenBIOS (ELF) */
141 bios_size = load_elf(filename, NULL, NULL, NULL, NULL, &bios_addr,
142 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
143 /* Unfortunately, load_elf sign-extends reading elf32 */
144 bios_addr = (uint32_t)bios_addr;
145
146 if (bios_size <= 0) {
147 /* or if could not load ELF try loading a binary ROM image */
148 bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
149 bios_addr = PROM_BASE;
150 }
151 g_free(filename);
152 } else {
153 bios_size = -1;
154 }
155 if (bios_size < 0 || bios_addr - PROM_BASE + bios_size > PROM_SIZE) {
156 error_report("could not load PowerPC bios '%s'", bios_name);
157 exit(1);
158 }
159
160 if (machine->kernel_filename) {
161 int bswap_needed;
162
163 #ifdef BSWAP_NEEDED
164 bswap_needed = 1;
165 #else
166 bswap_needed = 0;
167 #endif
168 kernel_base = KERNEL_LOAD_ADDR;
169 kernel_size = load_elf(machine->kernel_filename, NULL,
170 translate_kernel_address, NULL, NULL, NULL,
171 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
172 if (kernel_size < 0)
173 kernel_size = load_aout(machine->kernel_filename, kernel_base,
174 ram_size - kernel_base, bswap_needed,
175 TARGET_PAGE_SIZE);
176 if (kernel_size < 0)
177 kernel_size = load_image_targphys(machine->kernel_filename,
178 kernel_base,
179 ram_size - kernel_base);
180 if (kernel_size < 0) {
181 error_report("could not load kernel '%s'",
182 machine->kernel_filename);
183 exit(1);
184 }
185 /* load initrd */
186 if (machine->initrd_filename) {
187 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size +
188 KERNEL_GAP);
189 initrd_size = load_image_targphys(machine->initrd_filename,
190 initrd_base,
191 ram_size - initrd_base);
192 if (initrd_size < 0) {
193 error_report("could not load initial ram disk '%s'",
194 machine->initrd_filename);
195 exit(1);
196 }
197 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
198 } else {
199 initrd_base = 0;
200 initrd_size = 0;
201 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
202 }
203 ppc_boot_device = 'm';
204 } else {
205 kernel_base = 0;
206 kernel_size = 0;
207 initrd_base = 0;
208 initrd_size = 0;
209 ppc_boot_device = '\0';
210 for (i = 0; boot_device[i] != '\0'; i++) {
211 /* TOFIX: for now, the second IDE channel is not properly
212 * used by OHW. The Mac floppy disk are not emulated.
213 * For now, OHW cannot boot from the network.
214 */
215 #if 0
216 if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
217 ppc_boot_device = boot_device[i];
218 break;
219 }
220 #else
221 if (boot_device[i] >= 'c' && boot_device[i] <= 'd') {
222 ppc_boot_device = boot_device[i];
223 break;
224 }
225 #endif
226 }
227 if (ppc_boot_device == '\0') {
228 error_report("No valid boot device for G3 Beige machine");
229 exit(1);
230 }
231 }
232
233 /* Timebase Frequency */
234 if (kvm_enabled()) {
235 tbfreq = kvmppc_get_tbfreq();
236 } else {
237 tbfreq = TBFREQ;
238 }
239
240 /* Grackle PCI host bridge */
241 grackle_dev = qdev_new(TYPE_GRACKLE_PCI_HOST_BRIDGE);
242 qdev_prop_set_uint32(grackle_dev, "ofw-addr", 0x80000000);
243 s = SYS_BUS_DEVICE(grackle_dev);
244 sysbus_realize_and_unref(s, &error_fatal);
245
246 sysbus_mmio_map(s, 0, GRACKLE_BASE);
247 sysbus_mmio_map(s, 1, GRACKLE_BASE + 0x200000);
248 /* PCI hole */
249 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
250 sysbus_mmio_get_region(s, 2));
251 /* Register 2 MB of ISA IO space */
252 memory_region_add_subregion(get_system_memory(), 0xfe000000,
253 sysbus_mmio_get_region(s, 3));
254
255 pci_bus = PCI_HOST_BRIDGE(grackle_dev)->bus;
256
257 /* MacIO */
258 macio = pci_new(PCI_DEVFN(16, 0), TYPE_OLDWORLD_MACIO);
259 dev = DEVICE(macio);
260 qdev_prop_set_uint64(dev, "frequency", tbfreq);
261
262 escc = ESCC(object_resolve_path_component(OBJECT(macio), "escc"));
263 qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0));
264 qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1));
265
266 pci_realize_and_unref(macio, pci_bus, &error_fatal);
267
268 pic_dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pic"));
269 for (i = 0; i < 4; i++) {
270 qdev_connect_gpio_out(grackle_dev, i,
271 qdev_get_gpio_in(pic_dev, 0x15 + i));
272 }
273
274 /* Connect the heathrow PIC outputs to the 6xx bus */
275 for (i = 0; i < smp_cpus; i++) {
276 switch (PPC_INPUT(env)) {
277 case PPC_FLAGS_INPUT_6xx:
278 /* XXX: we register only 1 output pin for heathrow PIC */
279 qdev_connect_gpio_out(pic_dev, 0,
280 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]);
281 break;
282 default:
283 error_report("Bus model not supported on OldWorld Mac machine");
284 exit(1);
285 }
286 }
287
288 pci_vga_init(pci_bus);
289
290 for (i = 0; i < nb_nics; i++) {
291 pci_nic_init_nofail(&nd_table[i], pci_bus, "ne2k_pci", NULL);
292 }
293
294 /* MacIO IDE */
295 ide_drive_get(hd, ARRAY_SIZE(hd));
296 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
297 "ide[0]"));
298 macio_ide_init_drives(macio_ide, hd);
299
300 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
301 "ide[1]"));
302 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
303
304 /* MacIO CUDA/ADB */
305 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
306 adb_bus = qdev_get_child_bus(dev, "adb.0");
307 dev = qdev_new(TYPE_ADB_KEYBOARD);
308 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
309 dev = qdev_new(TYPE_ADB_MOUSE);
310 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
311
312 if (machine_usb(machine)) {
313 pci_create_simple(pci_bus, -1, "pci-ohci");
314 }
315
316 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8)
317 graphic_depth = 15;
318
319 /* No PCI init: the BIOS will do it */
320
321 dev = qdev_new(TYPE_FW_CFG_MEM);
322 fw_cfg = FW_CFG(dev);
323 qdev_prop_set_uint32(dev, "data_width", 1);
324 qdev_prop_set_bit(dev, "dma_enabled", false);
325 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
326 OBJECT(fw_cfg));
327 s = SYS_BUS_DEVICE(dev);
328 sysbus_realize_and_unref(s, &error_fatal);
329 sysbus_mmio_map(s, 0, CFG_ADDR);
330 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
331
332 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
333 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
334 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
335 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW);
336 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
337 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
338 if (machine->kernel_cmdline) {
339 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
340 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE,
341 machine->kernel_cmdline);
342 } else {
343 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
344 }
345 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
346 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
347 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
348
349 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
350 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
351 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
352
353 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
354 if (kvm_enabled()) {
355 uint8_t *hypercall;
356
357 hypercall = g_malloc(16);
358 kvmppc_get_hypercall(env, hypercall, 16);
359 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
360 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
361 }
362 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
363 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
364 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
365 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
366
367 /* MacOS NDRV VGA driver */
368 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
369 if (filename) {
370 gchar *ndrv_file;
371 gsize ndrv_size;
372
373 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
374 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
375 }
376 g_free(filename);
377 }
378
379 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
380 }
381
382 /*
383 * Implementation of an interface to adjust firmware path
384 * for the bootindex property handling.
385 */
heathrow_fw_dev_path(FWPathProvider * p,BusState * bus,DeviceState * dev)386 static char *heathrow_fw_dev_path(FWPathProvider *p, BusState *bus,
387 DeviceState *dev)
388 {
389 PCIDevice *pci;
390 MACIOIDEState *macio_ide;
391
392 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-oldworld")) {
393 pci = PCI_DEVICE(dev);
394 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
395 }
396
397 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
398 macio_ide = MACIO_IDE(dev);
399 return g_strdup_printf("ata-3@%x", macio_ide->addr);
400 }
401
402 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
403 return g_strdup("disk");
404 }
405
406 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
407 return g_strdup("cdrom");
408 }
409
410 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
411 return g_strdup("disk");
412 }
413
414 return NULL;
415 }
416
heathrow_kvm_type(MachineState * machine,const char * arg)417 static int heathrow_kvm_type(MachineState *machine, const char *arg)
418 {
419 /* Always force PR KVM */
420 return 2;
421 }
422
heathrow_class_init(ObjectClass * oc,void * data)423 static void heathrow_class_init(ObjectClass *oc, void *data)
424 {
425 MachineClass *mc = MACHINE_CLASS(oc);
426 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
427
428 mc->desc = "Heathrow based PowerMAC";
429 mc->init = ppc_heathrow_init;
430 mc->block_default_type = IF_IDE;
431 mc->max_cpus = MAX_CPUS;
432 #ifndef TARGET_PPC64
433 mc->is_default = true;
434 #endif
435 /* TOFIX "cad" when Mac floppy is implemented */
436 mc->default_boot_order = "cd";
437 mc->kvm_type = heathrow_kvm_type;
438 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("750_v3.1");
439 mc->default_display = "std";
440 mc->ignore_boot_device_suffixes = true;
441 mc->default_ram_id = "ppc_heathrow.ram";
442 fwc->get_dev_path = heathrow_fw_dev_path;
443 }
444
445 static const TypeInfo ppc_heathrow_machine_info = {
446 .name = MACHINE_TYPE_NAME("g3beige"),
447 .parent = TYPE_MACHINE,
448 .class_init = heathrow_class_init,
449 .interfaces = (InterfaceInfo[]) {
450 { TYPE_FW_PATH_PROVIDER },
451 { }
452 },
453 };
454
ppc_heathrow_register_types(void)455 static void ppc_heathrow_register_types(void)
456 {
457 type_register_static(&ppc_heathrow_machine_info);
458 }
459
460 type_init(ppc_heathrow_register_types);
461