1 /** @file 2 3 The definition for UHCI register operation routines. 4 5 Copyright (c) 2007, Intel Corporation. All rights reserved.<BR> 6 SPDX-License-Identifier: BSD-2-Clause-Patent 7 8 **/ 9 10 #ifndef _EFI_UHCI_QUEUE_H_ 11 #define _EFI_UHCI_QUEUE_H_ 12 13 // 14 // Macroes used to set various links in UHCI's driver. 15 // In this UHCI driver, QH's horizontal link always pointers to other QH, 16 // and its vertical link always pointers to TD. TD's next pointer always 17 // pointers to other sibling TD. Frame link always pointers to QH because 18 // ISO transfer isn't supported. 19 // 20 // We should use UINT32 to access these pointers to void race conditions 21 // with hardware. 22 // 23 #define QH_HLINK(Pointer, Terminate) \ 24 (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | 0x02 | ((Terminate) ? 0x01 : 0)) 25 26 #define QH_VLINK(Pointer, Terminate) \ 27 (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | ((Terminate) ? 0x01 : 0)) 28 29 #define TD_LINK(Pointer, VertFirst, Terminate) \ 30 (((UINT32) ((UINTN) (Pointer)) & 0xFFFFFFF0) | \ 31 ((VertFirst) ? 0x04 : 0) | ((Terminate) ? 0x01 : 0)) 32 33 #define LINK_TERMINATED(Link) (((Link) & 0x01) != 0) 34 35 #define UHCI_ADDR(QhOrTd) ((VOID *) (UINTN) ((QhOrTd) & 0xFFFFFFF0)) 36 37 #pragma pack(1) 38 // 39 // Both links in QH has this internal structure: 40 // Next pointer: 28, Reserved: 2, NextIsQh: 1, Terminate: 1 41 // This is the same as frame list entry. 42 // 43 typedef struct { 44 UINT32 HorizonLink; 45 UINT32 VerticalLink; 46 } UHCI_QH_HW; 47 48 // 49 // Next link in TD has this internal structure: 50 // Next pointer: 28, Reserved: 1, Vertical First: 1, NextIsQh: 1, Terminate: 1 51 // 52 typedef struct { 53 UINT32 NextLink; 54 UINT32 ActualLen : 11; 55 UINT32 Reserved1 : 5; 56 UINT32 Status : 8; 57 UINT32 IntOnCpl : 1; 58 UINT32 IsIsoch : 1; 59 UINT32 LowSpeed : 1; 60 UINT32 ErrorCount : 2; 61 UINT32 ShortPacket : 1; 62 UINT32 Reserved2 : 2; 63 UINT32 PidCode : 8; 64 UINT32 DeviceAddr : 7; 65 UINT32 EndPoint : 4; 66 UINT32 DataToggle : 1; 67 UINT32 Reserved3 : 1; 68 UINT32 MaxPacketLen: 11; 69 UINT32 DataBuffer; 70 } UHCI_TD_HW; 71 #pragma pack() 72 73 typedef struct _UHCI_TD_SW UHCI_TD_SW; 74 typedef struct _UHCI_QH_SW UHCI_QH_SW; 75 76 struct _UHCI_QH_SW { 77 UHCI_QH_HW QhHw; 78 UHCI_QH_SW *NextQh; 79 UHCI_TD_SW *TDs; 80 UINTN Interval; 81 }; 82 83 struct _UHCI_TD_SW { 84 UHCI_TD_HW TdHw; 85 UHCI_TD_SW *NextTd; 86 UINT8 *Data; 87 UINT16 DataLen; 88 }; 89 90 91 /** 92 Link the TD To QH. 93 94 @param Uhc The UHCI device. 95 @param Qh The queue head for the TD to link to. 96 @param Td The TD to link. 97 98 **/ 99 VOID 100 UhciLinkTdToQh ( 101 IN USB_HC_DEV *Uhc, 102 IN UHCI_QH_SW *Qh, 103 IN UHCI_TD_SW *Td 104 ); 105 106 107 /** 108 Unlink TD from the QH. 109 110 @param Qh The queue head to unlink from. 111 @param Td The TD to unlink. 112 113 @return None. 114 115 **/ 116 VOID 117 UhciUnlinkTdFromQh ( 118 IN UHCI_QH_SW *Qh, 119 IN UHCI_TD_SW *Td 120 ); 121 122 123 /** 124 Map address of request structure buffer. 125 126 @param Uhc The UHCI device. 127 @param Request The user request buffer. 128 @param MappedAddr Mapped address of request. 129 @param Map Identificaion of this mapping to return. 130 131 @return EFI_SUCCESS Success. 132 @return EFI_DEVICE_ERROR Fail to map the user request. 133 134 **/ 135 EFI_STATUS 136 UhciMapUserRequest ( 137 IN USB_HC_DEV *Uhc, 138 IN OUT VOID *Request, 139 OUT UINT8 **MappedAddr, 140 OUT VOID **Map 141 ); 142 143 144 /** 145 Map address of user data buffer. 146 147 @param Uhc The UHCI device. 148 @param Direction Direction of the data transfer. 149 @param Data The user data buffer. 150 @param Len Length of the user data. 151 @param PktId Packet identificaion. 152 @param MappedAddr Mapped address to return. 153 @param Map Identificaion of this mapping to return. 154 155 @return EFI_SUCCESS Success. 156 @return EFI_DEVICE_ERROR Fail to map the user data. 157 158 **/ 159 EFI_STATUS 160 UhciMapUserData ( 161 IN USB_HC_DEV *Uhc, 162 IN EFI_USB_DATA_DIRECTION Direction, 163 IN VOID *Data, 164 IN OUT UINTN *Len, 165 OUT UINT8 *PktId, 166 OUT UINT8 **MappedAddr, 167 OUT VOID **Map 168 ); 169 170 171 /** 172 Delete a list of TDs. 173 174 @param Uhc The UHCI device. 175 @param FirstTd TD link list head. 176 177 @return None. 178 179 **/ 180 VOID 181 UhciDestoryTds ( 182 IN USB_HC_DEV *Uhc, 183 IN UHCI_TD_SW *FirstTd 184 ); 185 186 187 /** 188 Create an initialize a new queue head. 189 190 @param Uhc The UHCI device. 191 @param Interval The polling interval for the queue. 192 193 @return The newly created queue header. 194 195 **/ 196 UHCI_QH_SW * 197 UhciCreateQh ( 198 IN USB_HC_DEV *Uhc, 199 IN UINTN Interval 200 ); 201 202 203 /** 204 Create Tds list for Control Transfer. 205 206 @param Uhc The UHCI device. 207 @param DeviceAddr The device address. 208 @param DataPktId Packet Identification of Data Tds. 209 @param Request A pointer to cpu memory address of request structure buffer to transfer. 210 @param RequestPhy A pointer to pci memory address of request structure buffer to transfer. 211 @param Data A pointer to cpu memory address of user data buffer to transfer. 212 @param DataPhy A pointer to pci memory address of user data buffer to transfer. 213 @param DataLen Length of user data to transfer. 214 @param MaxPacket Maximum packet size for control transfer. 215 @param IsLow Full speed or low speed. 216 217 @return The Td list head for the control transfer. 218 219 **/ 220 UHCI_TD_SW * 221 UhciCreateCtrlTds ( 222 IN USB_HC_DEV *Uhc, 223 IN UINT8 DeviceAddr, 224 IN UINT8 DataPktId, 225 IN UINT8 *Request, 226 IN UINT8 *RequestPhy, 227 IN UINT8 *Data, 228 IN UINT8 *DataPhy, 229 IN UINTN DataLen, 230 IN UINT8 MaxPacket, 231 IN BOOLEAN IsLow 232 ); 233 234 235 /** 236 Create Tds list for Bulk/Interrupt Transfer. 237 238 @param Uhc USB_HC_DEV. 239 @param DevAddr Address of Device. 240 @param EndPoint Endpoint Number. 241 @param PktId Packet Identification of Data Tds. 242 @param Data A pointer to cpu memory address of user data buffer to transfer. 243 @param DataPhy A pointer to pci memory address of user data buffer to transfer. 244 @param DataLen Length of user data to transfer. 245 @param DataToggle Data Toggle Pointer. 246 @param MaxPacket Maximum packet size for Bulk/Interrupt transfer. 247 @param IsLow Is Low Speed Device. 248 249 @return The Tds list head for the bulk transfer. 250 251 **/ 252 UHCI_TD_SW * 253 UhciCreateBulkOrIntTds ( 254 IN USB_HC_DEV *Uhc, 255 IN UINT8 DevAddr, 256 IN UINT8 EndPoint, 257 IN UINT8 PktId, 258 IN UINT8 *Data, 259 IN UINT8 *DataPhy, 260 IN UINTN DataLen, 261 IN OUT UINT8 *DataToggle, 262 IN UINT8 MaxPacket, 263 IN BOOLEAN IsLow 264 ); 265 266 #endif 267