1;------------------------------------------------------------------------------
2;*
3;*   Copyright (c) 2009 - 2017, Intel Corporation. All rights reserved.<BR>
4;*   SPDX-License-Identifier: BSD-2-Clause-Patent
5;*
6;*
7;------------------------------------------------------------------------------
8
9    SECTION .rodata
10;
11; Float control word initial value:
12; all exceptions masked, double-extended-precision, round-to-nearest
13;
14mFpuControlWord: DW 0x37F
15;
16; Multimedia-extensions control word:
17; all exceptions masked, round-to-nearest, flush to zero for masked underflow
18;
19mMmxControlWord: DD 0x1F80
20
21DEFAULT REL
22SECTION .text
23
24;
25; Initializes floating point units for requirement of UEFI specification.
26;
27; This function initializes floating-point control word to 0x027F (all exceptions
28; masked,double-precision, round-to-nearest) and multimedia-extensions control word
29; (if supported) to 0x1F80 (all exceptions masked, round-to-nearest, flush to zero
30; for masked underflow).
31;
32global ASM_PFX(InitializeFloatingPointUnits)
33ASM_PFX(InitializeFloatingPointUnits):
34
35    ;
36    ; Initialize floating point units
37    ;
38    finit
39    fldcw   [mFpuControlWord]
40
41    ;
42    ; Set OSFXSR bit 9 in CR4
43    ;
44    mov     rax, cr4
45    or      rax, BIT9
46    mov     cr4, rax
47
48    ldmxcsr [mMmxControlWord]
49
50    ret
51
52