1 // SPDX-License-Identifier: Apache-2.0 OR GPL-2.0-or-later
2 /* Copyright 2013-2017 IBM Corp. */
3
4 #include <stdlib.h>
5 #include <stdio.h>
6 #include <string.h>
7 #include <inttypes.h>
8
9 #include "libflash.h"
10 #include "libflash-priv.h"
11 #include "ecc.h"
12 #include "blocklevel.h"
13
14 static const struct flash_info flash_info[] = {
15 { 0xc22018, 0x01000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL12835F"},
16 { 0xc22019, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL25635F"},
17 { 0xc2201a, 0x04000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MXxxL51235F"},
18 { 0xc2201b, 0x08000000, FL_ERASE_ALL | FL_CAN_4B, "Macronix MX66L1G45G"},
19 { 0xef4018, 0x01000000, FL_ERASE_ALL, "Winbond W25Q128BV" },
20 { 0xef4019, 0x02000000, FL_ERASE_ALL | FL_ERASE_64K | FL_CAN_4B |
21 FL_ERASE_BULK,
22 "Winbond W25Q256BV"},
23 { 0x20ba20, 0x04000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
24 FL_ERASE_BULK | FL_MICRON_BUGS,
25 "Micron N25Qx512Ax" },
26 { 0x20ba19, 0x02000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
27 FL_ERASE_BULK | FL_MICRON_BUGS,
28 "Micron N25Q256Ax" },
29 { 0x1940ef, 0x02000000, FL_ERASE_4K | FL_ERASE_64K | FL_CAN_4B |
30 FL_ERASE_BULK | FL_MICRON_BUGS,
31 "Micron N25Qx256Ax" },
32 { 0x4d5444, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "File Abstraction"},
33 { 0x55aa55, 0x00100000, FL_ERASE_ALL | FL_CAN_4B, "TEST_FLASH" },
34 { 0xaa55aa, 0x02000000, FL_ERASE_ALL | FL_CAN_4B, "EMULATED_FLASH"},
35 };
36
37 struct flash_chip {
38 struct spi_flash_ctrl *ctrl; /* Controller */
39 struct flash_info info; /* Flash info */
40 uint32_t tsize; /* Corrected flash size */
41 uint32_t min_erase_mask; /* Minimum erase size */
42 bool mode_4b; /* Flash currently in 4b mode */
43 struct flash_req *cur_req; /* Current request */
44 void *smart_buf; /* Buffer for smart writes */
45 struct blocklevel_device bl;
46 };
47
48 #ifndef __SKIBOOT__
49 bool libflash_debug;
50 #endif
51
fl_read_stat(struct spi_flash_ctrl * ct,uint8_t * stat)52 int fl_read_stat(struct spi_flash_ctrl *ct, uint8_t *stat)
53 {
54 return ct->cmd_rd(ct, CMD_RDSR, false, 0, stat, 1);
55 }
56
fl_micron_status(struct spi_flash_ctrl * ct)57 static void fl_micron_status(struct spi_flash_ctrl *ct)
58 {
59 uint8_t flst;
60
61 /*
62 * After a success status on a write or erase, we
63 * need to do that command or some chip variants will
64 * lock
65 */
66 ct->cmd_rd(ct, CMD_MIC_RDFLST, false, 0, &flst, 1);
67 }
68
69 /* Synchronous write completion, probably need a yield hook */
fl_sync_wait_idle(struct spi_flash_ctrl * ct)70 int fl_sync_wait_idle(struct spi_flash_ctrl *ct)
71 {
72 uint8_t stat;
73 int rc;
74
75 /* XXX Add timeout */
76 for (;;) {
77 rc = fl_read_stat(ct, &stat);
78 if (rc) return rc;
79 if (!(stat & STAT_WIP)) {
80 if (ct->finfo->flags & FL_MICRON_BUGS)
81 fl_micron_status(ct);
82 return 0;
83 }
84 }
85 /* return FLASH_ERR_WIP_TIMEOUT; */
86 }
87
88 /* Exported for internal use */
fl_wren(struct spi_flash_ctrl * ct)89 int fl_wren(struct spi_flash_ctrl *ct)
90 {
91 int i, rc;
92 uint8_t stat;
93
94 /* Some flashes need it to be hammered */
95 for (i = 0; i < 1000; i++) {
96 rc = ct->cmd_wr(ct, CMD_WREN, false, 0, NULL, 0);
97 if (rc) return rc;
98 rc = fl_read_stat(ct, &stat);
99 if (rc) return rc;
100 if (stat & STAT_WIP) {
101 FL_ERR("LIBFLASH: WREN has WIP status set !\n");
102 rc = fl_sync_wait_idle(ct);
103 if (rc)
104 return rc;
105 continue;
106 }
107 if (stat & STAT_WEN)
108 return 0;
109 }
110 return FLASH_ERR_WREN_TIMEOUT;
111 }
112
flash_read(struct blocklevel_device * bl,uint64_t pos,void * buf,uint64_t len)113 static int flash_read(struct blocklevel_device *bl, uint64_t pos, void *buf, uint64_t len)
114 {
115 struct flash_chip *c = container_of(bl, struct flash_chip, bl);
116 struct spi_flash_ctrl *ct = c->ctrl;
117
118 /* XXX Add sanity/bound checking */
119
120 /*
121 * If the controller supports read and either we are in 3b mode
122 * or we are in 4b *and* the controller supports it, then do a
123 * high level read.
124 */
125 if ((!c->mode_4b || ct->set_4b) && ct->read)
126 return ct->read(ct, pos, buf, len);
127
128 /* Otherwise, go manual if supported */
129 if (!ct->cmd_rd)
130 return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
131 return ct->cmd_rd(ct, CMD_READ, true, pos, buf, len);
132 }
133
134 #define COPY_BUFFER_LENGTH 4096
135
136 /*
137 * This provides a wrapper around flash_read on ECCed data
138 * len is length of data without ECC attached
139 */
flash_read_corrected(struct blocklevel_device * bl,uint32_t pos,void * buf,uint32_t len,bool ecc)140 int flash_read_corrected(struct blocklevel_device *bl, uint32_t pos, void *buf,
141 uint32_t len, bool ecc)
142 {
143 struct ecc64 *bufecc;
144 uint32_t copylen;
145 int rc;
146 uint8_t ret;
147
148 if (!ecc)
149 return flash_read(bl, pos, buf, len);
150
151 /* Copy the buffer in chunks */
152 bufecc = malloc(ecc_buffer_size(COPY_BUFFER_LENGTH));
153 if (!bufecc)
154 return FLASH_ERR_MALLOC_FAILED;
155
156 while (len > 0) {
157 /* What's left to copy? */
158 copylen = MIN(len, COPY_BUFFER_LENGTH);
159
160 /* Read ECCed data from flash */
161 rc = flash_read(bl, pos, bufecc, ecc_buffer_size(copylen));
162 if (rc)
163 goto err;
164
165 /* Extract data from ECCed data */
166 ret = memcpy_from_ecc(buf, bufecc, copylen);
167 if (ret) {
168 rc = FLASH_ERR_ECC_INVALID;
169 goto err;
170 }
171
172 /* Update for next copy */
173 len -= copylen;
174 buf = (uint8_t *)buf + copylen;
175 pos += ecc_buffer_size(copylen);
176 }
177
178 rc = 0;
179
180 err:
181 free(bufecc);
182 return rc;
183 }
184
fl_get_best_erase(struct flash_chip * c,uint32_t dst,uint32_t size,uint32_t * chunk,uint8_t * cmd)185 static void fl_get_best_erase(struct flash_chip *c, uint32_t dst, uint32_t size,
186 uint32_t *chunk, uint8_t *cmd)
187 {
188 /* Smaller than 32k, use 4k */
189 if ((dst & 0x7fff) || (size < 0x8000)) {
190 *chunk = 0x1000;
191 *cmd = CMD_SE;
192 return;
193 }
194 /* Smaller than 64k and 32k is supported, use it */
195 if ((c->info.flags & FL_ERASE_32K) &&
196 ((dst & 0xffff) || (size < 0x10000))) {
197 *chunk = 0x8000;
198 *cmd = CMD_BE32K;
199 return;
200 }
201 /* If 64K is not supported, use whatever smaller size is */
202 if (!(c->info.flags & FL_ERASE_64K)) {
203 if (c->info.flags & FL_ERASE_32K) {
204 *chunk = 0x8000;
205 *cmd = CMD_BE32K;
206 } else {
207 *chunk = 0x1000;
208 *cmd = CMD_SE;
209 }
210 return;
211 }
212 /* Allright, let's go for 64K */
213 *chunk = 0x10000;
214 *cmd = CMD_BE;
215 }
216
flash_erase(struct blocklevel_device * bl,uint64_t dst,uint64_t size)217 static int flash_erase(struct blocklevel_device *bl, uint64_t dst, uint64_t size)
218 {
219 struct flash_chip *c = container_of(bl, struct flash_chip, bl);
220 struct spi_flash_ctrl *ct = c->ctrl;
221 uint32_t chunk;
222 uint8_t cmd;
223 int rc;
224
225 /* Some sanity checking */
226 if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
227 return FLASH_ERR_PARM_ERROR;
228
229 /* Check boundaries fit erase blocks */
230 if ((dst | size) & c->min_erase_mask)
231 return FLASH_ERR_ERASE_BOUNDARY;
232
233 FL_DBG("LIBFLASH: Erasing 0x%" PRIx64"..0%" PRIx64 "...\n",
234 dst, dst + size);
235
236 /* Use controller erase if supported */
237 if (ct->erase)
238 return ct->erase(ct, dst, size);
239
240 /* Allright, loop as long as there's something to erase */
241 while(size) {
242 /* How big can we make it based on alignent & size */
243 fl_get_best_erase(c, dst, size, &chunk, &cmd);
244
245 /* Poke write enable */
246 rc = fl_wren(ct);
247 if (rc)
248 return rc;
249
250 /* Send erase command */
251 rc = ct->cmd_wr(ct, cmd, true, dst, NULL, 0);
252 if (rc)
253 return rc;
254
255 /* Wait for write complete */
256 rc = fl_sync_wait_idle(ct);
257 if (rc)
258 return rc;
259
260 size -= chunk;
261 dst += chunk;
262 }
263 return 0;
264 }
265
flash_erase_chip(struct flash_chip * c)266 int flash_erase_chip(struct flash_chip *c)
267 {
268 struct spi_flash_ctrl *ct = c->ctrl;
269 int rc;
270
271 /* XXX TODO: Fallback to using normal erases */
272 if (!(c->info.flags & (FL_ERASE_CHIP|FL_ERASE_BULK)))
273 return FLASH_ERR_CHIP_ER_NOT_SUPPORTED;
274
275 FL_DBG("LIBFLASH: Erasing chip...\n");
276
277 /* Use controller erase if supported */
278 if (ct->erase)
279 return ct->erase(ct, 0, 0xffffffff);
280
281 rc = fl_wren(ct);
282 if (rc) return rc;
283
284 if (c->info.flags & FL_ERASE_CHIP)
285 rc = ct->cmd_wr(ct, CMD_CE, false, 0, NULL, 0);
286 else
287 rc = ct->cmd_wr(ct, CMD_MIC_BULK_ERASE, false, 0, NULL, 0);
288 if (rc)
289 return rc;
290
291 /* Wait for write complete */
292 return fl_sync_wait_idle(ct);
293 }
294
fl_wpage(struct flash_chip * c,uint32_t dst,const void * src,uint32_t size)295 static int fl_wpage(struct flash_chip *c, uint32_t dst, const void *src,
296 uint32_t size)
297 {
298 struct spi_flash_ctrl *ct = c->ctrl;
299 int rc;
300
301 if (size < 1 || size > 0x100)
302 return FLASH_ERR_BAD_PAGE_SIZE;
303
304 rc = fl_wren(ct);
305 if (rc) return rc;
306
307 rc = ct->cmd_wr(ct, CMD_PP, true, dst, src, size);
308 if (rc)
309 return rc;
310
311 /* Wait for write complete */
312 return fl_sync_wait_idle(ct);
313 }
314
flash_write(struct blocklevel_device * bl,uint32_t dst,const void * src,uint32_t size,bool verify)315 static int flash_write(struct blocklevel_device *bl, uint32_t dst, const void *src,
316 uint32_t size, bool verify)
317 {
318 struct flash_chip *c = container_of(bl, struct flash_chip, bl);
319 struct spi_flash_ctrl *ct = c->ctrl;
320 uint32_t todo = size;
321 uint32_t d = dst;
322 const void *s = src;
323 uint8_t vbuf[0x100];
324 int rc;
325
326 /* Some sanity checking */
327 if (((dst + size) <= dst) || !size || (dst + size) > c->tsize)
328 return FLASH_ERR_PARM_ERROR;
329
330 FL_DBG("LIBFLASH: Writing to 0x%08x..0%08x...\n", dst, dst + size);
331
332 /*
333 * If the controller supports write and either we are in 3b mode
334 * or we are in 4b *and* the controller supports it, then do a
335 * high level write.
336 */
337 if ((!c->mode_4b || ct->set_4b) && ct->write) {
338 rc = ct->write(ct, dst, src, size);
339 if (rc)
340 return rc;
341 goto writing_done;
342 }
343
344 /* Otherwise, go manual if supported */
345 if (!ct->cmd_wr)
346 return FLASH_ERR_CTRL_CMD_UNSUPPORTED;
347
348 /* Iterate for each page to write */
349 while(todo) {
350 uint32_t chunk;
351
352 /* Handle misaligned start */
353 chunk = 0x100 - (d & 0xff);
354 if (chunk > todo)
355 chunk = todo;
356
357 rc = fl_wpage(c, d, s, chunk);
358 if (rc) return rc;
359 d += chunk;
360 s += chunk;
361 todo -= chunk;
362 }
363
364 writing_done:
365 if (!verify)
366 return 0;
367
368 /* Verify */
369 FL_DBG("LIBFLASH: Verifying...\n");
370
371 while(size) {
372 uint32_t chunk;
373
374 chunk = sizeof(vbuf);
375 if (chunk > size)
376 chunk = size;
377 rc = flash_read(bl, dst, vbuf, chunk);
378 if (rc) return rc;
379 if (memcmp(vbuf, src, chunk)) {
380 FL_ERR("LIBFLASH: Miscompare at 0x%08x\n", dst);
381 return FLASH_ERR_VERIFY_FAILURE;
382 }
383 dst += chunk;
384 src += chunk;
385 size -= chunk;
386 }
387 return 0;
388 }
389
flash_write_corrected(struct blocklevel_device * bl,uint32_t pos,const void * buf,uint32_t len,bool verify,bool ecc)390 int flash_write_corrected(struct blocklevel_device *bl, uint32_t pos, const void *buf,
391 uint32_t len, bool verify, bool ecc)
392 {
393 struct ecc64 *bufecc;
394 uint32_t copylen, copylen_minus_ecc;
395 int rc;
396 uint8_t ret;
397
398 if (!ecc)
399 return flash_write(bl, pos, buf, len, verify);
400
401 /* Copy the buffer in chunks */
402 bufecc = malloc(ecc_buffer_size(COPY_BUFFER_LENGTH));
403 if (!bufecc)
404 return FLASH_ERR_MALLOC_FAILED;
405
406 while (len > 0) {
407 /* What's left to copy? */
408 copylen = MIN(len, COPY_BUFFER_LENGTH);
409 copylen_minus_ecc = ecc_buffer_size_minus_ecc(copylen);
410
411 /* Add the ecc byte to the data */
412 ret = memcpy_to_ecc(bufecc, buf, copylen_minus_ecc);
413 if (ret) {
414 rc = FLASH_ERR_ECC_INVALID;
415 goto err;
416 }
417
418 /* Write ECCed data to the flash */
419 rc = flash_write(bl, pos, bufecc, copylen, verify);
420 if (rc)
421 goto err;
422
423 /* Update for next copy */
424 len -= copylen_minus_ecc;
425 buf = (uint8_t *)buf + copylen_minus_ecc;
426 pos += copylen;
427 }
428
429 rc = 0;
430
431 err:
432 free(bufecc);
433 return rc;
434 }
435
436 enum sm_comp_res {
437 sm_no_change,
438 sm_need_write,
439 sm_need_erase,
440 };
441
flash_smart_comp(struct flash_chip * c,const void * src,uint32_t offset,uint32_t size)442 static enum sm_comp_res flash_smart_comp(struct flash_chip *c,
443 const void *src,
444 uint32_t offset, uint32_t size)
445 {
446 uint8_t *b = c->smart_buf + offset;
447 const uint8_t *s = src;
448 bool is_same = true;
449 uint32_t i;
450
451 /* SRC DEST NEED_ERASE
452 * 0 1 0
453 * 1 1 0
454 * 0 0 0
455 * 1 0 1
456 */
457 for (i = 0; i < size; i++) {
458 /* Any bit need to be set, need erase */
459 if (s[i] & ~b[i])
460 return sm_need_erase;
461 if (is_same && (b[i] != s[i]))
462 is_same = false;
463 }
464 return is_same ? sm_no_change : sm_need_write;
465 }
466
flash_smart_write(struct blocklevel_device * bl,uint64_t dst,const void * src,uint64_t size)467 static int flash_smart_write(struct blocklevel_device *bl, uint64_t dst, const void *src, uint64_t size)
468 {
469 struct flash_chip *c = container_of(bl, struct flash_chip, bl);
470 uint32_t er_size = c->min_erase_mask + 1;
471 uint32_t end = dst + size;
472 int rc;
473
474 /* Some sanity checking */
475 if (end <= dst || !size || end > c->tsize) {
476 FL_DBG("LIBFLASH: Smart write param error\n");
477 return FLASH_ERR_PARM_ERROR;
478 }
479
480 FL_DBG("LIBFLASH: Smart writing to 0x%" PRIx64 "..0%" PRIx64 "...\n",
481 dst, dst + size);
482
483 /* As long as we have something to write ... */
484 while(dst < end) {
485 uint32_t page, off, chunk;
486 enum sm_comp_res sr;
487
488 /* Figure out which erase page we are in and read it */
489 page = dst & ~c->min_erase_mask;
490 off = dst & c->min_erase_mask;
491 FL_DBG("LIBFLASH: reading page 0x%08x..0x%08x...\n",
492 page, page + er_size);
493 rc = flash_read(bl, page, c->smart_buf, er_size);
494 if (rc) {
495 FL_DBG("LIBFLASH: ...error %d!\n", rc);
496 return rc;
497 }
498
499 /* Locate the chunk of data we are working on */
500 chunk = er_size - off;
501 if (size < chunk)
502 chunk = size;
503
504 /* Compare against what we are writing and ff */
505 sr = flash_smart_comp(c, src, off, chunk);
506 switch(sr) {
507 case sm_no_change:
508 /* Identical, skip it */
509 FL_DBG("LIBFLASH: ...same !\n");
510 break;
511 case sm_need_write:
512 /* Just needs writing over */
513 FL_DBG("LIBFLASH: ...need write !\n");
514 rc = flash_write(bl, dst, src, chunk, true);
515 if (rc) {
516 FL_DBG("LIBFLASH: Write error %d !\n", rc);
517 return rc;
518 }
519 break;
520 case sm_need_erase:
521 FL_DBG("LIBFLASH: ...need erase !\n");
522 rc = flash_erase(bl, page, er_size);
523 if (rc) {
524 FL_DBG("LIBFLASH: erase error %d !\n", rc);
525 return rc;
526 }
527 /* Then update the portion of the buffer and write the block */
528 memcpy(c->smart_buf + off, src, chunk);
529 rc = flash_write(bl, page, c->smart_buf, er_size, true);
530 if (rc) {
531 FL_DBG("LIBFLASH: write error %d !\n", rc);
532 return rc;
533 }
534 break;
535 }
536 dst += chunk;
537 src += chunk;
538 size -= chunk;
539 }
540 return 0;
541 }
542
flash_smart_write_corrected(struct blocklevel_device * bl,uint32_t dst,const void * src,uint32_t size,bool ecc)543 int flash_smart_write_corrected(struct blocklevel_device *bl, uint32_t dst, const void *src,
544 uint32_t size, bool ecc)
545 {
546 struct ecc64 *buf;
547 int rc;
548
549 if (!ecc)
550 return flash_smart_write(bl, dst, src, size);
551
552 buf = malloc(ecc_buffer_size(size));
553 if (!buf)
554 return FLASH_ERR_MALLOC_FAILED;
555
556 rc = memcpy_to_ecc(buf, src, size);
557 if (rc) {
558 rc = FLASH_ERR_ECC_INVALID;
559 goto out;
560 }
561
562 rc = flash_smart_write(bl, dst, buf, ecc_buffer_size(size));
563
564 out:
565 free(buf);
566 return rc;
567 }
568
fl_chip_id(struct spi_flash_ctrl * ct,uint8_t * id_buf,uint32_t * id_size)569 static int fl_chip_id(struct spi_flash_ctrl *ct, uint8_t *id_buf,
570 uint32_t *id_size)
571 {
572 int rc;
573 uint8_t stat;
574
575 /* Check initial status */
576 rc = fl_read_stat(ct, &stat);
577 if (rc)
578 return rc;
579
580 /* If stuck writing, wait for idle */
581 if (stat & STAT_WIP) {
582 FL_ERR("LIBFLASH: Flash in writing state ! Waiting...\n");
583 rc = fl_sync_wait_idle(ct);
584 if (rc)
585 return rc;
586 } else
587 FL_DBG("LIBFLASH: Init status: %02x\n", stat);
588
589 /* Fallback to get ID manually */
590 rc = ct->cmd_rd(ct, CMD_RDID, false, 0, id_buf, 3);
591 if (rc)
592 return rc;
593 *id_size = 3;
594
595 return 0;
596 }
597
flash_identify(struct flash_chip * c)598 static int flash_identify(struct flash_chip *c)
599 {
600 struct spi_flash_ctrl *ct = c->ctrl;
601 const struct flash_info *info = NULL;
602 uint32_t iid, id_size;
603 #define MAX_ID_SIZE 16
604 uint8_t id[MAX_ID_SIZE];
605 int rc, i;
606
607 if (ct->chip_id) {
608 /* High level controller interface */
609 id_size = MAX_ID_SIZE;
610 rc = ct->chip_id(ct, id, &id_size);
611 } else
612 rc = fl_chip_id(ct, id, &id_size);
613 if (rc)
614 return rc;
615 if (id_size < 3)
616 return FLASH_ERR_CHIP_UNKNOWN;
617
618 /* Convert to a dword for lookup */
619 iid = id[0];
620 iid = (iid << 8) | id[1];
621 iid = (iid << 8) | id[2];
622
623 FL_DBG("LIBFLASH: Flash ID: %02x.%02x.%02x (%06x)\n",
624 id[0], id[1], id[2], iid);
625
626 /* Lookup in flash_info */
627 for (i = 0; i < ARRAY_SIZE(flash_info); i++) {
628 info = &flash_info[i];
629 if (info->id == iid)
630 break;
631 }
632 if (!info || info->id != iid)
633 return FLASH_ERR_CHIP_UNKNOWN;
634
635 c->info = *info;
636 c->tsize = info->size;
637 ct->finfo = &c->info;
638
639 /*
640 * Let controller know about our settings and possibly
641 * override them
642 */
643 if (ct->setup) {
644 rc = ct->setup(ct, &c->tsize);
645 if (rc)
646 return rc;
647 }
648
649 /* Calculate min erase granularity */
650 if (c->info.flags & FL_ERASE_4K)
651 c->min_erase_mask = 0xfff;
652 else if (c->info.flags & FL_ERASE_32K)
653 c->min_erase_mask = 0x7fff;
654 else if (c->info.flags & FL_ERASE_64K)
655 c->min_erase_mask = 0xffff;
656 else {
657 /* No erase size ? oops ... */
658 FL_ERR("LIBFLASH: No erase sizes !\n");
659 return FLASH_ERR_CTRL_CONFIG_MISMATCH;
660 }
661
662 FL_DBG("LIBFLASH: Found chip %s size %dM erase granule: %dK\n",
663 c->info.name, c->tsize >> 20, (c->min_erase_mask + 1) >> 10);
664
665 return 0;
666 }
667
flash_set_4b(struct flash_chip * c,bool enable)668 static int flash_set_4b(struct flash_chip *c, bool enable)
669 {
670 struct spi_flash_ctrl *ct = c->ctrl;
671 int rc;
672
673 /* Don't have low level interface, assume all is well */
674 if (!ct->cmd_wr)
675 return 0;
676
677 /* Some flash chips want this */
678 rc = fl_wren(ct);
679 if (rc) {
680 FL_ERR("LIBFLASH: Error %d enabling write for set_4b\n", rc);
681 /* Ignore the error & move on (could be wrprotect chip) */
682 }
683
684 /* Ignore error in case chip is write protected */
685 return ct->cmd_wr(ct, enable ? CMD_EN4B : CMD_EX4B, false, 0, NULL, 0);
686 }
687
flash_force_4b_mode(struct flash_chip * c,bool enable_4b)688 int flash_force_4b_mode(struct flash_chip *c, bool enable_4b)
689 {
690 struct spi_flash_ctrl *ct = c->ctrl;
691 int rc = FLASH_ERR_4B_NOT_SUPPORTED;
692
693 /*
694 * We only allow force 4b if both controller and flash do 4b
695 * as this is mainly used if a 3rd party tries to directly
696 * access a direct mapped read region
697 */
698 if (enable_4b && !((c->info.flags & FL_CAN_4B) && ct->set_4b))
699 return rc;
700
701 /* Only send to flash directly on controllers that implement
702 * the low level callbacks
703 */
704 if (ct->cmd_wr) {
705 rc = flash_set_4b(c, enable_4b);
706 if (rc)
707 return rc;
708 }
709
710 /* Then inform the controller */
711 if (ct->set_4b)
712 rc = ct->set_4b(ct, enable_4b);
713 return rc;
714 }
715
flash_configure(struct flash_chip * c)716 static int flash_configure(struct flash_chip *c)
717 {
718 struct spi_flash_ctrl *ct = c->ctrl;
719 int rc;
720
721 /* Crop flash size if necessary */
722 if (c->tsize > 0x01000000 && !(c->info.flags & FL_CAN_4B)) {
723 FL_ERR("LIBFLASH: Flash chip cropped to 16M, no 4b mode\n");
724 c->tsize = 0x01000000;
725 }
726
727 /* If flash chip > 16M, enable 4b mode */
728 if (c->tsize > 0x01000000) {
729 FL_DBG("LIBFLASH: Flash >16MB, enabling 4B mode...\n");
730
731 /* Set flash to 4b mode if we can */
732 if (ct->cmd_wr) {
733 rc = flash_set_4b(c, true);
734 if (rc) {
735 FL_ERR("LIBFLASH: Failed to set flash 4b mode\n");
736 return rc;
737 }
738 }
739
740
741 /* Set controller to 4b mode if supported */
742 if (ct->set_4b) {
743 FL_DBG("LIBFLASH: Enabling controller 4B mode...\n");
744 rc = ct->set_4b(ct, true);
745 if (rc) {
746 FL_ERR("LIBFLASH: Failed to set controller 4b mode\n");
747 return rc;
748 }
749 }
750 } else {
751 FL_DBG("LIBFLASH: Flash <=16MB, disabling 4B mode...\n");
752
753 /*
754 * If flash chip supports 4b mode, make sure we disable
755 * it in case it was left over by the previous user
756 */
757 if (c->info.flags & FL_CAN_4B) {
758 rc = flash_set_4b(c, false);
759 if (rc) {
760 FL_ERR("LIBFLASH: Failed to"
761 " clear flash 4b mode\n");
762 return rc;
763 }
764 }
765 /* Set controller to 3b mode if mode switch is supported */
766 if (ct->set_4b) {
767 FL_DBG("LIBFLASH: Disabling controller 4B mode...\n");
768 rc = ct->set_4b(ct, false);
769 if (rc) {
770 FL_ERR("LIBFLASH: Failed to"
771 " clear controller 4b mode\n");
772 return rc;
773 }
774 }
775 }
776 return 0;
777 }
778
flash_get_info(struct blocklevel_device * bl,const char ** name,uint64_t * total_size,uint32_t * erase_granule)779 static int flash_get_info(struct blocklevel_device *bl, const char **name,
780 uint64_t *total_size, uint32_t *erase_granule)
781 {
782 struct flash_chip *c = container_of(bl, struct flash_chip, bl);
783 if (name)
784 *name = c->info.name;
785 if (total_size)
786 *total_size = c->tsize;
787 if (erase_granule)
788 *erase_granule = c->min_erase_mask + 1;
789 return 0;
790 }
791
flash_init(struct spi_flash_ctrl * ctrl,struct blocklevel_device ** bl,struct flash_chip ** flash_chip)792 int flash_init(struct spi_flash_ctrl *ctrl, struct blocklevel_device **bl,
793 struct flash_chip **flash_chip)
794 {
795 struct flash_chip *c;
796 int rc;
797
798 if (!bl)
799 return FLASH_ERR_PARM_ERROR;
800
801 *bl = NULL;
802
803 c = malloc(sizeof(struct flash_chip));
804 if (!c)
805 return FLASH_ERR_MALLOC_FAILED;
806 memset(c, 0, sizeof(*c));
807 c->ctrl = ctrl;
808
809 rc = flash_identify(c);
810 if (rc) {
811 FL_ERR("LIBFLASH: Flash identification failed\n");
812 goto bail;
813 }
814 c->smart_buf = malloc(c->min_erase_mask + 1);
815 if (!c->smart_buf) {
816 FL_ERR("LIBFLASH: Failed to allocate smart buffer !\n");
817 rc = FLASH_ERR_MALLOC_FAILED;
818 goto bail;
819 }
820 rc = flash_configure(c);
821 if (rc)
822 FL_ERR("LIBFLASH: Flash configuration failed\n");
823 bail:
824 if (rc) {
825 free(c);
826 return rc;
827 }
828
829 /* The flash backend doesn't support reiniting it */
830 c->bl.keep_alive = true;
831 c->bl.reacquire = NULL;
832 c->bl.release = NULL;
833 c->bl.read = &flash_read;
834 c->bl.write = &flash_smart_write;
835 c->bl.erase = &flash_erase;
836 c->bl.get_info = &flash_get_info;
837 c->bl.erase_mask = c->min_erase_mask;
838 c->bl.flags = WRITE_NEED_ERASE;
839
840 *bl = &(c->bl);
841 if (flash_chip)
842 *flash_chip = c;
843
844 return 0;
845 }
846
flash_exit(struct blocklevel_device * bl)847 void flash_exit(struct blocklevel_device *bl)
848 {
849 /* XXX Make sure we are idle etc... */
850 if (bl) {
851 struct flash_chip *c = container_of(bl, struct flash_chip, bl);
852 free(c->smart_buf);
853 free(c);
854 }
855 }
856
flash_exit_close(struct blocklevel_device * bl,void (* close)(struct spi_flash_ctrl * ctrl))857 void flash_exit_close(struct blocklevel_device *bl, void (*close)(struct spi_flash_ctrl *ctrl))
858 {
859 if (bl) {
860 struct flash_chip *c = container_of(bl, struct flash_chip, bl);
861 close(c->ctrl);
862 free(c);
863 }
864 }
865