1 /******************************************************************************/
2 /*                                                                            */
3 /* Broadcom BCM5700 Linux Network Driver, Copyright (c) 2001 Broadcom         */
4 /* Corporation.                                                               */
5 /* All rights reserved.                                                       */
6 /*                                                                            */
7 /* This program is free software; you can redistribute it and/or modify       */
8 /* it under the terms of the GNU General Public License as published by       */
9 /* the Free Software Foundation, located in the file LICENSE.                 */
10 /*                                                                            */
11 /* History:                                                                   */
12 /******************************************************************************/
13 
14 
15 #ifndef AUTONEG_H
16 #define AUTONEG_H
17 
18 
19 /******************************************************************************/
20 /* Constants. */
21 /******************************************************************************/
22 
23 #define AN_LINK_TIMER_INTERVAL_US           9000       /* 10ms */
24 
25 /* TRUE, FALSE */
26 #define AN_TRUE                             1
27 #define AN_FALSE                            0
28 
29 
30 /******************************************************************************/
31 /* Main data structure for keeping track of 802.3z auto-negotation state */
32 /* variables as shown in Figure 37-6 of the IEEE 802.3z specification. */
33 /******************************************************************************/
34 
35 typedef struct
36 {
37     /* Current auto-negotiation state. */
38     unsigned long State;
39     #define AN_STATE_UNKNOWN                        0
40     #define AN_STATE_AN_ENABLE                      1
41     #define AN_STATE_AN_RESTART_INIT                2
42     #define AN_STATE_AN_RESTART                     3
43     #define AN_STATE_DISABLE_LINK_OK                4
44     #define AN_STATE_ABILITY_DETECT_INIT            5
45     #define AN_STATE_ABILITY_DETECT                 6
46     #define AN_STATE_ACK_DETECT_INIT                7
47     #define AN_STATE_ACK_DETECT                     8
48     #define AN_STATE_COMPLETE_ACK_INIT              9
49     #define AN_STATE_COMPLETE_ACK                   10
50     #define AN_STATE_IDLE_DETECT_INIT               11
51     #define AN_STATE_IDLE_DETECT                    12
52     #define AN_STATE_LINK_OK                        13
53     #define AN_STATE_NEXT_PAGE_WAIT_INIT            14
54     #define AN_STATE_NEXT_PAGE_WAIT                 16
55 
56     /* Link timer. */
57     unsigned long LinkTime_us;
58 
59     /* Current time. */
60     unsigned long CurrentTime_us;
61 
62     /* Need these values for consistency check. */
63     unsigned short AbilityMatchCfg;
64 
65     /* Ability, idle, and ack match functions. */
66     unsigned long AbilityMatchCnt;
67     char AbilityMatch;
68     char IdleMatch;
69     char AckMatch;
70 
71     /* Tx config data */
72     union
73     {
74 	/* The TxConfig register is arranged as follows:                      */
75 	/*                                                                    */
76 	/* MSB                                                           LSB  */
77 	/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+  */
78 	/* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8|  */
79 	/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+  */
80 	struct
81 	{
82 #ifdef BIG_ENDIAN_HOST
83 	    unsigned int D7:1;        /* PS1 */
84 	    unsigned int D6:1;        /* HD */
85 	    unsigned int D5:1;        /* FD */
86 	    unsigned int D4:1;
87 	    unsigned int D3:1;
88 	    unsigned int D2:1;
89 	    unsigned int D1:1;
90 	    unsigned int D0:1;
91 	    unsigned int D15:1;       /* NP */
92 	    unsigned int D14:1;       /* ACK */
93 	    unsigned int D13:1;       /* RF2 */
94 	    unsigned int D12:1;       /* RF1 */
95 	    unsigned int D11:1;
96 	    unsigned int D10:1;
97 	    unsigned int D9:1;
98 	    unsigned int D8:1;        /* PS2 */
99 #else /* BIG_ENDIAN_HOST */
100 	    unsigned int D8:1;        /* PS2 */
101 	    unsigned int D9:1;
102 	    unsigned int D10:1;
103 	    unsigned int D11:1;
104 	    unsigned int D12:1;       /* RF1 */
105 	    unsigned int D13:1;       /* RF2 */
106 	    unsigned int D14:1;       /* ACK */
107 	    unsigned int D15:1;       /* NP */
108 	    unsigned int D0:1;
109 	    unsigned int D1:1;
110 	    unsigned int D2:1;
111 	    unsigned int D3:1;
112 	    unsigned int D4:1;
113 	    unsigned int D5:1;        /* FD */
114 	    unsigned int D6:1;        /* HD */
115 	    unsigned int D7:1;        /* PS1 */
116 #endif
117 	} bits;
118 
119 	unsigned short AsUSHORT;
120 
121 	#define D8_PS2                      bits.D8
122 	#define D12_RF1                     bits.D12
123 	#define D13_RF2                     bits.D13
124 	#define D14_ACK                     bits.D14
125 	#define D15_NP                      bits.D15
126 	#define D5_FD                       bits.D5
127 	#define D6_HD                       bits.D6
128 	#define D7_PS1                      bits.D7
129     } TxConfig;
130 
131     /* Rx config data */
132     union
133     {
134 	/* The RxConfig register is arranged as follows:                      */
135 	/*                                                                    */
136 	/* MSB                                                           LSB  */
137 	/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+  */
138 	/* | D7| D6| D5| D4| D3| D2| D1| D0|D15|D14|D13|D12|D11|D10| D9| D8|  */
139 	/* +---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+---+  */
140 	struct
141 	{
142 #ifdef BIG_ENDIAN_HOST
143 	    unsigned int D7:1;        /* PS1 */
144 	    unsigned int D6:1;        /* HD */
145 	    unsigned int D5:1;        /* FD */
146 	    unsigned int D4:1;
147 	    unsigned int D3:1;
148 	    unsigned int D2:1;
149 	    unsigned int D1:1;
150 	    unsigned int D0:1;
151 	    unsigned int D15:1;       /* NP */
152 	    unsigned int D14:1;       /* ACK */
153 	    unsigned int D13:1;       /* RF2 */
154 	    unsigned int D12:1;       /* RF1 */
155 	    unsigned int D11:1;
156 	    unsigned int D10:1;
157 	    unsigned int D9:1;
158 	    unsigned int D8:1;        /* PS2 */
159 #else /* BIG_ENDIAN_HOST */
160 	    unsigned int D8:1;        /* PS2 */
161 	    unsigned int D9:1;
162 	    unsigned int D10:1;
163 	    unsigned int D11:1;
164 	    unsigned int D12:1;       /* RF1 */
165 	    unsigned int D13:1;       /* RF2 */
166 	    unsigned int D14:1;       /* ACK */
167 	    unsigned int D15:1;       /* NP */
168 	    unsigned int D0:1;
169 	    unsigned int D1:1;
170 	    unsigned int D2:1;
171 	    unsigned int D3:1;
172 	    unsigned int D4:1;
173 	    unsigned int D5:1;        /* FD */
174 	    unsigned int D6:1;        /* HD */
175 	    unsigned int D7:1;        /* PS1 */
176 #endif
177 	} bits;
178 
179 	unsigned short AsUSHORT;
180     } RxConfig;
181 
182     #define AN_CONFIG_NP                            0x0080
183     #define AN_CONFIG_ACK                           0x0040
184     #define AN_CONFIG_RF2                           0x0020
185     #define AN_CONFIG_RF1                           0x0010
186     #define AN_CONFIG_PS2                           0x0001
187     #define AN_CONFIG_PS1                           0x8000
188     #define AN_CONFIG_HD                            0x4000
189     #define AN_CONFIG_FD                            0x2000
190 
191 
192     /* Management registers. */
193 
194     /* Control register. */
195     union
196     {
197 	struct
198 	{
199 	    unsigned int an_enable:1;
200 	    unsigned int loopback:1;
201 	    unsigned int reset:1;
202 	    unsigned int restart_an:1;
203 	} bits;
204 
205 	unsigned short AsUSHORT;
206 
207 	#define mr_an_enable                Mr0.bits.an_enable
208 	#define mr_loopback                 Mr0.bits.loopback
209 	#define mr_main_reset               Mr0.bits.reset
210 	#define mr_restart_an               Mr0.bits.restart_an
211     } Mr0;
212 
213     /* Status register. */
214     union
215     {
216 	struct
217 	{
218 	    unsigned int an_complete:1;
219 	    unsigned int link_ok:1;
220 	} bits;
221 
222 	unsigned short AsUSHORT;
223 
224 	#define mr_an_complete              Mr1.bits.an_complete
225 	#define mr_link_ok                  Mr1.bits.link_ok
226     } Mr1;
227 
228     /* Advertisement register. */
229     union
230     {
231 	struct
232 	{
233 	    unsigned int reserved_4:5;
234 	    unsigned int full_duplex:1;
235 	    unsigned int half_duplex:1;
236 	    unsigned int sym_pause:1;
237 	    unsigned int asym_pause:1;
238 	    unsigned int reserved_11:3;
239 	    unsigned int remote_fault1:1;
240 	    unsigned int remote_fault2:1;
241 	    unsigned int reserved_14:1;
242 	    unsigned int next_page:1;
243 	} bits;
244 
245 	unsigned short AsUSHORT;
246 
247 	#define mr_adv_full_duplex          Mr4.bits.full_duplex
248 	#define mr_adv_half_duplex          Mr4.bits.half_duplex
249 	#define mr_adv_sym_pause            Mr4.bits.sym_pause
250 	#define mr_adv_asym_pause           Mr4.bits.asym_pause
251 	#define mr_adv_remote_fault1        Mr4.bits.remote_fault1
252 	#define mr_adv_remote_fault2        Mr4.bits.remote_fault2
253 	#define mr_adv_next_page            Mr4.bits.next_page
254     } Mr4;
255 
256     /* Link partner advertisement register. */
257     union
258     {
259 	struct
260 	{
261 	    unsigned int reserved_4:5;
262 	    unsigned int lp_full_duplex:1;
263 	    unsigned int lp_half_duplex:1;
264 	    unsigned int lp_sym_pause:1;
265 	    unsigned int lp_asym_pause:1;
266 	    unsigned int reserved_11:3;
267 	    unsigned int lp_remote_fault1:1;
268 	    unsigned int lp_remote_fault2:1;
269 	    unsigned int lp_ack:1;
270 	    unsigned int lp_next_page:1;
271 	} bits;
272 
273 	unsigned short AsUSHORT;
274 
275 	#define mr_lp_adv_full_duplex       Mr5.bits.lp_full_duplex
276 	#define mr_lp_adv_half_duplex       Mr5.bits.lp_half_duplex
277 	#define mr_lp_adv_sym_pause         Mr5.bits.lp_sym_pause
278 	#define mr_lp_adv_asym_pause        Mr5.bits.lp_asym_pause
279 	#define mr_lp_adv_remote_fault1     Mr5.bits.lp_remote_fault1
280 	#define mr_lp_adv_remote_fault2     Mr5.bits.lp_remote_fault2
281 	#define mr_lp_adv_next_page         Mr5.bits.lp_next_page
282     } Mr5;
283 
284     /* Auto-negotiation expansion register. */
285     union
286     {
287 	struct
288 	{
289 	    unsigned int reserved_0:1;
290 	    unsigned int page_received:1;
291 	    unsigned int next_pageable:1;
292 	    unsigned int reserved_15:13;
293 	} bits;
294 
295 	unsigned short AsUSHORT;
296     } Mr6;
297 
298     /* Auto-negotiation next page transmit register. */
299     union
300     {
301 	struct
302 	{
303 	    unsigned int code_field:11;
304 	    unsigned int toggle:1;
305 	    unsigned int ack2:1;
306 	    unsigned int message_page:1;
307 	    unsigned int reserved_14:1;
308 	    unsigned int next_page:1;
309 	} bits;
310 
311 	unsigned short AsUSHORT;
312 
313 	#define mr_np_tx                    Mr7.AsUSHORT
314     } Mr7;
315 
316     /* Auto-negotiation link partner ability register. */
317     union
318     {
319 	struct
320 	{
321 	    unsigned int code_field:11;
322 	    unsigned int toggle:1;
323 	    unsigned int ack2:1;
324 	    unsigned int message_page:1;
325 	    unsigned int ack:1;
326 	    unsigned int next_page:1;
327 	} bits;
328 
329 	unsigned short AsUSHORT;
330 
331 	#define mr_lp_np_rx                 Mr8.AsUSHORT
332     } Mr8;
333 
334     /* Extended status register. */
335     union
336     {
337 	struct
338 	{
339 	    unsigned int reserved_11:12;
340 	    unsigned int base1000_t_hd:1;
341 	    unsigned int base1000_t_fd:1;
342 	    unsigned int base1000_x_hd:1;
343 	    unsigned int base1000_x_fd:1;
344 	} bits;
345 
346 	unsigned short AsUSHORT;
347     } Mr15;
348 
349     /* Miscellaneous state variables. */
350     union
351     {
352 	struct
353 	{
354 	    unsigned int toggle_tx:1;
355 	    unsigned int toggle_rx:1;
356 	    unsigned int np_rx:1;
357 	    unsigned int page_rx:1;
358 	    unsigned int np_loaded:1;
359 	} bits;
360 
361 	unsigned short AsUSHORT;
362 
363 	#define mr_toggle_tx                MrMisc.bits.toggle_tx
364 	#define mr_toggle_rx                MrMisc.bits.toggle_rx
365 	#define mr_np_rx                    MrMisc.bits.np_rx
366 	#define mr_page_rx                  MrMisc.bits.page_rx
367 	#define mr_np_loaded                MrMisc.bits.np_loaded
368     } MrMisc;
369 
370 
371     /* Implement specifics */
372 
373     /* Pointer to the operating system specific data structure. */
374     void *pContext;
375 } AN_STATE_INFO, *PAN_STATE_INFO;
376 
377 
378 /******************************************************************************/
379 /* Return code of Autoneg8023z. */
380 /******************************************************************************/
381 
382 typedef enum
383 {
384     AUTONEG_STATUS_OK               = 0,
385     AUTONEG_STATUS_DONE             = 1,
386     AUTONEG_STATUS_TIMER_ENABLED    = 2,
387     AUTONEG_STATUS_FAILED           = 0xfffffff
388 } AUTONEG_STATUS, *PAUTONEG_STATUS;
389 
390 
391 /******************************************************************************/
392 /* Function prototypes. */
393 /******************************************************************************/
394 
395 AUTONEG_STATUS Autoneg8023z(PAN_STATE_INFO pAnInfo);
396 void AutonegInit(PAN_STATE_INFO pAnInfo);
397 
398 
399 /******************************************************************************/
400 /* The following functions are defined in the os-dependent module. */
401 /******************************************************************************/
402 
403 void MM_AnTxConfig(PAN_STATE_INFO pAnInfo);
404 void MM_AnTxIdle(PAN_STATE_INFO pAnInfo);
405 char MM_AnRxConfig(PAN_STATE_INFO pAnInfo, unsigned short *pRxConfig);
406 
407 
408 #endif /* AUTONEG_H */
409