1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * (C) Copyright 2010
4 * Armando Visconti, ST Micoelectronics, <armando.visconti@st.com>.
5 *
6 * (C) Copyright 2009
7 * Marvell Semiconductor <www.marvell.com>
8 * Written-by: Prafulla Wadaskar <prafulla@marvell.com>
9 */
10
11 #include <common.h>
12 #include <log.h>
13 #include <asm/io.h>
14 #include <usb.h>
15 #include <linux/delay.h>
16 #include "ehci.h"
17 #include <asm/arch/hardware.h>
18 #include <asm/arch/spr_misc.h>
19
spear6xx_usbh_stop(void)20 static void spear6xx_usbh_stop(void)
21 {
22 struct misc_regs *const misc_p =
23 (struct misc_regs *)CONFIG_SPEAR_MISCBASE;
24 u32 periph1_rst = readl(misc_p->periph1_rst);
25
26 periph1_rst |= PERIPH_USBH1 | PERIPH_USBH2;
27 writel(periph1_rst, misc_p->periph1_rst);
28
29 udelay(1000);
30 periph1_rst &= ~(PERIPH_USBH1 | PERIPH_USBH2);
31 writel(periph1_rst, misc_p->periph1_rst);
32 }
33
34 /*
35 * Create the appropriate control structures to manage
36 * a new EHCI host controller.
37 */
ehci_hcd_init(int index,enum usb_init_type init,struct ehci_hccr ** hccr,struct ehci_hcor ** hcor)38 int ehci_hcd_init(int index, enum usb_init_type init,
39 struct ehci_hccr **hccr, struct ehci_hcor **hcor)
40 {
41 u32 ehci = 0;
42
43 switch (index) {
44 case 0:
45 ehci = CONFIG_SYS_UHC0_EHCI_BASE;
46 break;
47 case 1:
48 ehci = CONFIG_SYS_UHC1_EHCI_BASE;
49 break;
50 default:
51 printf("ERROR: wrong controller index!\n");
52 break;
53 };
54
55 *hccr = (struct ehci_hccr *)(ehci + 0x100);
56 *hcor = (struct ehci_hcor *)((uint32_t) *hccr +
57 HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
58
59 debug("SPEAr-ehci: init hccr %x and hcor %x hc_length %d\n",
60 (uint32_t)*hccr, (uint32_t)*hcor,
61 (uint32_t)HC_LENGTH(ehci_readl(&(*hccr)->cr_capbase)));
62
63 return 0;
64 }
65
66 /*
67 * Destroy the appropriate control structures corresponding
68 * the the EHCI host controller.
69 */
ehci_hcd_stop(int index)70 int ehci_hcd_stop(int index)
71 {
72 #if defined(CONFIG_SPEAR600)
73 spear6xx_usbh_stop();
74 #endif
75
76 return 0;
77 }
78