1 /*
2 * Definitions for RTL818x hardware
3 *
4 * Copyright 2007 Michael Wu <flamingice@sourmilk.net>
5 * Copyright 2007 Andrea Merello <andreamrl@tiscali.it>
6 *
7 * Modified for iPXE, June 2009, by Joshua Oreman <oremanj@rwcr.net>
8 *
9 * Based on the r8187 driver, which is:
10 * Copyright 2005 Andrea Merello <andreamrl@tiscali.it>, et al.
11 *
12 * This program is free software; you can redistribute it and/or modify
13 * it under the terms of the GNU General Public License version 2 as
14 * published by the Free Software Foundation.
15 */
16
17 #ifndef RTL818X_H
18 #define RTL818X_H
19
20 #include <ipxe/spi_bit.h>
21 #include <ipxe/tables.h>
22 #include <ipxe/net80211.h>
23
24 FILE_LICENCE(GPL2_ONLY);
25
26 struct rtl818x_csr {
27 u8 MAC[6];
28 u8 reserved_0[2];
29 u32 MAR[2];
30 u8 RX_FIFO_COUNT;
31 u8 reserved_1;
32 u8 TX_FIFO_COUNT;
33 u8 BQREQ;
34 u8 reserved_2[4];
35 u32 TSFT[2];
36 u32 TLPDA;
37 u32 TNPDA;
38 u32 THPDA;
39 u16 BRSR;
40 u8 BSSID[6];
41 u8 RESP_RATE;
42 u8 EIFS;
43 u8 reserved_3[1];
44 u8 CMD;
45 #define RTL818X_CMD_TX_ENABLE (1 << 2)
46 #define RTL818X_CMD_RX_ENABLE (1 << 3)
47 #define RTL818X_CMD_RESET (1 << 4)
48 u8 reserved_4[4];
49 u16 INT_MASK;
50 u16 INT_STATUS;
51 #define RTL818X_INT_RX_OK (1 << 0)
52 #define RTL818X_INT_RX_ERR (1 << 1)
53 #define RTL818X_INT_TXL_OK (1 << 2)
54 #define RTL818X_INT_TXL_ERR (1 << 3)
55 #define RTL818X_INT_RX_DU (1 << 4)
56 #define RTL818X_INT_RX_FO (1 << 5)
57 #define RTL818X_INT_TXN_OK (1 << 6)
58 #define RTL818X_INT_TXN_ERR (1 << 7)
59 #define RTL818X_INT_TXH_OK (1 << 8)
60 #define RTL818X_INT_TXH_ERR (1 << 9)
61 #define RTL818X_INT_TXB_OK (1 << 10)
62 #define RTL818X_INT_TXB_ERR (1 << 11)
63 #define RTL818X_INT_ATIM (1 << 12)
64 #define RTL818X_INT_BEACON (1 << 13)
65 #define RTL818X_INT_TIME_OUT (1 << 14)
66 #define RTL818X_INT_TX_FO (1 << 15)
67 u32 TX_CONF;
68 #define RTL818X_TX_CONF_LOOPBACK_MAC (1 << 17)
69 #define RTL818X_TX_CONF_LOOPBACK_CONT (3 << 17)
70 #define RTL818X_TX_CONF_NO_ICV (1 << 19)
71 #define RTL818X_TX_CONF_DISCW (1 << 20)
72 #define RTL818X_TX_CONF_SAT_HWPLCP (1 << 24)
73 #define RTL818X_TX_CONF_R8180_ABCD (2 << 25)
74 #define RTL818X_TX_CONF_R8180_F (3 << 25)
75 #define RTL818X_TX_CONF_R8185_ABC (4 << 25)
76 #define RTL818X_TX_CONF_R8185_D (5 << 25)
77 #define RTL818X_TX_CONF_R8187vD (5 << 25)
78 #define RTL818X_TX_CONF_R8187vD_B (6 << 25)
79 #define RTL818X_TX_CONF_HWVER_MASK (7 << 25)
80 #define RTL818X_TX_CONF_DISREQQSIZE (1 << 28)
81 #define RTL818X_TX_CONF_PROBE_DTS (1 << 29)
82 #define RTL818X_TX_CONF_HW_SEQNUM (1 << 30)
83 #define RTL818X_TX_CONF_CW_MIN (1 << 31)
84 u32 RX_CONF;
85 #define RTL818X_RX_CONF_MONITOR (1 << 0)
86 #define RTL818X_RX_CONF_NICMAC (1 << 1)
87 #define RTL818X_RX_CONF_MULTICAST (1 << 2)
88 #define RTL818X_RX_CONF_BROADCAST (1 << 3)
89 #define RTL818X_RX_CONF_FCS (1 << 5)
90 #define RTL818X_RX_CONF_DATA (1 << 18)
91 #define RTL818X_RX_CONF_CTRL (1 << 19)
92 #define RTL818X_RX_CONF_MGMT (1 << 20)
93 #define RTL818X_RX_CONF_ADDR3 (1 << 21)
94 #define RTL818X_RX_CONF_PM (1 << 22)
95 #define RTL818X_RX_CONF_BSSID (1 << 23)
96 #define RTL818X_RX_CONF_RX_AUTORESETPHY (1 << 28)
97 #define RTL818X_RX_CONF_CSDM1 (1 << 29)
98 #define RTL818X_RX_CONF_CSDM2 (1 << 30)
99 #define RTL818X_RX_CONF_ONLYERLPKT (1 << 31)
100 u32 INT_TIMEOUT;
101 u32 TBDA;
102 u8 EEPROM_CMD;
103 #define RTL818X_EEPROM_CMD_READ (1 << 0)
104 #define RTL818X_EEPROM_CMD_WRITE (1 << 1)
105 #define RTL818X_EEPROM_CMD_CK (1 << 2)
106 #define RTL818X_EEPROM_CMD_CS (1 << 3)
107 #define RTL818X_EEPROM_CMD_NORMAL (0 << 6)
108 #define RTL818X_EEPROM_CMD_LOAD (1 << 6)
109 #define RTL818X_EEPROM_CMD_PROGRAM (2 << 6)
110 #define RTL818X_EEPROM_CMD_CONFIG (3 << 6)
111 u8 CONFIG0;
112 u8 CONFIG1;
113 u8 CONFIG2;
114 #define RTL818X_CONFIG2_ANTENNA_DIV (1 << 6)
115 u32 ANAPARAM;
116 u8 MSR;
117 #define RTL818X_MSR_NO_LINK (0 << 2)
118 #define RTL818X_MSR_ADHOC (1 << 2)
119 #define RTL818X_MSR_INFRA (2 << 2)
120 #define RTL818X_MSR_MASTER (3 << 2)
121 #define RTL818X_MSR_ENEDCA (4 << 2)
122 u8 CONFIG3;
123 #define RTL818X_CONFIG3_ANAPARAM_WRITE (1 << 6)
124 #define RTL818X_CONFIG3_GNT_SELECT (1 << 7)
125 u8 CONFIG4;
126 #define RTL818X_CONFIG4_POWEROFF (1 << 6)
127 #define RTL818X_CONFIG4_VCOOFF (1 << 7)
128 u8 TESTR;
129 u8 reserved_9[2];
130 u8 PGSELECT;
131 u8 SECURITY;
132 u32 ANAPARAM2;
133 u8 reserved_10[12];
134 u16 BEACON_INTERVAL;
135 u16 ATIM_WND;
136 u16 BEACON_INTERVAL_TIME;
137 u16 ATIMTR_INTERVAL;
138 u8 PHY_DELAY;
139 u8 CARRIER_SENSE_COUNTER;
140 u8 reserved_11[2];
141 u8 PHY[4];
142 u16 RFPinsOutput;
143 u16 RFPinsEnable;
144 u16 RFPinsSelect;
145 u16 RFPinsInput;
146 u32 RF_PARA;
147 u32 RF_TIMING;
148 u8 GP_ENABLE;
149 u8 GPIO;
150 u8 reserved_12[2];
151 u32 HSSI_PARA;
152 u8 reserved_13[4];
153 u8 TX_AGC_CTL;
154 #define RTL818X_TX_AGC_CTL_PERPACKET_GAIN_SHIFT (1 << 0)
155 #define RTL818X_TX_AGC_CTL_PERPACKET_ANTSEL_SHIFT (1 << 1)
156 #define RTL818X_TX_AGC_CTL_FEEDBACK_ANT (1 << 2)
157 u8 TX_GAIN_CCK;
158 u8 TX_GAIN_OFDM;
159 u8 TX_ANTENNA;
160 u8 reserved_14[16];
161 u8 WPA_CONF;
162 u8 reserved_15[3];
163 u8 SIFS;
164 u8 DIFS;
165 u8 SLOT;
166 u8 reserved_16[5];
167 u8 CW_CONF;
168 #define RTL818X_CW_CONF_PERPACKET_CW_SHIFT (1 << 0)
169 #define RTL818X_CW_CONF_PERPACKET_RETRY_SHIFT (1 << 1)
170 u8 CW_VAL;
171 u8 RATE_FALLBACK;
172 #define RTL818X_RATE_FALLBACK_ENABLE (1 << 7)
173 u8 ACM_CONTROL;
174 u8 reserved_17[24];
175 u8 CONFIG5;
176 u8 TX_DMA_POLLING;
177 u8 reserved_18[2];
178 u16 CWR;
179 u8 RETRY_CTR;
180 u8 reserved_19[3];
181 u16 INT_MIG;
182 /* RTL818X_R8187B_*: magic numbers from ioregisters */
183 #define RTL818X_R8187B_B 0
184 #define RTL818X_R8187B_D 1
185 #define RTL818X_R8187B_E 2
186 u32 RDSAR;
187 u16 TID_AC_MAP;
188 u8 reserved_20[4];
189 u8 ANAPARAM3;
190 u8 reserved_21[5];
191 u16 FEMR;
192 u8 reserved_22[4];
193 u16 TALLY_CNT;
194 u8 TALLY_SEL;
195 } __attribute__((packed));
196
197 #define MAX_RX_SIZE IEEE80211_MAX_FRAME_LEN
198
199 #define RF_PARAM_ANALOGPHY (1 << 0)
200 #define RF_PARAM_ANTBDEFAULT (1 << 1)
201 #define RF_PARAM_CARRIERSENSE1 (1 << 2)
202 #define RF_PARAM_CARRIERSENSE2 (1 << 3)
203
204 #define BB_ANTATTEN_CHAN14 0x0C
205 #define BB_ANTENNA_B 0x40
206
207 #define BB_HOST_BANG (1 << 30)
208 #define BB_HOST_BANG_EN (1 << 2)
209 #define BB_HOST_BANG_CLK (1 << 1)
210 #define BB_HOST_BANG_DATA 1
211
212 #define ANAPARAM_TXDACOFF_SHIFT 27
213 #define ANAPARAM_PWR0_SHIFT 28
214 #define ANAPARAM_PWR0_MASK (0x07 << ANAPARAM_PWR0_SHIFT)
215 #define ANAPARAM_PWR1_SHIFT 20
216 #define ANAPARAM_PWR1_MASK (0x7F << ANAPARAM_PWR1_SHIFT)
217
218 #define RTL818X_RX_RING_SIZE 8 /* doesn't have to be a power of 2 */
219 #define RTL818X_TX_RING_SIZE 8 /* nor this [but 2^n is very slightly faster] */
220 #define RTL818X_RING_ALIGN 256
221
222 #define RTL818X_MAX_RETRIES 4
223
224 enum rtl818x_tx_desc_flags {
225 RTL818X_TX_DESC_FLAG_NO_ENC = (1 << 15),
226 RTL818X_TX_DESC_FLAG_TX_OK = (1 << 15),
227 RTL818X_TX_DESC_FLAG_SPLCP = (1 << 16),
228 RTL818X_TX_DESC_FLAG_RX_UNDER = (1 << 16),
229 RTL818X_TX_DESC_FLAG_MOREFRAG = (1 << 17),
230 RTL818X_TX_DESC_FLAG_CTS = (1 << 18),
231 RTL818X_TX_DESC_FLAG_RTS = (1 << 23),
232 RTL818X_TX_DESC_FLAG_LS = (1 << 28),
233 RTL818X_TX_DESC_FLAG_FS = (1 << 29),
234 RTL818X_TX_DESC_FLAG_DMA = (1 << 30),
235 RTL818X_TX_DESC_FLAG_OWN = (1 << 31)
236 };
237
238 struct rtl818x_tx_desc {
239 u32 flags;
240 u16 rts_duration;
241 u16 plcp_len;
242 u32 tx_buf;
243 u32 frame_len;
244 u32 next_tx_desc;
245 u8 cw;
246 u8 retry_limit;
247 u8 agc;
248 u8 flags2;
249 u32 reserved[2];
250 } __attribute__ ((packed));
251
252 enum rtl818x_rx_desc_flags {
253 RTL818X_RX_DESC_FLAG_ICV_ERR = (1 << 12),
254 RTL818X_RX_DESC_FLAG_CRC32_ERR = (1 << 13),
255 RTL818X_RX_DESC_FLAG_PM = (1 << 14),
256 RTL818X_RX_DESC_FLAG_RX_ERR = (1 << 15),
257 RTL818X_RX_DESC_FLAG_BCAST = (1 << 16),
258 RTL818X_RX_DESC_FLAG_PAM = (1 << 17),
259 RTL818X_RX_DESC_FLAG_MCAST = (1 << 18),
260 RTL818X_RX_DESC_FLAG_QOS = (1 << 19), /* RTL8187(B) only */
261 RTL818X_RX_DESC_FLAG_TRSW = (1 << 24), /* RTL8187(B) only */
262 RTL818X_RX_DESC_FLAG_SPLCP = (1 << 25),
263 RTL818X_RX_DESC_FLAG_FOF = (1 << 26),
264 RTL818X_RX_DESC_FLAG_DMA_FAIL = (1 << 27),
265 RTL818X_RX_DESC_FLAG_LS = (1 << 28),
266 RTL818X_RX_DESC_FLAG_FS = (1 << 29),
267 RTL818X_RX_DESC_FLAG_EOR = (1 << 30),
268 RTL818X_RX_DESC_FLAG_OWN = (1 << 31)
269 };
270
271 struct rtl818x_rx_desc {
272 u32 flags;
273 u32 flags2;
274 union {
275 u32 rx_buf;
276 u64 tsft;
277 };
278 } __attribute__ ((packed));
279
280 struct rtl818x_priv {
281 struct rtl818x_csr *map;
282 const struct rtl818x_rf_ops *rf;
283 int rf_flag; /* whatever RF driver wishes to use it for */
284 int hw_rate;
285 int hw_rtscts_rate;
286
287 struct spi_bit_basher spibit;
288 struct spi_device eeprom;
289
290 struct rtl818x_rx_desc *rx_ring;
291 u32 rx_ring_dma;
292 unsigned int rx_idx; /* next desc to be filled by card */
293 struct io_buffer *rx_buf[RTL818X_RX_RING_SIZE];
294
295 struct rtl818x_tx_desc *tx_ring;
296 u32 tx_ring_dma;
297 unsigned int tx_cons; /* next desc to be filled by card */
298 unsigned int tx_prod; /* next desc to be filled by driver */
299 struct io_buffer *tx_buf[RTL818X_TX_RING_SIZE];
300
301 struct pci_device *pdev;
302 u32 rx_conf;
303
304 u16 txpower[14];
305
306 int r8185;
307 u32 anaparam;
308 u16 rfparam;
309 u8 csthreshold;
310 };
311
312 void rtl818x_write_phy(struct net80211_device *dev, u8 addr, u32 data);
313 void rtl818x_set_anaparam(struct rtl818x_priv *priv, u32 anaparam);
314
rtl818x_ioread8(struct rtl818x_priv * priv __unused,u8 * addr)315 static inline u8 rtl818x_ioread8(struct rtl818x_priv *priv __unused, u8 *addr)
316 {
317 return inb(addr);
318 }
319
rtl818x_ioread16(struct rtl818x_priv * priv __unused,u16 * addr)320 static inline u16 rtl818x_ioread16(struct rtl818x_priv *priv __unused, u16 *addr)
321 {
322 return inw(addr);
323 }
324
rtl818x_ioread32(struct rtl818x_priv * priv __unused,u32 * addr)325 static inline u32 rtl818x_ioread32(struct rtl818x_priv *priv __unused, u32 *addr)
326 {
327 return inl(addr);
328 }
329
rtl818x_iowrite8(struct rtl818x_priv * priv __unused,u8 * addr,u8 val)330 static inline void rtl818x_iowrite8(struct rtl818x_priv *priv __unused,
331 u8 *addr, u8 val)
332 {
333 outb(val, addr);
334 }
335
rtl818x_iowrite16(struct rtl818x_priv * priv __unused,u16 * addr,u16 val)336 static inline void rtl818x_iowrite16(struct rtl818x_priv *priv __unused,
337 u16 *addr, u16 val)
338 {
339 outw(val, addr);
340 }
341
rtl818x_iowrite32(struct rtl818x_priv * priv __unused,u32 * addr,u32 val)342 static inline void rtl818x_iowrite32(struct rtl818x_priv *priv __unused,
343 u32 *addr, u32 val)
344 {
345 outl(val, addr);
346 }
347
348 #define RTL818X_RF_DRIVERS __table(struct rtl818x_rf_ops, "rtl818x_rf_drivers")
349 #define __rtl818x_rf_driver __table_entry(RTL818X_RF_DRIVERS, 01)
350
351 struct rtl818x_rf_ops {
352 char *name;
353 u8 id; /* as identified in EEPROM */
354 void (*init)(struct net80211_device *dev);
355 void (*stop)(struct net80211_device *dev);
356 void (*set_chan)(struct net80211_device *dev, struct net80211_channel *chan);
357 void (*conf_erp)(struct net80211_device *dev); /* set based on dev->erp_flags */
358 };
359
360 extern int rtl818x_probe(struct pci_device *pdev );
361 extern void rtl818x_remove(struct pci_device *pdev);
362
363 #endif /* RTL818X_H */
364