1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3 * Copyright (C) 2017 DENX Software Engineering
4 * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
5 */
6
7 #include <asm/mach-imx/iomux-v3.h>
8 #include <asm/arch/mx6-pins.h>
9 #include "common.h"
10
11 iomux_v3_cfg_t const uart_pads[] = {
12 /* UART4 */
13 MX6_PAD_CSI0_DAT12__UART4_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
14 MX6_PAD_CSI0_DAT13__UART4_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
15 MX6_PAD_CSI0_DAT16__UART4_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
16 MX6_PAD_CSI0_DAT17__UART4_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
17 };
18
19 iomux_v3_cfg_t const uart_console_pads[] = {
20 /* UART5 */
21 MX6_PAD_CSI0_DAT14__UART5_TX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
22 MX6_PAD_CSI0_DAT15__UART5_RX_DATA | MUX_PAD_CTRL(UART_PAD_CTRL),
23 MX6_PAD_CSI0_DAT18__UART5_RTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
24 MX6_PAD_CSI0_DAT19__UART5_CTS_B | MUX_PAD_CTRL(UART_PAD_CTRL),
25 };
26
displ5_set_iomux_uart_spl(void)27 void displ5_set_iomux_uart_spl(void)
28 {
29 SETUP_IOMUX_PADS(uart_console_pads);
30 }
31
displ5_set_iomux_uart(void)32 void displ5_set_iomux_uart(void)
33 {
34 SETUP_IOMUX_PADS(uart_pads);
35 }
36
37 iomux_v3_cfg_t const misc_pads_spl[] = {
38 /* Emergency recovery pin */
39 MX6_PAD_EIM_D29__GPIO3_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
40 };
41
displ5_set_iomux_misc_spl(void)42 void displ5_set_iomux_misc_spl(void)
43 {
44 SETUP_IOMUX_PADS(misc_pads_spl);
45 }
46
47 #ifdef CONFIG_MXC_SPI
48 iomux_v3_cfg_t const ecspi_pads[] = {
49 /* SPI3 */
50 MX6_PAD_DISP0_DAT2__ECSPI3_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
51 MX6_PAD_DISP0_DAT1__ECSPI3_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
52 MX6_PAD_DISP0_DAT0__ECSPI3_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
53 MX6_PAD_DISP0_DAT3__ECSPI3_SS0 | MUX_PAD_CTRL(NO_PAD_CTRL),
54 MX6_PAD_DISP0_DAT4__ECSPI3_SS1 | MUX_PAD_CTRL(NO_PAD_CTRL),
55 MX6_PAD_DISP0_DAT5__ECSPI3_SS2 | MUX_PAD_CTRL(NO_PAD_CTRL),
56 MX6_PAD_DISP0_DAT6__ECSPI3_SS3 | MUX_PAD_CTRL(NO_PAD_CTRL),
57 MX6_PAD_DISP0_DAT7__ECSPI3_RDY | MUX_PAD_CTRL(NO_PAD_CTRL),
58 };
59
60 iomux_v3_cfg_t const ecspi2_pads[] = {
61 /* SPI2, NOR Flash nWP, CS0 */
62 MX6_PAD_CSI0_DAT10__ECSPI2_MISO | MUX_PAD_CTRL(SPI_PAD_CTRL),
63 MX6_PAD_CSI0_DAT9__ECSPI2_MOSI | MUX_PAD_CTRL(SPI_PAD_CTRL),
64 MX6_PAD_CSI0_DAT8__ECSPI2_SCLK | MUX_PAD_CTRL(SPI_PAD_CTRL),
65 MX6_PAD_CSI0_DAT11__GPIO5_IO29 | MUX_PAD_CTRL(NO_PAD_CTRL),
66 MX6_PAD_SD3_DAT5__GPIO7_IO00 | MUX_PAD_CTRL(NO_PAD_CTRL),
67 };
68
board_spi_cs_gpio(unsigned int bus,unsigned int cs)69 int board_spi_cs_gpio(unsigned int bus, unsigned int cs)
70 {
71 if (bus != 1 || cs != (IMX_GPIO_NR(5, 29) << 8))
72 return -EINVAL;
73
74 return IMX_GPIO_NR(5, 29);
75 }
76
displ5_set_iomux_ecspi_spl(void)77 void displ5_set_iomux_ecspi_spl(void)
78 {
79 SETUP_IOMUX_PADS(ecspi2_pads);
80 }
81
displ5_set_iomux_ecspi(void)82 void displ5_set_iomux_ecspi(void)
83 {
84 SETUP_IOMUX_PADS(ecspi_pads);
85 }
86
87 #else
displ5_set_iomux_ecspi_spl(void)88 void displ5_set_iomux_ecspi_spl(void) {}
displ5_set_iomux_ecspi(void)89 void displ5_set_iomux_ecspi(void) {}
90 #endif
91
92 #ifdef CONFIG_FSL_ESDHC
93 iomux_v3_cfg_t const usdhc4_pads[] = {
94 MX6_PAD_SD4_CLK__SD4_CLK | MUX_PAD_CTRL(USDHC_PAD_CTRL),
95 MX6_PAD_SD4_CMD__SD4_CMD | MUX_PAD_CTRL(USDHC_PAD_CTRL),
96 MX6_PAD_SD4_DAT0__SD4_DATA0 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
97 MX6_PAD_SD4_DAT1__SD4_DATA1 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
98 MX6_PAD_SD4_DAT2__SD4_DATA2 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
99 MX6_PAD_SD4_DAT3__SD4_DATA3 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
100 MX6_PAD_SD4_DAT4__SD4_DATA4 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
101 MX6_PAD_SD4_DAT5__SD4_DATA5 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
102 MX6_PAD_SD4_DAT6__SD4_DATA6 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
103 MX6_PAD_SD4_DAT7__SD4_DATA7 | MUX_PAD_CTRL(USDHC_PAD_CTRL),
104 MX6_PAD_NANDF_ALE__SD4_RESET | MUX_PAD_CTRL(USDHC_PAD_CTRL),
105 };
106
displ5_set_iomux_usdhc_spl(void)107 void displ5_set_iomux_usdhc_spl(void)
108 {
109 SETUP_IOMUX_PADS(usdhc4_pads);
110 }
111
displ5_set_iomux_usdhc(void)112 void displ5_set_iomux_usdhc(void)
113 {
114 SETUP_IOMUX_PADS(usdhc4_pads);
115 }
116
117 #else
displ5_set_iomux_usdhc_spl(void)118 void displ5_set_iomux_usdhc_spl(void) {}
displ5_set_iomux_usdhc(void)119 void displ5_set_iomux_usdhc(void) {}
120 #endif
121