1 /*
2 * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
3 *
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
6 *
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
13 *
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
16 *
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23 * THE SOFTWARE.
24 *
25 * PCI bus layout on a real G5 (U3 based):
26 *
27 * 0000:f0:0b.0 Host bridge [0600]: Apple Computer Inc. U3 AGP [106b:004b]
28 * 0000:f0:10.0 VGA compatible controller [0300]: ATI Technologies Inc RV350 AP [Radeon 9600] [1002:4150]
29 * 0001:00:00.0 Host bridge [0600]: Apple Computer Inc. CPC945 HT Bridge [106b:004a]
30 * 0001:00:01.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
31 * 0001:00:02.0 PCI bridge [0604]: Advanced Micro Devices [AMD] AMD-8131 PCI-X Bridge [1022:7450] (rev 12)
32 * 0001:00:03.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0045]
33 * 0001:00:04.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0046]
34 * 0001:00:05.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0047]
35 * 0001:00:06.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0048]
36 * 0001:00:07.0 PCI bridge [0604]: Apple Computer Inc. K2 HT-PCI Bridge [106b:0049]
37 * 0001:01:07.0 Class [ff00]: Apple Computer Inc. K2 KeyLargo Mac/IO [106b:0041] (rev 20)
38 * 0001:01:08.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
39 * 0001:01:09.0 USB Controller [0c03]: Apple Computer Inc. K2 KeyLargo USB [106b:0040]
40 * 0001:02:0b.0 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
41 * 0001:02:0b.1 USB Controller [0c03]: NEC Corporation USB [1033:0035] (rev 43)
42 * 0001:02:0b.2 USB Controller [0c03]: NEC Corporation USB 2.0 [1033:00e0] (rev 04)
43 * 0001:03:0d.0 Class [ff00]: Apple Computer Inc. K2 ATA/100 [106b:0043]
44 * 0001:03:0e.0 FireWire (IEEE 1394) [0c00]: Apple Computer Inc. K2 FireWire [106b:0042]
45 * 0001:04:0f.0 Ethernet controller [0200]: Apple Computer Inc. K2 GMAC (Sun GEM) [106b:004c]
46 * 0001:05:0c.0 IDE interface [0101]: Broadcom K2 SATA [1166:0240]
47 */
48
49 #include "qemu/osdep.h"
50 #include "qemu-common.h"
51 #include "qapi/error.h"
52 #include "hw/ppc/ppc.h"
53 #include "hw/qdev-properties.h"
54 #include "hw/ppc/mac.h"
55 #include "hw/input/adb.h"
56 #include "hw/ppc/mac_dbdma.h"
57 #include "hw/pci/pci.h"
58 #include "net/net.h"
59 #include "sysemu/sysemu.h"
60 #include "hw/boards.h"
61 #include "hw/nvram/fw_cfg.h"
62 #include "hw/char/escc.h"
63 #include "hw/misc/macio/macio.h"
64 #include "hw/ppc/openpic.h"
65 #include "hw/loader.h"
66 #include "hw/fw-path-provider.h"
67 #include "elf.h"
68 #include "qemu/error-report.h"
69 #include "sysemu/kvm.h"
70 #include "sysemu/reset.h"
71 #include "kvm_ppc.h"
72 #include "hw/usb.h"
73 #include "exec/address-spaces.h"
74 #include "hw/sysbus.h"
75 #include "trace.h"
76
77 /* FreeBSD headers define this */
78 #ifdef round_page
79 #undef round_page
80 #endif
81
82 #define MAX_IDE_BUS 2
83 #define CFG_ADDR 0xf0000510
84 #define TBFREQ (100UL * 1000UL * 1000UL)
85 #define CLOCKFREQ (900UL * 1000UL * 1000UL)
86 #define BUSFREQ (100UL * 1000UL * 1000UL)
87
88 #define NDRV_VGA_FILENAME "qemu_vga.ndrv"
89
90 #define PROM_BASE 0xfff00000
91 #define PROM_SIZE (1 * MiB)
92
fw_cfg_boot_set(void * opaque,const char * boot_device,Error ** errp)93 static void fw_cfg_boot_set(void *opaque, const char *boot_device,
94 Error **errp)
95 {
96 fw_cfg_modify_i16(opaque, FW_CFG_BOOT_DEVICE, boot_device[0]);
97 }
98
translate_kernel_address(void * opaque,uint64_t addr)99 static uint64_t translate_kernel_address(void *opaque, uint64_t addr)
100 {
101 return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR;
102 }
103
ppc_core99_reset(void * opaque)104 static void ppc_core99_reset(void *opaque)
105 {
106 PowerPCCPU *cpu = opaque;
107
108 cpu_reset(CPU(cpu));
109 /* 970 CPUs want to get their initial IP as part of their boot protocol */
110 cpu->env.nip = PROM_BASE + 0x100;
111 }
112
113 /* PowerPC Mac99 hardware initialisation */
ppc_core99_init(MachineState * machine)114 static void ppc_core99_init(MachineState *machine)
115 {
116 ram_addr_t ram_size = machine->ram_size;
117 const char *kernel_filename = machine->kernel_filename;
118 const char *kernel_cmdline = machine->kernel_cmdline;
119 const char *initrd_filename = machine->initrd_filename;
120 const char *boot_device = machine->boot_order;
121 Core99MachineState *core99_machine = CORE99_MACHINE(machine);
122 PowerPCCPU *cpu = NULL;
123 CPUPPCState *env = NULL;
124 char *filename;
125 IrqLines *openpic_irqs;
126 int linux_boot, i, j, k;
127 MemoryRegion *bios = g_new(MemoryRegion, 1);
128 hwaddr kernel_base, initrd_base, cmdline_base = 0;
129 long kernel_size, initrd_size;
130 UNINHostState *uninorth_pci;
131 PCIBus *pci_bus;
132 PCIDevice *macio;
133 ESCCState *escc;
134 bool has_pmu, has_adb;
135 MACIOIDEState *macio_ide;
136 BusState *adb_bus;
137 MacIONVRAMState *nvr;
138 int bios_size;
139 int ppc_boot_device;
140 DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
141 void *fw_cfg;
142 int machine_arch;
143 SysBusDevice *s;
144 DeviceState *dev, *pic_dev;
145 hwaddr nvram_addr = 0xFFF04000;
146 uint64_t tbfreq;
147 unsigned int smp_cpus = machine->smp.cpus;
148
149 linux_boot = (kernel_filename != NULL);
150
151 /* init CPUs */
152 for (i = 0; i < smp_cpus; i++) {
153 cpu = POWERPC_CPU(cpu_create(machine->cpu_type));
154 env = &cpu->env;
155
156 /* Set time-base frequency to 100 Mhz */
157 cpu_ppc_tb_init(env, TBFREQ);
158 qemu_register_reset(ppc_core99_reset, cpu);
159 }
160
161 /* allocate RAM */
162 memory_region_add_subregion(get_system_memory(), 0, machine->ram);
163
164 /* allocate and load firmware ROM */
165 memory_region_init_rom(bios, NULL, "ppc_core99.bios", PROM_SIZE,
166 &error_fatal);
167 memory_region_add_subregion(get_system_memory(), PROM_BASE, bios);
168
169 if (!bios_name) {
170 bios_name = PROM_FILENAME;
171 }
172 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
173 if (filename) {
174 /* Load OpenBIOS (ELF) */
175 bios_size = load_elf(filename, NULL, NULL, NULL, NULL,
176 NULL, NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
177
178 if (bios_size <= 0) {
179 /* or load binary ROM image */
180 bios_size = load_image_targphys(filename, PROM_BASE, PROM_SIZE);
181 }
182 g_free(filename);
183 } else {
184 bios_size = -1;
185 }
186 if (bios_size < 0 || bios_size > PROM_SIZE) {
187 error_report("could not load PowerPC bios '%s'", bios_name);
188 exit(1);
189 }
190
191 if (linux_boot) {
192 int bswap_needed;
193
194 #ifdef BSWAP_NEEDED
195 bswap_needed = 1;
196 #else
197 bswap_needed = 0;
198 #endif
199 kernel_base = KERNEL_LOAD_ADDR;
200
201 kernel_size = load_elf(kernel_filename, NULL,
202 translate_kernel_address, NULL, NULL, NULL,
203 NULL, NULL, 1, PPC_ELF_MACHINE, 0, 0);
204 if (kernel_size < 0)
205 kernel_size = load_aout(kernel_filename, kernel_base,
206 ram_size - kernel_base, bswap_needed,
207 TARGET_PAGE_SIZE);
208 if (kernel_size < 0)
209 kernel_size = load_image_targphys(kernel_filename,
210 kernel_base,
211 ram_size - kernel_base);
212 if (kernel_size < 0) {
213 error_report("could not load kernel '%s'", kernel_filename);
214 exit(1);
215 }
216 /* load initrd */
217 if (initrd_filename) {
218 initrd_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
219 initrd_size = load_image_targphys(initrd_filename, initrd_base,
220 ram_size - initrd_base);
221 if (initrd_size < 0) {
222 error_report("could not load initial ram disk '%s'",
223 initrd_filename);
224 exit(1);
225 }
226 cmdline_base = TARGET_PAGE_ALIGN(initrd_base + initrd_size);
227 } else {
228 initrd_base = 0;
229 initrd_size = 0;
230 cmdline_base = TARGET_PAGE_ALIGN(kernel_base + kernel_size + KERNEL_GAP);
231 }
232 ppc_boot_device = 'm';
233 } else {
234 kernel_base = 0;
235 kernel_size = 0;
236 initrd_base = 0;
237 initrd_size = 0;
238 ppc_boot_device = '\0';
239 /* We consider that NewWorld PowerMac never have any floppy drive
240 * For now, OHW cannot boot from the network.
241 */
242 for (i = 0; boot_device[i] != '\0'; i++) {
243 if (boot_device[i] >= 'c' && boot_device[i] <= 'f') {
244 ppc_boot_device = boot_device[i];
245 break;
246 }
247 }
248 if (ppc_boot_device == '\0') {
249 error_report("No valid boot device for Mac99 machine");
250 exit(1);
251 }
252 }
253
254 /* UniN init */
255 dev = qdev_new(TYPE_UNI_NORTH);
256 s = SYS_BUS_DEVICE(dev);
257 sysbus_realize_and_unref(s, &error_fatal);
258 memory_region_add_subregion(get_system_memory(), 0xf8000000,
259 sysbus_mmio_get_region(s, 0));
260
261 openpic_irqs = g_new0(IrqLines, smp_cpus);
262 for (i = 0; i < smp_cpus; i++) {
263 /* Mac99 IRQ connection between OpenPIC outputs pins
264 * and PowerPC input pins
265 */
266 switch (PPC_INPUT(env)) {
267 case PPC_FLAGS_INPUT_6xx:
268 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
269 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
270 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
271 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT];
272 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
273 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP];
274 /* Not connected ? */
275 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
276 /* Check this */
277 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
278 ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET];
279 break;
280 #if defined(TARGET_PPC64)
281 case PPC_FLAGS_INPUT_970:
282 openpic_irqs[i].irq[OPENPIC_OUTPUT_INT] =
283 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
284 openpic_irqs[i].irq[OPENPIC_OUTPUT_CINT] =
285 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT];
286 openpic_irqs[i].irq[OPENPIC_OUTPUT_MCK] =
287 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP];
288 /* Not connected ? */
289 openpic_irqs[i].irq[OPENPIC_OUTPUT_DEBUG] = NULL;
290 /* Check this */
291 openpic_irqs[i].irq[OPENPIC_OUTPUT_RESET] =
292 ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET];
293 break;
294 #endif /* defined(TARGET_PPC64) */
295 default:
296 error_report("Bus model not supported on mac99 machine");
297 exit(1);
298 }
299 }
300
301 pic_dev = qdev_new(TYPE_OPENPIC);
302 qdev_prop_set_uint32(pic_dev, "model", OPENPIC_MODEL_KEYLARGO);
303 s = SYS_BUS_DEVICE(pic_dev);
304 sysbus_realize_and_unref(s, &error_fatal);
305 k = 0;
306 for (i = 0; i < smp_cpus; i++) {
307 for (j = 0; j < OPENPIC_OUTPUT_NB; j++) {
308 sysbus_connect_irq(s, k++, openpic_irqs[i].irq[j]);
309 }
310 }
311 g_free(openpic_irqs);
312
313 if (PPC_INPUT(env) == PPC_FLAGS_INPUT_970) {
314 /* 970 gets a U3 bus */
315 /* Uninorth AGP bus */
316 dev = qdev_new(TYPE_U3_AGP_HOST_BRIDGE);
317 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
318 uninorth_pci = U3_AGP_HOST_BRIDGE(dev);
319 s = SYS_BUS_DEVICE(dev);
320 /* PCI hole */
321 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
322 sysbus_mmio_get_region(s, 2));
323 /* Register 8 MB of ISA IO space */
324 memory_region_add_subregion(get_system_memory(), 0xf2000000,
325 sysbus_mmio_get_region(s, 3));
326 sysbus_mmio_map(s, 0, 0xf0800000);
327 sysbus_mmio_map(s, 1, 0xf0c00000);
328
329 for (i = 0; i < 4; i++) {
330 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
331 }
332
333 machine_arch = ARCH_MAC99_U3;
334 } else {
335 /* Use values found on a real PowerMac */
336 /* Uninorth AGP bus */
337 dev = qdev_new(TYPE_UNI_NORTH_AGP_HOST_BRIDGE);
338 s = SYS_BUS_DEVICE(dev);
339 sysbus_realize_and_unref(s, &error_fatal);
340 sysbus_mmio_map(s, 0, 0xf0800000);
341 sysbus_mmio_map(s, 1, 0xf0c00000);
342
343 for (i = 0; i < 4; i++) {
344 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
345 }
346
347 /* Uninorth internal bus */
348 dev = qdev_new(TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE);
349 s = SYS_BUS_DEVICE(dev);
350 sysbus_realize_and_unref(s, &error_fatal);
351 sysbus_mmio_map(s, 0, 0xf4800000);
352 sysbus_mmio_map(s, 1, 0xf4c00000);
353
354 for (i = 0; i < 4; i++) {
355 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
356 }
357
358 /* Uninorth main bus */
359 dev = qdev_new(TYPE_UNI_NORTH_PCI_HOST_BRIDGE);
360 qdev_prop_set_uint32(dev, "ofw-addr", 0xf2000000);
361 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
362 uninorth_pci = UNI_NORTH_PCI_HOST_BRIDGE(dev);
363 s = SYS_BUS_DEVICE(dev);
364 /* PCI hole */
365 memory_region_add_subregion(get_system_memory(), 0x80000000ULL,
366 sysbus_mmio_get_region(s, 2));
367 /* Register 8 MB of ISA IO space */
368 memory_region_add_subregion(get_system_memory(), 0xf2000000,
369 sysbus_mmio_get_region(s, 3));
370 sysbus_mmio_map(s, 0, 0xf2800000);
371 sysbus_mmio_map(s, 1, 0xf2c00000);
372
373 for (i = 0; i < 4; i++) {
374 qdev_connect_gpio_out(dev, i, qdev_get_gpio_in(pic_dev, 0x1b + i));
375 }
376
377 machine_arch = ARCH_MAC99;
378 }
379
380 machine->usb |= defaults_enabled() && !machine->usb_disabled;
381 has_pmu = (core99_machine->via_config != CORE99_VIA_CONFIG_CUDA);
382 has_adb = (core99_machine->via_config == CORE99_VIA_CONFIG_CUDA ||
383 core99_machine->via_config == CORE99_VIA_CONFIG_PMU_ADB);
384
385 /* Timebase Frequency */
386 if (kvm_enabled()) {
387 tbfreq = kvmppc_get_tbfreq();
388 } else {
389 tbfreq = TBFREQ;
390 }
391
392 /* init basic PC hardware */
393 pci_bus = PCI_HOST_BRIDGE(uninorth_pci)->bus;
394
395 /* MacIO */
396 macio = pci_new(-1, TYPE_NEWWORLD_MACIO);
397 dev = DEVICE(macio);
398 qdev_prop_set_uint64(dev, "frequency", tbfreq);
399 qdev_prop_set_bit(dev, "has-pmu", has_pmu);
400 qdev_prop_set_bit(dev, "has-adb", has_adb);
401 object_property_set_link(OBJECT(macio), "pic", OBJECT(pic_dev),
402 &error_abort);
403
404 escc = ESCC(object_resolve_path_component(OBJECT(macio), "escc"));
405 qdev_prop_set_chr(DEVICE(escc), "chrA", serial_hd(0));
406 qdev_prop_set_chr(DEVICE(escc), "chrB", serial_hd(1));
407
408 pci_realize_and_unref(macio, pci_bus, &error_fatal);
409
410 /* We only emulate 2 out of 3 IDE controllers for now */
411 ide_drive_get(hd, ARRAY_SIZE(hd));
412
413 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
414 "ide[0]"));
415 macio_ide_init_drives(macio_ide, hd);
416
417 macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
418 "ide[1]"));
419 macio_ide_init_drives(macio_ide, &hd[MAX_IDE_DEVS]);
420
421 if (has_adb) {
422 if (has_pmu) {
423 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "pmu"));
424 } else {
425 dev = DEVICE(object_resolve_path_component(OBJECT(macio), "cuda"));
426 }
427
428 adb_bus = qdev_get_child_bus(dev, "adb.0");
429 dev = qdev_new(TYPE_ADB_KEYBOARD);
430 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
431
432 dev = qdev_new(TYPE_ADB_MOUSE);
433 qdev_realize_and_unref(dev, adb_bus, &error_fatal);
434 }
435
436 if (machine->usb) {
437 pci_create_simple(pci_bus, -1, "pci-ohci");
438
439 /* U3 needs to use USB for input because Linux doesn't support via-cuda
440 on PPC64 */
441 if (!has_adb || machine_arch == ARCH_MAC99_U3) {
442 USBBus *usb_bus = usb_bus_find(-1);
443
444 usb_create_simple(usb_bus, "usb-kbd");
445 usb_create_simple(usb_bus, "usb-mouse");
446 }
447 }
448
449 pci_vga_init(pci_bus);
450
451 if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) {
452 graphic_depth = 15;
453 }
454
455 for (i = 0; i < nb_nics; i++) {
456 pci_nic_init_nofail(&nd_table[i], pci_bus, "sungem", NULL);
457 }
458
459 /* The NewWorld NVRAM is not located in the MacIO device */
460 if (kvm_enabled() && qemu_real_host_page_size > 4096) {
461 /* We can't combine read-write and read-only in a single page, so
462 move the NVRAM out of ROM again for KVM */
463 nvram_addr = 0xFFE00000;
464 }
465 dev = qdev_new(TYPE_MACIO_NVRAM);
466 qdev_prop_set_uint32(dev, "size", 0x2000);
467 qdev_prop_set_uint32(dev, "it_shift", 1);
468 sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
469 sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, nvram_addr);
470 nvr = MACIO_NVRAM(dev);
471 pmac_format_nvram_partition(nvr, 0x2000);
472 /* No PCI init: the BIOS will do it */
473
474 dev = qdev_new(TYPE_FW_CFG_MEM);
475 fw_cfg = FW_CFG(dev);
476 qdev_prop_set_uint32(dev, "data_width", 1);
477 qdev_prop_set_bit(dev, "dma_enabled", false);
478 object_property_add_child(OBJECT(qdev_get_machine()), TYPE_FW_CFG,
479 OBJECT(fw_cfg));
480 s = SYS_BUS_DEVICE(dev);
481 sysbus_realize_and_unref(s, &error_fatal);
482 sysbus_mmio_map(s, 0, CFG_ADDR);
483 sysbus_mmio_map(s, 1, CFG_ADDR + 2);
484
485 fw_cfg_add_i16(fw_cfg, FW_CFG_NB_CPUS, (uint16_t)smp_cpus);
486 fw_cfg_add_i16(fw_cfg, FW_CFG_MAX_CPUS, (uint16_t)machine->smp.max_cpus);
487 fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
488 fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, machine_arch);
489 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, kernel_base);
490 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
491 if (kernel_cmdline) {
492 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, cmdline_base);
493 pstrcpy_targphys("cmdline", cmdline_base, TARGET_PAGE_SIZE, kernel_cmdline);
494 } else {
495 fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_CMDLINE, 0);
496 }
497 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_base);
498 fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
499 fw_cfg_add_i16(fw_cfg, FW_CFG_BOOT_DEVICE, ppc_boot_device);
500
501 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_WIDTH, graphic_width);
502 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_HEIGHT, graphic_height);
503 fw_cfg_add_i16(fw_cfg, FW_CFG_PPC_DEPTH, graphic_depth);
504
505 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_VIACONFIG, core99_machine->via_config);
506
507 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_IS_KVM, kvm_enabled());
508 if (kvm_enabled()) {
509 uint8_t *hypercall;
510
511 hypercall = g_malloc(16);
512 kvmppc_get_hypercall(env, hypercall, 16);
513 fw_cfg_add_bytes(fw_cfg, FW_CFG_PPC_KVM_HC, hypercall, 16);
514 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_KVM_PID, getpid());
515 }
516 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_TBFREQ, tbfreq);
517 /* Mac OS X requires a "known good" clock-frequency value; pass it one. */
518 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_CLOCKFREQ, CLOCKFREQ);
519 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_BUSFREQ, BUSFREQ);
520 fw_cfg_add_i32(fw_cfg, FW_CFG_PPC_NVRAM_ADDR, nvram_addr);
521
522 /* MacOS NDRV VGA driver */
523 filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, NDRV_VGA_FILENAME);
524 if (filename) {
525 gchar *ndrv_file;
526 gsize ndrv_size;
527
528 if (g_file_get_contents(filename, &ndrv_file, &ndrv_size, NULL)) {
529 fw_cfg_add_file(fw_cfg, "ndrv/qemu_vga.ndrv", ndrv_file, ndrv_size);
530 }
531 g_free(filename);
532 }
533
534 qemu_register_boot_set(fw_cfg_boot_set, fw_cfg);
535 }
536
537 /*
538 * Implementation of an interface to adjust firmware path
539 * for the bootindex property handling.
540 */
core99_fw_dev_path(FWPathProvider * p,BusState * bus,DeviceState * dev)541 static char *core99_fw_dev_path(FWPathProvider *p, BusState *bus,
542 DeviceState *dev)
543 {
544 PCIDevice *pci;
545 IDEBus *ide_bus;
546 IDEState *ide_s;
547 MACIOIDEState *macio_ide;
548
549 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-newworld")) {
550 pci = PCI_DEVICE(dev);
551 return g_strdup_printf("mac-io@%x", PCI_SLOT(pci->devfn));
552 }
553
554 if (!strcmp(object_get_typename(OBJECT(dev)), "macio-ide")) {
555 macio_ide = MACIO_IDE(dev);
556 return g_strdup_printf("ata-3@%x", macio_ide->addr);
557 }
558
559 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-drive")) {
560 ide_bus = IDE_BUS(qdev_get_parent_bus(dev));
561 ide_s = idebus_active_if(ide_bus);
562
563 if (ide_s->drive_kind == IDE_CD) {
564 return g_strdup("cdrom");
565 }
566
567 return g_strdup("disk");
568 }
569
570 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-hd")) {
571 return g_strdup("disk");
572 }
573
574 if (!strcmp(object_get_typename(OBJECT(dev)), "ide-cd")) {
575 return g_strdup("cdrom");
576 }
577
578 if (!strcmp(object_get_typename(OBJECT(dev)), "virtio-blk-device")) {
579 return g_strdup("disk");
580 }
581
582 return NULL;
583 }
core99_kvm_type(MachineState * machine,const char * arg)584 static int core99_kvm_type(MachineState *machine, const char *arg)
585 {
586 /* Always force PR KVM */
587 return 2;
588 }
589
core99_machine_class_init(ObjectClass * oc,void * data)590 static void core99_machine_class_init(ObjectClass *oc, void *data)
591 {
592 MachineClass *mc = MACHINE_CLASS(oc);
593 FWPathProviderClass *fwc = FW_PATH_PROVIDER_CLASS(oc);
594
595 mc->desc = "Mac99 based PowerMAC";
596 mc->init = ppc_core99_init;
597 mc->block_default_type = IF_IDE;
598 mc->max_cpus = MAX_CPUS;
599 mc->default_boot_order = "cd";
600 mc->default_display = "std";
601 mc->kvm_type = core99_kvm_type;
602 #ifdef TARGET_PPC64
603 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("970fx_v3.1");
604 #else
605 mc->default_cpu_type = POWERPC_CPU_TYPE_NAME("7400_v2.9");
606 #endif
607 mc->default_ram_id = "ppc_core99.ram";
608 mc->ignore_boot_device_suffixes = true;
609 fwc->get_dev_path = core99_fw_dev_path;
610 }
611
core99_get_via_config(Object * obj,Error ** errp)612 static char *core99_get_via_config(Object *obj, Error **errp)
613 {
614 Core99MachineState *cms = CORE99_MACHINE(obj);
615
616 switch (cms->via_config) {
617 default:
618 case CORE99_VIA_CONFIG_CUDA:
619 return g_strdup("cuda");
620
621 case CORE99_VIA_CONFIG_PMU:
622 return g_strdup("pmu");
623
624 case CORE99_VIA_CONFIG_PMU_ADB:
625 return g_strdup("pmu-adb");
626 }
627 }
628
core99_set_via_config(Object * obj,const char * value,Error ** errp)629 static void core99_set_via_config(Object *obj, const char *value, Error **errp)
630 {
631 Core99MachineState *cms = CORE99_MACHINE(obj);
632
633 if (!strcmp(value, "cuda")) {
634 cms->via_config = CORE99_VIA_CONFIG_CUDA;
635 } else if (!strcmp(value, "pmu")) {
636 cms->via_config = CORE99_VIA_CONFIG_PMU;
637 } else if (!strcmp(value, "pmu-adb")) {
638 cms->via_config = CORE99_VIA_CONFIG_PMU_ADB;
639 } else {
640 error_setg(errp, "Invalid via value");
641 error_append_hint(errp, "Valid values are cuda, pmu, pmu-adb.\n");
642 }
643 }
644
core99_instance_init(Object * obj)645 static void core99_instance_init(Object *obj)
646 {
647 Core99MachineState *cms = CORE99_MACHINE(obj);
648
649 /* Default via_config is CORE99_VIA_CONFIG_CUDA */
650 cms->via_config = CORE99_VIA_CONFIG_CUDA;
651 object_property_add_str(obj, "via", core99_get_via_config,
652 core99_set_via_config);
653 object_property_set_description(obj, "via",
654 "Set VIA configuration. "
655 "Valid values are cuda, pmu and pmu-adb");
656
657 return;
658 }
659
660 static const TypeInfo core99_machine_info = {
661 .name = MACHINE_TYPE_NAME("mac99"),
662 .parent = TYPE_MACHINE,
663 .class_init = core99_machine_class_init,
664 .instance_init = core99_instance_init,
665 .instance_size = sizeof(Core99MachineState),
666 .interfaces = (InterfaceInfo[]) {
667 { TYPE_FW_PATH_PROVIDER },
668 { }
669 },
670 };
671
mac_machine_register_types(void)672 static void mac_machine_register_types(void)
673 {
674 type_register_static(&core99_machine_info);
675 }
676
677 type_init(mac_machine_register_types)
678