1skiboot-5.2.1 2============= 3 4skiboot-5.2.1 was released on Wednesday April 27th, 2016. 5 6skiboot-5.2.1 is the second stable release of skiboot 5.2, the new stable 7release of skiboot, which will take over from the 5.1.x series which was 8first released August 17th, 2015. 9 10skiboot-5.2.1 contains all bug fixes as of skiboot-5.1.15. 11 12This is the second release that will follow the (now documented) Skiboot 13stable rules - see :ref:`stable-rules`. 14 15Changes 16------- 17Over skiboot-5.2.0, the following fixes are included: 18 19pflash 20^^^^^^ 21 22- Allow building under yocto. 23 Makefile fixes to enable building as part of an OpenBMC build. 24 25Garrison platform 26^^^^^^^^^^^^^^^^^ 27 28- Add PCIe and NPU slot location names 29- hw/npu.c: Add ibm, npu-index property to npu device tree 30- hmi: Add handling for NPU checkstops 31 32PHB3 (all POWER8 platforms) 33^^^^^^^^^^^^^^^^^^^^^^^^^^^ 34 35- hw/phb3: Ensure PQ bits are cleared in the IVC when masking IRQ 36 When we mask an interrupt, we may race with another interrupt coming 37 in from the hardware. If this occurs, the P and/or Q bit may end up 38 being set but we never EOI/clear them. This could result in a lost 39 interrupt or the next interrupt that comes in after re-enabling never 40 being presented. 41 42 This fixes a bug seen with some CAPI workloads which have lots of 43 interrupt masking at the same time as high interrupt load. The fix is 44 not specific to CAPI though. 45- hw/phb3: Fix potential race in EOI 46 When we EOI we need to clear the present (P) bit in the Interrupt 47 Vector Cache (IVC). We must clear P ensuring that any additional 48 interrupts that come in aren't lost while also maintaining coherency 49 with the Interrupt Vector Table (IVT). 50 51 To do this, the hardware provides a conditional update bit in the 52 IVC. This bit ensures that generation counts between the IVT and the 53 IVC updates are synchronised. 54 55 Unfortunately we never set this the bit to conditionally update the P 56 bit in the IVC based on the generation count. Also, we didn't set 57 what we wanted the new generation count to be if the update was 58 successful. 59 60FSP platforms 61^^^^^^^^^^^^^ 62 63- OPAL:Handle mbox response with bad status:0x24 during FSP termination 64 OPAL committed a predictive log with SRC BB822411 in some situations. 65 66Generic 67^^^^^^^ 68 69- hmi: Fix a bug where partial hmi event was reported to host. 70 This bug fix ensures the CPU PIR is reported correctly: :: 71 72 [ 305.628283] Fatal Hypervisor Maintenance interrupt [Not recovered] 73 [ 305.628341] Error detail: Malfunction Alert 74 [ 305.628388] HMER: 8040000000000000 75 - [ 305.628423] CPU PIR: 00000000 76 + [ 200.123021] CPU PIR: 000008e8 77 [ 305.628458] [Unit: VSU] Logic core check stop 78 79- xscom: Return OPAL_WRONG_STATE on XSCOM ops if CPU is asleep 80 81 82Contributors 83------------ 84 85Processed 15 csets from 7 developers 86A total of 436 lines added, 59 removed (delta 377) 87 88Developers with the most changesets 89 90============================ ========== 91============================ ========== 92Russell Currey 7 (46.7%) 93Alistair Popple 2 (13.3%) 94Michael Neuling 2 (13.3%) 95Patrick Williams 1 (6.7%) 96Stewart Smith 1 (6.7%) 97Mamatha 1 (6.7%) 98Mahesh Salgaonkar 1 (6.7%) 99============================ ========== 100 101Developers with the most changed lines 102 103========================== ============ 104========================== ============ 105Alistair Popple 215 (48.3%) 106Russell Currey 140 (31.5%) 107Michael Neuling 55 (12.4%) 108Mamatha 15 (3.4%) 109Patrick Williams 9 (2.0%) 110Mahesh Salgaonkar 8 (1.8%) 111Stewart Smith 3 (0.7%) 112========================== ============ 113 114Developers with the most lines removed 115 116========================== ============ 117========================== ============ 118Patrick Williams 5 (8.5%) 119========================== ============ 120 121Developers with the most signoffs (total 30) 122 123========================== ============ 124========================== ============ 125Stewart Smith 15 (50.0%) 126Russell Currey 7 (23.3%) 127Michael Neuling 2 (6.7%) 128Alistair Popple 2 (6.7%) 129Patrick Williams 1 (3.3%) 130Oliver O'Halloran 1 (3.3%) 131Mahesh Salgaonkar 1 (3.3%) 132Mamatha 1 (3.3%) 133========================== ============ 134 135Developers with the most reviews (total 11) 136 137========================== ============ 138========================== ============ 139Alistair Popple 5 (45.5%) 140Andrew Donnellan 3 (27.3%) 141Mahesh Salgaonkar 2 (18.2%) 142Joel Stanley 1 (9.1%) 143========================== ============ 144 145Developers with the most Acked-by (total 1) 146 147========================== ============ 148========================== ============ 149Alistair Popple 1 (100.0%) 150========================== ============ 151 152Developers with the most test credits (total 3) 153 154========================== ============ 155========================== ============ 156Andrew Donnellan 2 (66.7%) 157Vaibhav Jain 1 (33.3%) 158========================== ============ 159 160Developers who received the most tested-by credits (total 3) 161 162========================== ============ 163========================== ============ 164Michael Neuling 3 (100.0%) 165========================== ============ 166