1 /*
2  * (C) Copyright 2002
3  * Daniel Engstr�m, Omicron Ceti AB, daniel@omicron.se
4  *
5  * See file CREDITS for list of people who contributed to this
6  * project.
7  *
8  * This program is free software; you can redistribute it and/or
9  * modify it under the terms of the GNU General Public License as
10  * published by the Free Software Foundation; either version 2 of
11  * the License, or (at your option) any later version.
12  *
13  * This program is distributed in the hope that it will be useful,
14  * but WITHOUT ANY WARRANTY; without even the implied warranty of
15  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
16  * GNU General Public License for more details.
17  *
18  * You should have received a copy of the GNU General Public License
19  * along with this program; if not, write to the Free Software
20  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21  * MA 02111-1307 USA
22  */
23 
24 
25 /*
26  * Partly based on msbios.c from rolo 1.6:
27  *----------------------------------------------------------------------
28  * (C) Copyright 2000
29  * Sysgo Real-Time Solutions GmbH
30  * Klein-Winternheim, Germany
31  *----------------------------------------------------------------------
32  */
33 
34 #include <common.h>
35 #include <pci.h>
36 #include <asm/realmode.h>
37 #include <asm/io.h>
38 
39 DECLARE_GLOBAL_DATA_PTR;
40 
41 #define NUMVECTS	256
42 
43 #define BIOS_DATA        ((char*)0x400)
44 #define BIOS_DATA_SIZE   256
45 #define BIOS_BASE        ((char*)0xf0000)
46 #define BIOS_CS          0xf000
47 
48 extern ulong _i386boot_bios;
49 extern ulong _i386boot_bios_size;
50 
51 /* these are defined in a 16bit segment and needs
52  * to be accessed with the RELOC_16_xxxx() macros below
53  */
54 extern u16 ram_in_64kb_chunks;
55 extern u16 bios_equipment;
56 extern u8  pci_last_bus;
57 
58 extern void *rm_int00;
59 extern void *rm_int01;
60 extern void *rm_int02;
61 extern void *rm_int03;
62 extern void *rm_int04;
63 extern void *rm_int05;
64 extern void *rm_int06;
65 extern void *rm_int07;
66 extern void *rm_int08;
67 extern void *rm_int09;
68 extern void *rm_int0a;
69 extern void *rm_int0b;
70 extern void *rm_int0c;
71 extern void *rm_int0d;
72 extern void *rm_int0e;
73 extern void *rm_int0f;
74 extern void *rm_int10;
75 extern void *rm_int11;
76 extern void *rm_int12;
77 extern void *rm_int13;
78 extern void *rm_int14;
79 extern void *rm_int15;
80 extern void *rm_int16;
81 extern void *rm_int17;
82 extern void *rm_int18;
83 extern void *rm_int19;
84 extern void *rm_int1a;
85 extern void *rm_int1b;
86 extern void *rm_int1c;
87 extern void *rm_int1d;
88 extern void *rm_int1e;
89 extern void *rm_int1f;
90 extern void *rm_def_int;
91 
92 extern void *realmode_reset;
93 extern void *realmode_pci_bios_call_entry;
94 
set_jmp_vector(int entry_point,void * target)95 static int set_jmp_vector(int entry_point, void *target)
96 {
97 	if (entry_point & ~0xffff) {
98 		return -1;
99 	}
100 
101 	if (((u32)target-0xf0000) & ~0xffff) {
102 		return -1;
103 	}
104 	printf("set_jmp_vector: 0xf000:%04x -> %p\n",
105 	       entry_point, target);
106 
107 	/* jmp opcode */
108 	writeb(0xea, 0xf0000 + entry_point);
109 
110 	/* offset */
111 	writew(((u32)target-0xf0000), 0xf0000 + entry_point + 1);
112 
113 	/* segment */
114 	writew(0xf000, 0xf0000 + entry_point + 3);
115 
116 	return 0;
117 }
118 
119 
120 /*
121  ************************************************************
122  * Install an interrupt vector
123  ************************************************************
124  */
125 
setvector(int vector,u16 segment,void * handler)126 static void setvector(int vector, u16 segment, void *handler)
127 {
128 	u16 *ptr = (u16*)(vector*4);
129 	ptr[0] = ((u32)handler - (segment << 4))&0xffff;
130 	ptr[1] = segment;
131 
132 #if 0
133 	printf("setvector: int%02x -> %04x:%04x\n",
134 	       vector, ptr[1], ptr[0]);
135 #endif
136 }
137 
138 #define RELOC_16_LONG(seg, off) *(u32*)(seg << 4 | (u32)&off)
139 #define RELOC_16_WORD(seg, off) *(u16*)(seg << 4 | (u32)&off)
140 #define RELOC_16_BYTE(seg, off) *(u8*)(seg << 4 | (u32)&off)
141 
bios_setup(void)142 int bios_setup(void)
143 {
144 	ulong i386boot_bios      = (ulong)&_i386boot_bios + gd->reloc_off;
145 	ulong i386boot_bios_size = (ulong)&_i386boot_bios_size;
146 
147 	static int done=0;
148 	int vector;
149 #ifdef CONFIG_PCI
150 	struct pci_controller *pri_hose;
151 #endif
152 	if (done) {
153 		return 0;
154 	}
155 	done = 1;
156 
157 	if (i386boot_bios_size > 65536) {
158 		printf("BIOS too large (%ld bytes, max is 65536)\n",
159 		       i386boot_bios_size);
160 		return -1;
161 	}
162 
163 	memcpy(BIOS_BASE, (void*)i386boot_bios, i386boot_bios_size);
164 
165 	/* clear bda */
166 	memset(BIOS_DATA, 0, BIOS_DATA_SIZE);
167 
168 	/* enter some values to the bda */
169 	writew(0x3f8, BIOS_DATA);   /* com1 addr */
170 	writew(0x2f8, BIOS_DATA+2); /* com2 addr */
171 	writew(0x3e8, BIOS_DATA+4); /* com3 addr */
172 	writew(0x2e8, BIOS_DATA+6); /* com4 addr */
173 	writew(0x278, BIOS_DATA+8); /* lpt1 addr */
174 	/*
175 	 * The kernel wants to read the base memory size
176 	 * from 40:13. Put a zero there to avoid an error message
177 	 */
178 	writew(0, BIOS_DATA+0x13);  /* base memory size */
179 
180 
181 	/* setup realmode interrupt vectors */
182 	for (vector = 0; vector < NUMVECTS; vector++) {
183 		setvector(vector, BIOS_CS, &rm_def_int);
184 	}
185 
186 	setvector(0x00, BIOS_CS, &rm_int00);
187 	setvector(0x01, BIOS_CS, &rm_int01);
188 	setvector(0x02, BIOS_CS, &rm_int02);
189 	setvector(0x03, BIOS_CS, &rm_int03);
190 	setvector(0x04, BIOS_CS, &rm_int04);
191 	setvector(0x05, BIOS_CS, &rm_int05);
192 	setvector(0x06, BIOS_CS, &rm_int06);
193 	setvector(0x07, BIOS_CS, &rm_int07);
194 	setvector(0x08, BIOS_CS, &rm_int08);
195 	setvector(0x09, BIOS_CS, &rm_int09);
196 	setvector(0x0a, BIOS_CS, &rm_int0a);
197 	setvector(0x0b, BIOS_CS, &rm_int0b);
198 	setvector(0x0c, BIOS_CS, &rm_int0c);
199 	setvector(0x0d, BIOS_CS, &rm_int0d);
200 	setvector(0x0e, BIOS_CS, &rm_int0e);
201 	setvector(0x0f, BIOS_CS, &rm_int0f);
202 	setvector(0x10, BIOS_CS, &rm_int10);
203 	setvector(0x11, BIOS_CS, &rm_int11);
204 	setvector(0x12, BIOS_CS, &rm_int12);
205 	setvector(0x13, BIOS_CS, &rm_int13);
206 	setvector(0x14, BIOS_CS, &rm_int14);
207 	setvector(0x15, BIOS_CS, &rm_int15);
208 	setvector(0x16, BIOS_CS, &rm_int16);
209 	setvector(0x17, BIOS_CS, &rm_int17);
210 	setvector(0x18, BIOS_CS, &rm_int18);
211 	setvector(0x19, BIOS_CS, &rm_int19);
212 	setvector(0x1a, BIOS_CS, &rm_int1a);
213 	setvector(0x1b, BIOS_CS, &rm_int1b);
214 	setvector(0x1c, BIOS_CS, &rm_int1c);
215 	setvector(0x1d, BIOS_CS, &rm_int1d);
216 	setvector(0x1e, BIOS_CS, &rm_int1e);
217 	setvector(0x1f, BIOS_CS, &rm_int1f);
218 
219 	set_jmp_vector(0xfff0, &realmode_reset);
220 	set_jmp_vector(0xfe6e, &realmode_pci_bios_call_entry);
221 
222 	/* fill in data area */
223 	RELOC_16_WORD(0xf000, ram_in_64kb_chunks) = gd->ram_size >> 16;
224 	RELOC_16_WORD(0xf000, bios_equipment) = 0; /* FixMe */
225 
226 	/* If we assume only one PCI hose, this PCI hose
227 	 * will own PCI bus #0, and the last PCI bus of
228 	 * that PCI hose will be the last PCI bus in the
229 	 * system.
230 	 * (This, ofcause break on multi hose systems,
231 	 *  but our PCI BIOS only support one hose anyway)
232 	 */
233 #ifdef CONFIG_PCI
234 	pri_hose = pci_bus_to_hose(0);
235 	if (NULL != pri_hose) {
236 		/* fill in last pci bus number for use by the realmode
237 		 * PCI BIOS */
238 		RELOC_16_BYTE(0xf000, pci_last_bus) = pri_hose->last_busno;
239 	}
240 #endif
241 	return 0;
242 }
243