1 /* 2 * Tiny Code Generator for QEMU 3 * 4 * Copyright (c) 2008 Fabrice Bellard 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to deal 8 * in the Software without restriction, including without limitation the rights 9 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell 10 * copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, 21 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN 22 * THE SOFTWARE. 23 */ 24 25 #ifndef SPARC_TCG_TARGET_H 26 #define SPARC_TCG_TARGET_H 27 28 #define TCG_TARGET_REG_BITS 64 29 30 #define TCG_TARGET_INSN_UNIT_SIZE 4 31 #define TCG_TARGET_TLB_DISPLACEMENT_BITS 32 32 #define TCG_TARGET_NB_REGS 32 33 34 typedef enum { 35 TCG_REG_G0 = 0, 36 TCG_REG_G1, 37 TCG_REG_G2, 38 TCG_REG_G3, 39 TCG_REG_G4, 40 TCG_REG_G5, 41 TCG_REG_G6, 42 TCG_REG_G7, 43 TCG_REG_O0, 44 TCG_REG_O1, 45 TCG_REG_O2, 46 TCG_REG_O3, 47 TCG_REG_O4, 48 TCG_REG_O5, 49 TCG_REG_O6, 50 TCG_REG_O7, 51 TCG_REG_L0, 52 TCG_REG_L1, 53 TCG_REG_L2, 54 TCG_REG_L3, 55 TCG_REG_L4, 56 TCG_REG_L5, 57 TCG_REG_L6, 58 TCG_REG_L7, 59 TCG_REG_I0, 60 TCG_REG_I1, 61 TCG_REG_I2, 62 TCG_REG_I3, 63 TCG_REG_I4, 64 TCG_REG_I5, 65 TCG_REG_I6, 66 TCG_REG_I7, 67 } TCGReg; 68 69 /* used for function call generation */ 70 #define TCG_REG_CALL_STACK TCG_REG_O6 71 72 #ifdef __arch64__ 73 #define TCG_TARGET_STACK_BIAS 2047 74 #define TCG_TARGET_STACK_ALIGN 16 75 #define TCG_TARGET_CALL_STACK_OFFSET (128 + 6*8 + TCG_TARGET_STACK_BIAS) 76 #else 77 #define TCG_TARGET_STACK_BIAS 0 78 #define TCG_TARGET_STACK_ALIGN 8 79 #define TCG_TARGET_CALL_STACK_OFFSET (64 + 4 + 6*4) 80 #endif 81 82 #ifdef __arch64__ 83 #define TCG_TARGET_EXTEND_ARGS 1 84 #endif 85 86 #if defined(__VIS__) && __VIS__ >= 0x300 87 #define use_vis3_instructions 1 88 #else 89 extern bool use_vis3_instructions; 90 #endif 91 92 /* optional instructions */ 93 #define TCG_TARGET_HAS_div_i32 1 94 #define TCG_TARGET_HAS_rem_i32 0 95 #define TCG_TARGET_HAS_rot_i32 0 96 #define TCG_TARGET_HAS_ext8s_i32 0 97 #define TCG_TARGET_HAS_ext16s_i32 0 98 #define TCG_TARGET_HAS_ext8u_i32 0 99 #define TCG_TARGET_HAS_ext16u_i32 0 100 #define TCG_TARGET_HAS_bswap16_i32 0 101 #define TCG_TARGET_HAS_bswap32_i32 0 102 #define TCG_TARGET_HAS_neg_i32 1 103 #define TCG_TARGET_HAS_not_i32 1 104 #define TCG_TARGET_HAS_andc_i32 1 105 #define TCG_TARGET_HAS_orc_i32 1 106 #define TCG_TARGET_HAS_eqv_i32 0 107 #define TCG_TARGET_HAS_nand_i32 0 108 #define TCG_TARGET_HAS_nor_i32 0 109 #define TCG_TARGET_HAS_clz_i32 0 110 #define TCG_TARGET_HAS_ctz_i32 0 111 #define TCG_TARGET_HAS_ctpop_i32 0 112 #define TCG_TARGET_HAS_deposit_i32 0 113 #define TCG_TARGET_HAS_extract_i32 0 114 #define TCG_TARGET_HAS_sextract_i32 0 115 #define TCG_TARGET_HAS_extract2_i32 0 116 #define TCG_TARGET_HAS_movcond_i32 1 117 #define TCG_TARGET_HAS_add2_i32 1 118 #define TCG_TARGET_HAS_sub2_i32 1 119 #define TCG_TARGET_HAS_mulu2_i32 1 120 #define TCG_TARGET_HAS_muls2_i32 1 121 #define TCG_TARGET_HAS_muluh_i32 0 122 #define TCG_TARGET_HAS_mulsh_i32 0 123 #define TCG_TARGET_HAS_goto_ptr 1 124 #define TCG_TARGET_HAS_direct_jump 1 125 #define TCG_TARGET_HAS_qemu_st8_i32 0 126 127 #define TCG_TARGET_HAS_extrl_i64_i32 1 128 #define TCG_TARGET_HAS_extrh_i64_i32 1 129 #define TCG_TARGET_HAS_div_i64 1 130 #define TCG_TARGET_HAS_rem_i64 0 131 #define TCG_TARGET_HAS_rot_i64 0 132 #define TCG_TARGET_HAS_ext8s_i64 0 133 #define TCG_TARGET_HAS_ext16s_i64 0 134 #define TCG_TARGET_HAS_ext32s_i64 1 135 #define TCG_TARGET_HAS_ext8u_i64 0 136 #define TCG_TARGET_HAS_ext16u_i64 0 137 #define TCG_TARGET_HAS_ext32u_i64 1 138 #define TCG_TARGET_HAS_bswap16_i64 0 139 #define TCG_TARGET_HAS_bswap32_i64 0 140 #define TCG_TARGET_HAS_bswap64_i64 0 141 #define TCG_TARGET_HAS_neg_i64 1 142 #define TCG_TARGET_HAS_not_i64 1 143 #define TCG_TARGET_HAS_andc_i64 1 144 #define TCG_TARGET_HAS_orc_i64 1 145 #define TCG_TARGET_HAS_eqv_i64 0 146 #define TCG_TARGET_HAS_nand_i64 0 147 #define TCG_TARGET_HAS_nor_i64 0 148 #define TCG_TARGET_HAS_clz_i64 0 149 #define TCG_TARGET_HAS_ctz_i64 0 150 #define TCG_TARGET_HAS_ctpop_i64 0 151 #define TCG_TARGET_HAS_deposit_i64 0 152 #define TCG_TARGET_HAS_extract_i64 0 153 #define TCG_TARGET_HAS_sextract_i64 0 154 #define TCG_TARGET_HAS_extract2_i64 0 155 #define TCG_TARGET_HAS_movcond_i64 1 156 #define TCG_TARGET_HAS_add2_i64 1 157 #define TCG_TARGET_HAS_sub2_i64 1 158 #define TCG_TARGET_HAS_mulu2_i64 0 159 #define TCG_TARGET_HAS_muls2_i64 0 160 #define TCG_TARGET_HAS_muluh_i64 use_vis3_instructions 161 #define TCG_TARGET_HAS_mulsh_i64 0 162 163 #define TCG_AREG0 TCG_REG_I0 164 165 #define TCG_TARGET_DEFAULT_MO (0) 166 #define TCG_TARGET_HAS_MEMORY_BSWAP 1 167 168 void tb_target_set_jmp_target(uintptr_t, uintptr_t, uintptr_t, uintptr_t); 169 170 #define TCG_TARGET_NEED_POOL_LABELS 171 172 #endif 173