1 /* pdp10_fe.c: PDP-10 front end (console terminal) simulator
2 
3    Copyright (c) 1993-2012, Robert M Supnik
4 
5    Permission is hereby granted, free of charge, to any person obtaining a
6    copy of this software and associated documentation files (the "Software"),
7    to deal in the Software without restriction, including without limitation
8    the rights to use, copy, modify, merge, publish, distribute, sublicense,
9    and/or sell copies of the Software, and to permit persons to whom the
10    Software is furnished to do so, subject to the following conditions:
11 
12    The above copyright notice and this permission notice shall be included in
13    all copies or substantial portions of the Software.
14 
15    THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16    IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
17    FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
18    ROBERT M SUPNIK BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19    IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20    CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21 
22    Except as contained in this notice, the name of Robert M Supnik shall not be
23    used in advertising or otherwise to promote the sale, use or other dealings
24    in this Software without prior written authorization from Robert M Supnik.
25 
26    fe           KS10 console front end
27 
28    18-Apr-12    RMS     Added clock coscheduling
29    18-Jun-07    RMS     Added UNIT_IDLE flag to console input
30    17-Oct-06    RMS     Synced keyboard to clock for idling
31    28-May-04    RMS     Removed SET FE CTRL-C
32    29-Dec-03    RMS     Added console backpressure support
33    25-Apr-03    RMS     Revised for extended file support
34    22-Dec-02    RMS     Added break support
35    30-May-02    RMS     Widened COUNT to 32b
36    30-Nov-01    RMS     Added extended SET/SHOW support
37    23-Oct-01    RMS     New IO page address constants
38    07-Sep-01    RMS     Moved function prototypes
39 */
40 
41 #include "pdp10_defs.h"
42 #define UNIT_DUMMY      (1 << UNIT_V_UF)
43 
44 extern d10 *M;
45 extern int32 apr_flg;
46 extern int32 tmxr_poll;
47 t_stat fei_svc (UNIT *uptr);
48 t_stat feo_svc (UNIT *uptr);
49 t_stat fe_reset (DEVICE *dptr);
50 t_stat fe_stop_os (UNIT *uptr, int32 val, char *cptr, void *desc);
51 
52 /* FE data structures
53 
54    fe_dev       FE device descriptor
55    fe_unit      FE unit descriptor
56    fe_reg       FE register list
57 */
58 
59 #define fei_unit        fe_unit[0]
60 #define feo_unit        fe_unit[1]
61 
62 UNIT fe_unit[] = {
63     { UDATA (&fei_svc, UNIT_IDLE, 0), 0 },
64     { UDATA (&feo_svc, 0, 0), SERIAL_OUT_WAIT }
65     };
66 
67 REG fe_reg[] = {
68     { ORDATA (IBUF, fei_unit.buf, 8) },
69     { DRDATA (ICOUNT, fei_unit.pos, T_ADDR_W), REG_RO + PV_LEFT },
70     { DRDATA (ITIME, fei_unit.wait, 24), PV_LEFT },
71     { ORDATA (OBUF, feo_unit.buf, 8) },
72     { DRDATA (OCOUNT, feo_unit.pos, T_ADDR_W), REG_RO + PV_LEFT },
73     { DRDATA (OTIME, feo_unit.wait, 24), REG_NZ + PV_LEFT },
74     { NULL }
75     };
76 
77 MTAB fe_mod[] = {
78     { UNIT_DUMMY, 0, NULL, "STOP", &fe_stop_os },
79     { 0 }
80     };
81 
82 DEVICE fe_dev = {
83     "FE", fe_unit, fe_reg, fe_mod,
84     2, 10, 31, 1, 8, 8,
85     NULL, NULL, &fe_reset,
86     NULL, NULL, NULL
87     };
88 
89 /* Front end processor (console terminal)
90 
91    Communications between the KS10 and its front end is based on an in-memory
92    status block and two interrupt lines: interrupt-to-control (APR_ITC) and
93    interrupt-from-console (APR_CON).  When the KS10 wants to print a character
94    on the terminal,
95 
96    1. It places a character, plus the valid flag, in FE_CTYOUT.
97    2. It interrupts the front end processor.
98    3. The front end processor types the character and then zeroes FE_CTYOUT.
99    4. The front end procesor interrupts the KS10.
100 
101    When the front end wants to send an input character to the KS10,
102 
103    1. It places a character, plus the valid flag, in FE_CTYIN.
104    2. It interrupts the KS10.
105    3. It waits for the KS10 to take the character and clear the valid flag.
106    4. It can then send more input (the KS10 may signal this by interrupting
107       the front end).
108 
109    Note that the protocol has both ambiguity (interrupt to the KS10 may mean
110    character printed, or input character available, or both) and lack of
111    symmetry (the KS10 does not inform the front end that it has taken an
112    input character).
113 */
114 
fe_intr(void)115 void fe_intr (void)
116 {
117 if (M[FE_CTYOUT] & FE_CVALID) {                         /* char to print? */
118     feo_unit.buf = (int32) M[FE_CTYOUT] & 0177;         /* pick it up */
119     feo_unit.pos = feo_unit.pos + 1;
120     sim_activate (&feo_unit, feo_unit.wait);            /* sched completion */
121     }
122 else if ((M[FE_CTYIN] & FE_CVALID) == 0) {              /* input char taken? */
123     sim_cancel (&fei_unit);                             /* sched immediate */
124     sim_activate (&fei_unit, 0);                        /* keyboard poll */
125     }
126 return;
127 }
128 
feo_svc(UNIT * uptr)129 t_stat feo_svc (UNIT *uptr)
130 {
131 t_stat r;
132 
133 if ((r = sim_putchar_s (uptr->buf)) != SCPE_OK) {       /* output; error? */
134     sim_activate (uptr, uptr->wait);                    /* try again */
135     return ((r == SCPE_STALL)? SCPE_OK: r);             /* !stall? report */
136     }
137 M[FE_CTYOUT] = 0;                                       /* clear char */
138 apr_flg = apr_flg | APRF_CON;                           /* interrupt KS10 */
139 return SCPE_OK;
140 }
141 
fei_svc(UNIT * uptr)142 t_stat fei_svc (UNIT *uptr)
143 {
144 int32 temp;
145 
146 sim_activate (uptr, KBD_WAIT (uptr->wait, clk_cosched (tmxr_poll)));
147                                                         /* continue poll */
148 if ((temp = sim_poll_kbd ()) < SCPE_KFLAG)              /* no char or error? */
149     return temp;
150 if (temp & SCPE_BREAK)                                  /* ignore break */
151     return SCPE_OK;
152 uptr->buf = temp & 0177;
153 uptr->pos = uptr->pos + 1;
154 M[FE_CTYIN] = uptr->buf | FE_CVALID;                    /* put char in mem */
155 apr_flg = apr_flg | APRF_CON;                           /* interrupt KS10 */
156 return SCPE_OK;
157 }
158 
159 /* Reset */
160 
fe_reset(DEVICE * dptr)161 t_stat fe_reset (DEVICE *dptr)
162 {
163 fei_unit.buf = feo_unit.buf = 0;
164 M[FE_CTYIN] = M[FE_CTYOUT] = 0;
165 apr_flg = apr_flg & ~(APRF_ITC | APRF_CON);
166 sim_activate (&fei_unit, KBD_WAIT (fei_unit.wait, tmxr_poll));
167 return SCPE_OK;
168 }
169 
170 /* Stop operating system */
171 
fe_stop_os(UNIT * uptr,int32 val,char * cptr,void * desc)172 t_stat fe_stop_os (UNIT *uptr, int32 val, char *cptr, void *desc)
173 {
174 M[FE_SWITCH] = IOBA_RP;                                 /* tell OS to stop */
175 return SCPE_OK;
176 }
177