1/* Using this to test something about what happens when you
2 * have an address trans or inst fetch exception w/ delay state NORMAL
3 */
4
5	.text
6	.globl __start
7__start:
8a:	addu $0, $0, $0
9
10/* the next instruction just isn't here (bus error on inst fetch).
11 * (that's why the makefile has an extra rule for this one -- it
12 *  needs not to be page-size-padded, it produces a 4-byte ROM file.)
13 * it should cause a fault with EPC = a + 4
14 */
15