1 #include <stdio.h>
2 /* ======================================================================== */
3 /* ========================= LICENSING & COPYRIGHT ======================== */
4 /* ======================================================================== */
5 /*
6 * MUSASHI
7 * Version 3.31
8 *
9 * A portable Motorola M680x0 processor emulation engine.
10 * Copyright 1998-2007 Karl Stenerud. All rights reserved.
11 *
12 * This code may be freely used for non-commercial purposes as long as this
13 * copyright notice remains unaltered in the source code and any binary files
14 * containing this code in compiled form.
15 *
16 * All other lisencing terms must be negotiated with the author
17 * (Karl Stenerud).
18 *
19 * The latest version of this code can be obtained at:
20 * http://kstenerud.cjb.net
21 */
22
23
24
25
26 #ifndef M68KCPU__HEADER
27 #define M68KCPU__HEADER
28
29 // notaz: something's missing this
30 #ifndef UINT64
31 #define UINT64 unsigned long long
32 #endif
33 #ifndef UINT16
34 #define UINT32 unsigned int
35 #define UINT16 unsigned short
36 #define UINT8 unsigned char
37 #endif
38
39 #include "m68k.h"
40 #include <limits.h>
41
42 #if M68K_EMULATE_ADDRESS_ERROR
43 #include <setjmp.h>
44 #endif /* M68K_EMULATE_ADDRESS_ERROR */
45
46 /* ======================================================================== */
47 /* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
48 /* ======================================================================== */
49
50 /* Check for > 32bit sizes */
51 #if UINT_MAX > 0xffffffff
52 #define M68K_INT_GT_32_BIT 1
53 #else
54 #define M68K_INT_GT_32_BIT 0
55 #endif
56
57 /* Data types used in this emulation core */
58 #undef sint8
59 #undef sint16
60 #undef sint32
61 #undef sint64
62 #undef uint8
63 #undef uint16
64 #undef uint32
65 #undef uint64
66 #undef sint
67 #undef uint
68
69 #define sint8 signed char /* ASG: changed from char to signed char */
70 #define sint16 signed short
71 #define sint32 signed int /* AWJ: changed from long to int */
72 #define uint8 unsigned char
73 #define uint16 unsigned short
74 #define uint32 unsigned int /* AWJ: changed from long to int */
75
76 /* signed and unsigned int must be at least 32 bits wide */
77 #define sint signed int
78 #define uint unsigned int
79
80
81 #if M68K_USE_64_BIT
82 #define sint64 signed long long
83 #define uint64 unsigned long long
84 #else
85 #define sint64 sint32
86 #define uint64 uint32
87 #endif /* M68K_USE_64_BIT */
88
89
90
91 /* Allow for architectures that don't have 8-bit sizes */
92 #if UCHAR_MAX == 0xff
93 #define MAKE_INT_8(A) (sint8)(A)
94 #else
95 #undef sint8
96 #define sint8 signed int
97 #undef uint8
98 #define uint8 unsigned int
MAKE_INT_8(uint value)99 INLINE sint MAKE_INT_8(uint value)
100 {
101 return (value & 0x80) ? value | ~0xff : value & 0xff;
102 }
103 #endif /* UCHAR_MAX == 0xff */
104
105
106 /* Allow for architectures that don't have 16-bit sizes */
107 #if USHRT_MAX == 0xffff
108 #define MAKE_INT_16(A) (sint16)(A)
109 #else
110 #undef sint16
111 #define sint16 signed int
112 #undef uint16
113 #define uint16 unsigned int
MAKE_INT_16(uint value)114 INLINE sint MAKE_INT_16(uint value)
115 {
116 return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
117 }
118 #endif /* USHRT_MAX == 0xffff */
119
120
121 /* Allow for architectures that don't have 32-bit sizes */
122 #if UINT_MAX == 0xffffffff
123 #define MAKE_INT_32(A) (sint32)(A)
124 #else
125 #undef sint32
126 #define sint32 signed int
127 #undef uint32
128 #define uint32 unsigned int
MAKE_INT_32(uint value)129 INLINE sint MAKE_INT_32(uint value)
130 {
131 return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff;
132 }
133 #endif /* UINT_MAX == 0xffffffff */
134
135
136
137
138 /* ======================================================================== */
139 /* ============================ GENERAL DEFINES =========================== */
140 /* ======================================================================== */
141
142 /* Exception Vectors handled by emulation */
143 #define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */
144 #define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */
145 #undef EXCEPTION_ILLEGAL_INSTRUCTION
146 #define EXCEPTION_ILLEGAL_INSTRUCTION 4
147 #define EXCEPTION_ZERO_DIVIDE 5
148 #define EXCEPTION_CHK 6
149 #define EXCEPTION_TRAPV 7
150 #define EXCEPTION_PRIVILEGE_VIOLATION 8
151 #define EXCEPTION_TRACE 9
152 #define EXCEPTION_1010 10
153 #define EXCEPTION_1111 11
154 #define EXCEPTION_FORMAT_ERROR 14
155 #define EXCEPTION_UNINITIALIZED_INTERRUPT 15
156 #define EXCEPTION_SPURIOUS_INTERRUPT 24
157 #define EXCEPTION_INTERRUPT_AUTOVECTOR 24
158 #define EXCEPTION_TRAP_BASE 32
159
160 /* Function codes set by CPU during data/address bus activity */
161 #define FUNCTION_CODE_USER_DATA 1
162 #define FUNCTION_CODE_USER_PROGRAM 2
163 #define FUNCTION_CODE_SUPERVISOR_DATA 5
164 #define FUNCTION_CODE_SUPERVISOR_PROGRAM 6
165 #define FUNCTION_CODE_CPU_SPACE 7
166
167 /* CPU types for deciding what to emulate */
168 #define CPU_TYPE_000 1
169 #define CPU_TYPE_008 2
170 #define CPU_TYPE_010 4
171 #define CPU_TYPE_EC020 8
172 #define CPU_TYPE_020 16
173 #define CPU_TYPE_040 32
174
175 /* Different ways to stop the CPU */
176 #define STOP_LEVEL_STOP 1
177 #define STOP_LEVEL_HALT 2
178
179 /* Used for 68000 address error processing */
180 #define INSTRUCTION_YES 0
181 #define INSTRUCTION_NO 0x08
182 #define MODE_READ 0x10
183 #define MODE_WRITE 0
184
185 #define RUN_MODE_NORMAL 0
186 #define RUN_MODE_BERR_AERR_RESET 1
187
188 #ifndef NULL
189 #define NULL ((void*)0)
190 #endif
191
192 /* ======================================================================== */
193 /* ================================ MACROS ================================ */
194 /* ======================================================================== */
195
196
197 /* ---------------------------- General Macros ---------------------------- */
198
199 /* Bit Isolation Macros */
200 #define BIT_0(A) ((A) & 0x00000001)
201 #define BIT_1(A) ((A) & 0x00000002)
202 #define BIT_2(A) ((A) & 0x00000004)
203 #define BIT_3(A) ((A) & 0x00000008)
204 #define BIT_4(A) ((A) & 0x00000010)
205 #define BIT_5(A) ((A) & 0x00000020)
206 #define BIT_6(A) ((A) & 0x00000040)
207 #define BIT_7(A) ((A) & 0x00000080)
208 #define BIT_8(A) ((A) & 0x00000100)
209 #define BIT_9(A) ((A) & 0x00000200)
210 #define BIT_A(A) ((A) & 0x00000400)
211 #define BIT_B(A) ((A) & 0x00000800)
212 #define BIT_C(A) ((A) & 0x00001000)
213 #define BIT_D(A) ((A) & 0x00002000)
214 #define BIT_E(A) ((A) & 0x00004000)
215 #define BIT_F(A) ((A) & 0x00008000)
216 #define BIT_10(A) ((A) & 0x00010000)
217 #define BIT_11(A) ((A) & 0x00020000)
218 #define BIT_12(A) ((A) & 0x00040000)
219 #define BIT_13(A) ((A) & 0x00080000)
220 #define BIT_14(A) ((A) & 0x00100000)
221 #define BIT_15(A) ((A) & 0x00200000)
222 #define BIT_16(A) ((A) & 0x00400000)
223 #define BIT_17(A) ((A) & 0x00800000)
224 #define BIT_18(A) ((A) & 0x01000000)
225 #define BIT_19(A) ((A) & 0x02000000)
226 #define BIT_1A(A) ((A) & 0x04000000)
227 #define BIT_1B(A) ((A) & 0x08000000)
228 #define BIT_1C(A) ((A) & 0x10000000)
229 #define BIT_1D(A) ((A) & 0x20000000)
230 #define BIT_1E(A) ((A) & 0x40000000)
231 #define BIT_1F(A) ((A) & 0x80000000)
232
233 /* Get the most significant bit for specific sizes */
234 #define GET_MSB_8(A) ((A) & 0x80)
235 #define GET_MSB_9(A) ((A) & 0x100)
236 #define GET_MSB_16(A) ((A) & 0x8000)
237 #define GET_MSB_17(A) ((A) & 0x10000)
238 #define GET_MSB_32(A) ((A) & 0x80000000)
239 #if M68K_USE_64_BIT
240 #define GET_MSB_33(A) ((A) & 0x100000000)
241 #endif /* M68K_USE_64_BIT */
242
243 /* Isolate nibbles */
244 #define LOW_NIBBLE(A) ((A) & 0x0f)
245 #define HIGH_NIBBLE(A) ((A) & 0xf0)
246
247 /* These are used to isolate 8, 16, and 32 bit sizes */
248 #define MASK_OUT_ABOVE_2(A) ((A) & 3)
249 #define MASK_OUT_ABOVE_8(A) ((A) & 0xff)
250 #define MASK_OUT_ABOVE_16(A) ((A) & 0xffff)
251 #define MASK_OUT_BELOW_2(A) ((A) & ~3)
252 #define MASK_OUT_BELOW_8(A) ((A) & ~0xff)
253 #define MASK_OUT_BELOW_16(A) ((A) & ~0xffff)
254
255 /* No need to mask if we are 32 bit */
256 #if M68K_INT_GT_32_BIT || M68K_USE_64_BIT
257 #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff)
258 #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff)
259 #else
260 #define MASK_OUT_ABOVE_32(A) (A)
261 #define MASK_OUT_BELOW_32(A) 0
262 #endif /* M68K_INT_GT_32_BIT || M68K_USE_64_BIT */
263
264 /* Simulate address lines of 68k family */
265 #define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK)
266
267
268 /* Shift & Rotate Macros. */
269 #define LSL(A, C) ((A) << (C))
270 #define LSR(A, C) ((A) >> (C))
271
272 /* Some > 32-bit optimizations */
273 #if M68K_INT_GT_32_BIT
274 /* Shift left and right */
275 #define LSR_32(A, C) ((A) >> (C))
276 #define LSL_32(A, C) ((A) << (C))
277 #else
278 /* We have to do this because the morons at ANSI decided that shifts
279 * by >= data size are undefined.
280 */
281 #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0)
282 #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0)
283 #endif /* M68K_INT_GT_32_BIT */
284
285 #if M68K_USE_64_BIT
286 #define LSL_32_64(A, C) ((A) << (C))
287 #define LSR_32_64(A, C) ((A) >> (C))
288 #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C)))
289 #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C)))
290 #endif /* M68K_USE_64_BIT */
291
292 #define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C)))
293 #define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C)))
294 #define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C)))
295 #define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C)))
296 #define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C)))
297 #define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C)))
298
299 #define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C)))
300 #define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C)))
301 #define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C)))
302 #define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C)))
303 #define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C)))
304 #define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C)))
305
306
307
308 /* ------------------------------ CPU Access ------------------------------ */
309
310 /* Access the CPU registers */
311 #define CPU_TYPE m68ki_cpu.cpu_type
312
313 #define REG_DA m68ki_cpu.dar /* easy access to data and address regs */
314 #define REG_D m68ki_cpu.dar
315 #define REG_A (m68ki_cpu.dar+8)
316 #define REG_PPC m68ki_cpu.ppc
317 #define REG_PC m68ki_cpu.pc
318 #define REG_SP_BASE m68ki_cpu.sp
319 #define REG_USP m68ki_cpu.sp[0]
320 #define REG_ISP m68ki_cpu.sp[4]
321 #define REG_MSP m68ki_cpu.sp[6]
322 #define REG_SP m68ki_cpu.dar[15]
323 #define REG_VBR m68ki_cpu.vbr
324 #define REG_SFC m68ki_cpu.sfc
325 #define REG_DFC m68ki_cpu.dfc
326 #define REG_CACR m68ki_cpu.cacr
327 #define REG_CAAR m68ki_cpu.caar
328 #define REG_IR m68ki_cpu.ir
329
330 #define REG_FP m68ki_cpu.fpr
331 #define REG_FPCR m68ki_cpu.fpcr
332 #define REG_FPSR m68ki_cpu.fpsr
333 #define REG_FPIAR m68ki_cpu.fpiar
334
335 #define FLAG_T1 m68ki_cpu.t1_flag
336 #define FLAG_T0 m68ki_cpu.t0_flag
337 #define FLAG_S m68ki_cpu.s_flag
338 #define FLAG_M m68ki_cpu.m_flag
339 #define FLAG_X m68ki_cpu.x_flag
340 #define FLAG_N m68ki_cpu.n_flag
341 #define FLAG_Z m68ki_cpu.not_z_flag
342 #define FLAG_V m68ki_cpu.v_flag
343 #define FLAG_C m68ki_cpu.c_flag
344 #define FLAG_INT_MASK m68ki_cpu.int_mask
345
346 #define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
347 #define CPU_INT_CYCLES m68ki_cpu.int_cycles /* ASG */
348 #define CPU_STOPPED m68ki_cpu.stopped
349 #define CPU_PREF_ADDR m68ki_cpu.pref_addr
350 #define CPU_PREF_DATA m68ki_cpu.pref_data
351 #define CPU_ADDRESS_MASK m68ki_cpu.address_mask
352 #define CPU_SR_MASK m68ki_cpu.sr_mask
353 #define CPU_INSTR_MODE m68ki_cpu.instr_mode
354 #define CPU_RUN_MODE m68ki_cpu.run_mode
355
356 #define CYC_INSTRUCTION m68ki_cpu.cyc_instruction
357 #define CYC_EXCEPTION m68ki_cpu.cyc_exception
358 #define CYC_BCC_NOTAKE_B m68ki_cpu.cyc_bcc_notake_b
359 #define CYC_BCC_NOTAKE_W m68ki_cpu.cyc_bcc_notake_w
360 #define CYC_DBCC_F_NOEXP m68ki_cpu.cyc_dbcc_f_noexp
361 #define CYC_DBCC_F_EXP m68ki_cpu.cyc_dbcc_f_exp
362 #define CYC_SCC_R_TRUE m68ki_cpu.cyc_scc_r_true
363 #define CYC_MOVEM_W m68ki_cpu.cyc_movem_w
364 #define CYC_MOVEM_L m68ki_cpu.cyc_movem_l
365 #define CYC_SHIFT m68ki_cpu.cyc_shift
366 #define CYC_RESET m68ki_cpu.cyc_reset
367
368
369 #define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback
370 #define CALLBACK_BKPT_ACK m68ki_cpu.bkpt_ack_callback
371 #define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback
372 #define CALLBACK_CMPILD_INSTR m68ki_cpu.cmpild_instr_callback
373 #define CALLBACK_RTE_INSTR m68ki_cpu.rte_instr_callback
374 #define CALLBACK_TAS_INSTR m68ki_cpu.tas_instr_callback
375 #define CALLBACK_PC_CHANGED m68ki_cpu.pc_changed_callback
376 #define CALLBACK_SET_FC m68ki_cpu.set_fc_callback
377 #define CALLBACK_INSTR_HOOK m68ki_cpu.instr_hook_callback
378
379
380
381 /* ----------------------------- Configuration ---------------------------- */
382
383 /* These defines are dependant on the configuration defines in m68kconf.h */
384
385 /* Disable certain comparisons if we're not using all CPU types */
386 #if M68K_EMULATE_040
387 #define CPU_TYPE_IS_040_PLUS(A) ((A) & CPU_TYPE_040)
388 #define CPU_TYPE_IS_040_LESS(A) 1
389 #else
390 #define CPU_TYPE_IS_040_PLUS(A) 0
391 #define CPU_TYPE_IS_040_LESS(A) 1
392 #endif
393
394 #if M68K_EMULATE_020
395 #define CPU_TYPE_IS_020_PLUS(A) ((A) & (CPU_TYPE_020 | CPU_TYPE_040))
396 #define CPU_TYPE_IS_020_LESS(A) 1
397 #else
398 #define CPU_TYPE_IS_020_PLUS(A) 0
399 #define CPU_TYPE_IS_020_LESS(A) 1
400 #endif
401
402 #if M68K_EMULATE_EC020
403 #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_040))
404 #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010 | CPU_TYPE_EC020))
405 #else
406 #define CPU_TYPE_IS_EC020_PLUS(A) CPU_TYPE_IS_020_PLUS(A)
407 #define CPU_TYPE_IS_EC020_LESS(A) CPU_TYPE_IS_020_LESS(A)
408 #endif
409
410 #if M68K_EMULATE_010
411 #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010)
412 #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020 | CPU_TYPE_040))
413 #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_008 | CPU_TYPE_010))
414 #else
415 #define CPU_TYPE_IS_010(A) 0
416 #define CPU_TYPE_IS_010_PLUS(A) CPU_TYPE_IS_EC020_PLUS(A)
417 #define CPU_TYPE_IS_010_LESS(A) CPU_TYPE_IS_EC020_LESS(A)
418 #endif
419
420 #if M68K_EMULATE_020 || M68K_EMULATE_EC020
421 #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
422 #else
423 #define CPU_TYPE_IS_020_VARIANT(A) 0
424 #endif
425
426 #if M68K_EMULATE_040 || M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010
427 #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000 || (A) == CPU_TYPE_008)
428 #else
429 #define CPU_TYPE_IS_000(A) 1
430 #endif
431
432
433 #if !M68K_SEPARATE_READS
434 #define m68k_read_immediate_16(A) m68ki_read_program_16(A)
435 #define m68k_read_immediate_32(A) m68ki_read_program_32(A)
436
437 #define m68k_read_pcrelative_8(A) m68ki_read_program_8(A)
438 #define m68k_read_pcrelative_16(A) m68ki_read_program_16(A)
439 #define m68k_read_pcrelative_32(A) m68ki_read_program_32(A)
440 #endif /* M68K_SEPARATE_READS */
441
442
443 /* Enable or disable callback functions */
444 #if M68K_EMULATE_INT_ACK
445 #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER
446 #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A)
447 #else
448 #define m68ki_int_ack(A) CALLBACK_INT_ACK(A)
449 #endif
450 #else
451 /* Default action is to used autovector mode, which is most common */
452 #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR
453 #endif /* M68K_EMULATE_INT_ACK */
454
455 #if M68K_EMULATE_BKPT_ACK
456 #if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER
457 #define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A)
458 #else
459 #define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A)
460 #endif
461 #else
462 #define m68ki_bkpt_ack(A)
463 #endif /* M68K_EMULATE_BKPT_ACK */
464
465 #if M68K_EMULATE_RESET
466 #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER
467 #define m68ki_output_reset() M68K_RESET_CALLBACK()
468 #else
469 #define m68ki_output_reset() CALLBACK_RESET_INSTR()
470 #endif
471 #else
472 #define m68ki_output_reset()
473 #endif /* M68K_EMULATE_RESET */
474
475 #if M68K_CMPILD_HAS_CALLBACK
476 #if M68K_CMPILD_HAS_CALLBACK == OPT_SPECIFY_HANDLER
477 #define m68ki_cmpild_callback(v,r) M68K_CMPILD_CALLBACK(v,r)
478 #else
479 #define m68ki_cmpild_callback(v,r) CALLBACK_CMPILD_INSTR(v,r)
480 #endif
481 #else
482 #define m68ki_cmpild_callback(v,r)
483 #endif /* M68K_CMPILD_HAS_CALLBACK */
484
485 #if M68K_RTE_HAS_CALLBACK
486 #if M68K_RTE_HAS_CALLBACK == OPT_SPECIFY_HANDLER
487 #define m68ki_rte_callback() M68K_RTE_CALLBACK()
488 #else
489 #define m68ki_rte_callback() CALLBACK_RTE_INSTR()
490 #endif
491 #else
492 #define m68ki_rte_callback()
493 #endif /* M68K_RTE_HAS_CALLBACK */
494
495 #if M68K_TAS_HAS_CALLBACK
496 #if M68K_TAS_HAS_CALLBACK == OPT_SPECIFY_HANDLER
497 #define m68ki_tas_callback() M68K_TAS_CALLBACK()
498 #else
499 #define m68ki_tas_callback() CALLBACK_TAS_INSTR()
500 #endif
501 #else
502 #define m68ki_tas_callback()
503 #endif /* M68K_TAS_HAS_CALLBACK */
504
505
506 #if M68K_INSTRUCTION_HOOK
507 #if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER
508 #define m68ki_instr_hook() M68K_INSTRUCTION_CALLBACK()
509 #else
510 #define m68ki_instr_hook() CALLBACK_INSTR_HOOK()
511 #endif
512 #else
513 #define m68ki_instr_hook()
514 #endif /* M68K_INSTRUCTION_HOOK */
515
516 #if M68K_MONITOR_PC
517 #if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER
518 #define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A))
519 #else
520 #define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A))
521 #endif
522 #else
523 #define m68ki_pc_changed(A)
524 #endif /* M68K_MONITOR_PC */
525
526
527 /* Enable or disable function code emulation */
528 #if M68K_EMULATE_FC
529 #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER
530 #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A)
531 #else
532 #define m68ki_set_fc(A) CALLBACK_SET_FC(A)
533 #endif
534 #define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA
535 #define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM
536 #define m68ki_get_address_space() m68ki_address_space
537 #else
538 #define m68ki_set_fc(A)
539 #define m68ki_use_data_space()
540 #define m68ki_use_program_space()
541 #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA
542 #endif /* M68K_EMULATE_FC */
543
544
545 /* Enable or disable trace emulation */
546 #if M68K_EMULATE_TRACE
547 /* Initiates trace checking before each instruction (t1) */
548 #define m68ki_trace_t1() m68ki_tracing = FLAG_T1
549 /* adds t0 to trace checking if we encounter change of flow */
550 #define m68ki_trace_t0() m68ki_tracing |= FLAG_T0
551 /* Clear all tracing */
552 #define m68ki_clear_trace() m68ki_tracing = 0
553 /* Cause a trace exception if we are tracing */
554 #define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace()
555 #else
556 #define m68ki_trace_t1()
557 #define m68ki_trace_t0()
558 #define m68ki_clear_trace()
559 #define m68ki_exception_if_trace()
560 #endif /* M68K_EMULATE_TRACE */
561
562
563
564 /* Address error */
565 #if M68K_EMULATE_ADDRESS_ERROR
566 #include <setjmp.h>
567 extern jmp_buf m68ki_aerr_trap;
568
569 #define m68ki_set_address_error_trap() \
570 if(setjmp(m68ki_aerr_trap) != 0) \
571 { \
572 m68ki_exception_address_error(); \
573 if(CPU_STOPPED) \
574 { \
575 SET_CYCLES(0); \
576 CPU_INT_CYCLES = 0; \
577 return m68ki_initial_cycles; \
578 } \
579 }
580
581 #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
582 if((ADDR)&1) \
583 { \
584 m68ki_aerr_address = ADDR; \
585 m68ki_aerr_write_mode = WRITE_MODE; \
586 m68ki_aerr_fc = FC; \
587 longjmp(m68ki_aerr_trap, 1); \
588 }
589
590 #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC) \
591 if (CPU_TYPE_IS_010_LESS(CPU_TYPE)) \
592 { \
593 m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
594 }
595 #else
596 #define m68ki_set_address_error_trap()
597 #define m68ki_check_address_error(ADDR, WRITE_MODE, FC)
598 #define m68ki_check_address_error_010_less(ADDR, WRITE_MODE, FC)
599 #endif /* M68K_ADDRESS_ERROR */
600
601 /* Logging */
602 #if M68K_LOG_ENABLE
603 #include <stdio.h>
604 extern FILE* M68K_LOG_FILEHANDLE
605 extern char* m68ki_cpu_names[];
606
607 #define M68K_DO_LOG(A) if(M68K_LOG_FILEHANDLE) fprintf A
608 #if M68K_LOG_1010_1111
609 #define M68K_DO_LOG_EMU(A) if(M68K_LOG_FILEHANDLE) fprintf A
610 #else
611 #define M68K_DO_LOG_EMU(A)
612 #endif
613 #else
614 #define M68K_DO_LOG(A)
615 #define M68K_DO_LOG_EMU(A)
616 #endif
617
618
619
620 /* -------------------------- EA / Operand Access ------------------------- */
621
622 /*
623 * The general instruction format follows this pattern:
624 * .... XXX. .... .YYY
625 * where XXX is register X and YYY is register Y
626 */
627 /* Data Register Isolation */
628 #define DX (REG_D[(REG_IR >> 9) & 7])
629 #define DY (REG_D[REG_IR & 7])
630 /* Address Register Isolation */
631 #define AX (REG_A[(REG_IR >> 9) & 7])
632 #define AY (REG_A[REG_IR & 7])
633
634
635 /* Effective Address Calculations */
636 #define EA_AY_AI_8() AY /* address register indirect */
637 #define EA_AY_AI_16() EA_AY_AI_8()
638 #define EA_AY_AI_32() EA_AY_AI_8()
639 #define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */
640 #define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */
641 #define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */
642 #define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */
643 #define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */
644 #define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */
645 #define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */
646 #define EA_AY_DI_16() EA_AY_DI_8()
647 #define EA_AY_DI_32() EA_AY_DI_8()
648 #define EA_AY_IX_8() m68ki_get_ea_ix(AY) /* indirect + index */
649 #define EA_AY_IX_16() EA_AY_IX_8()
650 #define EA_AY_IX_32() EA_AY_IX_8()
651
652 #define EA_AX_AI_8() AX
653 #define EA_AX_AI_16() EA_AX_AI_8()
654 #define EA_AX_AI_32() EA_AX_AI_8()
655 #define EA_AX_PI_8() (AX++)
656 #define EA_AX_PI_16() ((AX+=2)-2)
657 #define EA_AX_PI_32() ((AX+=4)-4)
658 #define EA_AX_PD_8() (--AX)
659 #define EA_AX_PD_16() (AX-=2)
660 #define EA_AX_PD_32() (AX-=4)
661 #define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16()))
662 #define EA_AX_DI_16() EA_AX_DI_8()
663 #define EA_AX_DI_32() EA_AX_DI_8()
664 #define EA_AX_IX_8() m68ki_get_ea_ix(AX)
665 #define EA_AX_IX_16() EA_AX_IX_8()
666 #define EA_AX_IX_32() EA_AX_IX_8()
667
668 #define EA_A7_PI_8() ((REG_A[7]+=2)-2)
669 #define EA_A7_PD_8() (REG_A[7]-=2)
670
671 #define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16()) /* absolute word */
672 #define EA_AW_16() EA_AW_8()
673 #define EA_AW_32() EA_AW_8()
674 #define EA_AL_8() m68ki_read_imm_32() /* absolute long */
675 #define EA_AL_16() EA_AL_8()
676 #define EA_AL_32() EA_AL_8()
677 #define EA_PCDI_8() m68ki_get_ea_pcdi() /* pc indirect + displacement */
678 #define EA_PCDI_16() EA_PCDI_8()
679 #define EA_PCDI_32() EA_PCDI_8()
680 #define EA_PCIX_8() m68ki_get_ea_pcix() /* pc indirect + index */
681 #define EA_PCIX_16() EA_PCIX_8()
682 #define EA_PCIX_32() EA_PCIX_8()
683
684
685 #define OPER_I_8() m68ki_read_imm_8()
686 #define OPER_I_16() m68ki_read_imm_16()
687 #define OPER_I_32() m68ki_read_imm_32()
688
689
690
691 /* --------------------------- Status Register ---------------------------- */
692
693 /* Flag Calculation Macros */
694 #define CFLAG_8(A) (A)
695 #define CFLAG_16(A) ((A)>>8)
696
697 #if M68K_INT_GT_32_BIT
698 #define CFLAG_ADD_32(S, D, R) ((R)>>24)
699 #define CFLAG_SUB_32(S, D, R) ((R)>>24)
700 #else
701 #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23)
702 #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23)
703 #endif /* M68K_INT_GT_32_BIT */
704
705 #define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
706 #define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
707 #define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24)
708
709 #define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
710 #define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
711 #define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24)
712
713 #define NFLAG_8(A) (A)
714 #define NFLAG_16(A) ((A)>>8)
715 #define NFLAG_32(A) ((A)>>24)
716 #define NFLAG_64(A) ((A)>>56)
717
718 #define ZFLAG_8(A) MASK_OUT_ABOVE_8(A)
719 #define ZFLAG_16(A) MASK_OUT_ABOVE_16(A)
720 #define ZFLAG_32(A) MASK_OUT_ABOVE_32(A)
721
722
723 /* Flag values */
724 #define NFLAG_SET 0x80
725 #define NFLAG_CLEAR 0
726 #define CFLAG_SET 0x100
727 #define CFLAG_CLEAR 0
728 #define XFLAG_SET 0x100
729 #define XFLAG_CLEAR 0
730 #define VFLAG_SET 0x80
731 #define VFLAG_CLEAR 0
732 #define ZFLAG_SET 0
733 #define ZFLAG_CLEAR 0xffffffff
734
735 #define SFLAG_SET 4
736 #define SFLAG_CLEAR 0
737 #define MFLAG_SET 2
738 #define MFLAG_CLEAR 0
739
740 /* Turn flag values into 1 or 0 */
741 #define XFLAG_AS_1() ((FLAG_X>>8)&1)
742 #define NFLAG_AS_1() ((FLAG_N>>7)&1)
743 #define VFLAG_AS_1() ((FLAG_V>>7)&1)
744 #define ZFLAG_AS_1() (!FLAG_Z)
745 #define CFLAG_AS_1() ((FLAG_C>>8)&1)
746
747
748 /* Conditions */
749 #define COND_CS() (FLAG_C&0x100)
750 #define COND_CC() (!COND_CS())
751 #define COND_VS() (FLAG_V&0x80)
752 #define COND_VC() (!COND_VS())
753 #define COND_NE() FLAG_Z
754 #define COND_EQ() (!COND_NE())
755 #define COND_MI() (FLAG_N&0x80)
756 #define COND_PL() (!COND_MI())
757 #define COND_LT() ((FLAG_N^FLAG_V)&0x80)
758 #define COND_GE() (!COND_LT())
759 #define COND_HI() (COND_CC() && COND_NE())
760 #define COND_LS() (COND_CS() || COND_EQ())
761 #define COND_GT() (COND_GE() && COND_NE())
762 #define COND_LE() (COND_LT() || COND_EQ())
763
764 /* Reversed conditions */
765 #define COND_NOT_CS() COND_CC()
766 #define COND_NOT_CC() COND_CS()
767 #define COND_NOT_VS() COND_VC()
768 #define COND_NOT_VC() COND_VS()
769 #define COND_NOT_NE() COND_EQ()
770 #define COND_NOT_EQ() COND_NE()
771 #define COND_NOT_MI() COND_PL()
772 #define COND_NOT_PL() COND_MI()
773 #define COND_NOT_LT() COND_GE()
774 #define COND_NOT_GE() COND_LT()
775 #define COND_NOT_HI() COND_LS()
776 #define COND_NOT_LS() COND_HI()
777 #define COND_NOT_GT() COND_LE()
778 #define COND_NOT_LE() COND_GT()
779
780 /* Not real conditions, but here for convenience */
781 #define COND_XS() (FLAG_X&0x100)
782 #define COND_XC() (!COND_XS)
783
784
785 /* Get the condition code register */
786 #define m68ki_get_ccr() ((COND_XS() >> 4) | \
787 (COND_MI() >> 4) | \
788 (COND_EQ() << 2) | \
789 (COND_VS() >> 6) | \
790 (COND_CS() >> 8))
791
792 /* Get the status register */
793 #define m68ki_get_sr() ( FLAG_T1 | \
794 FLAG_T0 | \
795 (FLAG_S << 11) | \
796 (FLAG_M << 11) | \
797 FLAG_INT_MASK | \
798 m68ki_get_ccr())
799
800
801
802 /* ---------------------------- Cycle Counting ---------------------------- */
803
804 #define ADD_CYCLES(A) m68ki_remaining_cycles += (A)
805 #define USE_CYCLES(A) m68ki_remaining_cycles -= (A)
806 #define SET_CYCLES(A) m68ki_remaining_cycles = A
807 #define GET_CYCLES() m68ki_remaining_cycles
808 #define USE_ALL_CYCLES() m68ki_remaining_cycles = 0
809
810
811
812 /* ----------------------------- Read / Write ----------------------------- */
813
814 /* Read from the current address space */
815 #define m68ki_read_8(A) m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space())
816 #define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space())
817 #define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space())
818
819 /* Write to the current data space */
820 #define m68ki_write_8(A, V) m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
821 #define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
822 #define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
823
824 #if M68K_SIMULATE_PD_WRITES
825 #define m68ki_write_32_pd(A, V) m68ki_write_32_pd_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
826 #else
827 #define m68ki_write_32_pd(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
828 #endif
829
830 /* map read immediate 8 to read immediate 16 */
831 #define m68ki_read_imm_8() MASK_OUT_ABOVE_8(m68ki_read_imm_16())
832
833 /* Map PC-relative reads */
834 #define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A)
835 #define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A)
836 #define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A)
837
838 /* Read from the program space */
839 #define m68ki_read_program_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
840 #define m68ki_read_program_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
841 #define m68ki_read_program_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
842
843 /* Read from the data space */
844 #define m68ki_read_data_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
845 #define m68ki_read_data_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
846 #define m68ki_read_data_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
847
848
849
850 /* ======================================================================== */
851 /* =============================== PROTOTYPES ============================= */
852 /* ======================================================================== */
853
854 typedef union
855 {
856 UINT64 i;
857 double f;
858 } fp_reg;
859
860 typedef struct
861 {
862 uint cpu_type; /* CPU Type: 68000, 68008, 68010, 68EC020, or 68020 */
863 uint dar[16]; /* Data and Address Registers */
864 uint ppc; /* Previous program counter */
865 uint pc; /* Program Counter */
866 uint sp[7]; /* User, Interrupt, and Master Stack Pointers */
867 uint vbr; /* Vector Base Register (m68010+) */
868 uint sfc; /* Source Function Code Register (m68010+) */
869 uint dfc; /* Destination Function Code Register (m68010+) */
870 uint cacr; /* Cache Control Register (m68020, unemulated) */
871 uint caar; /* Cache Address Register (m68020, unemulated) */
872 uint ir; /* Instruction Register */
873 fp_reg fpr[8]; /* FPU Data Register (m68040) */
874 uint fpiar; /* FPU Instruction Address Register (m68040) */
875 uint fpsr; /* FPU Status Register (m68040) */
876 uint fpcr; /* FPU Control Register (m68040) */
877 uint t1_flag; /* Trace 1 */
878 uint t0_flag; /* Trace 0 */
879 uint s_flag; /* Supervisor */
880 uint m_flag; /* Master/Interrupt state */
881 uint x_flag; /* Extend */
882 uint n_flag; /* Negative */
883 uint not_z_flag; /* Zero, inverted for speedups */
884 uint v_flag; /* Overflow */
885 uint c_flag; /* Carry */
886 uint int_mask; /* I0-I2 */
887 uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
888 uint int_cycles; /* ASG: extra cycles from generated interrupts */
889 uint stopped; /* Stopped state */
890 uint pref_addr; /* Last prefetch address */
891 uint pref_data; /* Data in the prefetch queue */
892 uint address_mask; /* Available address pins */
893 uint sr_mask; /* Implemented status register bits */
894 uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
895 uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
896
897 /* Clocks required for instructions / exceptions */
898 uint cyc_bcc_notake_b;
899 uint cyc_bcc_notake_w;
900 uint cyc_dbcc_f_noexp;
901 uint cyc_dbcc_f_exp;
902 uint cyc_scc_r_true;
903 uint cyc_movem_w;
904 uint cyc_movem_l;
905 uint cyc_shift;
906 uint cyc_reset;
907 uint8* cyc_instruction;
908 uint8* cyc_exception;
909
910 /* Callbacks to host */
911 int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
912 void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
913 void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
914 void (*cmpild_instr_callback)(unsigned int, int); /* Called when a CMPI.L #v, Dn instruction is encountered */
915 void (*rte_instr_callback)(void); /* Called when a RTE instruction is encountered */
916 int (*tas_instr_callback)(void); /* Called when a TAS instruction is encountered, allows / disallows writeback */
917 void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
918 void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
919 void (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */
920
921 // notaz
922 sint cyc_remaining_cycles;
923 sint not_polling;
924 } m68ki_cpu_core;
925
926 // notaz
927 extern m68ki_cpu_core *m68ki_cpu_p;
928 #define m68ki_cpu (*m68ki_cpu_p)
929 #define m68ki_remaining_cycles m68ki_cpu_p->cyc_remaining_cycles
930
931
932 //extern m68ki_cpu_core m68ki_cpu;
933 //extern sint m68ki_remaining_cycles;
934 extern uint m68ki_tracing;
935 extern uint8 m68ki_shift_8_table[];
936 extern uint16 m68ki_shift_16_table[];
937 extern uint m68ki_shift_32_table[];
938 extern uint8 m68ki_exception_cycle_table[][256];
939 extern uint m68ki_address_space;
940 extern uint8 m68ki_ea_idx_cycle_table[];
941
942 extern uint m68ki_aerr_address;
943 extern uint m68ki_aerr_write_mode;
944 extern uint m68ki_aerr_fc;
945
946 /* Read data immediately after the program counter */
947 INLINE uint m68ki_read_imm_16(void);
948 INLINE uint m68ki_read_imm_32(void);
949
950 /* Read data with specific function code */
951 INLINE uint m68ki_read_8_fc (uint address, uint fc);
952 INLINE uint m68ki_read_16_fc (uint address, uint fc);
953 INLINE uint m68ki_read_32_fc (uint address, uint fc);
954
955 /* Write data with specific function code */
956 INLINE void m68ki_write_8_fc (uint address, uint fc, uint value);
957 INLINE void m68ki_write_16_fc(uint address, uint fc, uint value);
958 INLINE void m68ki_write_32_fc(uint address, uint fc, uint value);
959 #if M68K_SIMULATE_PD_WRITES
960 INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value);
961 #endif /* M68K_SIMULATE_PD_WRITES */
962
963 /* Indexed and PC-relative ea fetching */
964 INLINE uint m68ki_get_ea_pcdi(void);
965 INLINE uint m68ki_get_ea_pcix(void);
966 INLINE uint m68ki_get_ea_ix(uint An);
967
968 /* Operand fetching */
969 INLINE uint OPER_AY_AI_8(void);
970 INLINE uint OPER_AY_AI_16(void);
971 INLINE uint OPER_AY_AI_32(void);
972 INLINE uint OPER_AY_PI_8(void);
973 INLINE uint OPER_AY_PI_16(void);
974 INLINE uint OPER_AY_PI_32(void);
975 INLINE uint OPER_AY_PD_8(void);
976 INLINE uint OPER_AY_PD_16(void);
977 INLINE uint OPER_AY_PD_32(void);
978 INLINE uint OPER_AY_DI_8(void);
979 INLINE uint OPER_AY_DI_16(void);
980 INLINE uint OPER_AY_DI_32(void);
981 INLINE uint OPER_AY_IX_8(void);
982 INLINE uint OPER_AY_IX_16(void);
983 INLINE uint OPER_AY_IX_32(void);
984
985 INLINE uint OPER_AX_AI_8(void);
986 INLINE uint OPER_AX_AI_16(void);
987 INLINE uint OPER_AX_AI_32(void);
988 INLINE uint OPER_AX_PI_8(void);
989 INLINE uint OPER_AX_PI_16(void);
990 INLINE uint OPER_AX_PI_32(void);
991 INLINE uint OPER_AX_PD_8(void);
992 INLINE uint OPER_AX_PD_16(void);
993 INLINE uint OPER_AX_PD_32(void);
994 INLINE uint OPER_AX_DI_8(void);
995 INLINE uint OPER_AX_DI_16(void);
996 INLINE uint OPER_AX_DI_32(void);
997 INLINE uint OPER_AX_IX_8(void);
998 INLINE uint OPER_AX_IX_16(void);
999 INLINE uint OPER_AX_IX_32(void);
1000
1001 INLINE uint OPER_A7_PI_8(void);
1002 INLINE uint OPER_A7_PD_8(void);
1003
1004 INLINE uint OPER_AW_8(void);
1005 INLINE uint OPER_AW_16(void);
1006 INLINE uint OPER_AW_32(void);
1007 INLINE uint OPER_AL_8(void);
1008 INLINE uint OPER_AL_16(void);
1009 INLINE uint OPER_AL_32(void);
1010 INLINE uint OPER_PCDI_8(void);
1011 INLINE uint OPER_PCDI_16(void);
1012 INLINE uint OPER_PCDI_32(void);
1013 INLINE uint OPER_PCIX_8(void);
1014 INLINE uint OPER_PCIX_16(void);
1015 INLINE uint OPER_PCIX_32(void);
1016
1017 /* Stack operations */
1018 INLINE void m68ki_push_16(uint value);
1019 INLINE void m68ki_push_32(uint value);
1020 INLINE uint m68ki_pull_16(void);
1021 INLINE uint m68ki_pull_32(void);
1022
1023 /* Program flow operations */
1024 INLINE void m68ki_jump(uint new_pc);
1025 INLINE void m68ki_jump_vector(uint vector);
1026 INLINE void m68ki_branch_8(uint offset);
1027 INLINE void m68ki_branch_16(uint offset);
1028 INLINE void m68ki_branch_32(uint offset);
1029
1030 /* Status register operations. */
1031 INLINE void m68ki_set_s_flag(uint value); /* Only bit 2 of value should be set (i.e. 4 or 0) */
1032 INLINE void m68ki_set_sm_flag(uint value); /* only bits 1 and 2 of value should be set */
1033 INLINE void m68ki_set_ccr(uint value); /* set the condition code register */
1034 INLINE void m68ki_set_sr(uint value); /* set the status register */
1035 INLINE void m68ki_set_sr_noint(uint value); /* set the status register */
1036
1037 /* Exception processing */
1038 INLINE uint m68ki_init_exception(void); /* Initial exception processing */
1039
1040 INLINE void m68ki_stack_frame_3word(uint pc, uint sr); /* Stack various frame types */
1041 INLINE void m68ki_stack_frame_buserr(uint sr);
1042
1043 INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector);
1044 INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector);
1045 INLINE void m68ki_stack_frame_0010(uint sr, uint vector);
1046 INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector);
1047 INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc);
1048 INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc);
1049
1050 INLINE void m68ki_exception_trap(uint vector);
1051 INLINE void m68ki_exception_trapN(uint vector);
1052 INLINE void m68ki_exception_trace(void);
1053 INLINE void m68ki_exception_privilege_violation(void);
1054 INLINE void m68ki_exception_1010(void);
1055 INLINE void m68ki_exception_1111(void);
1056 INLINE void m68ki_exception_illegal(void);
1057 INLINE void m68ki_exception_format_error(void);
1058 INLINE void m68ki_exception_address_error(void);
1059 INLINE void m68ki_exception_interrupt(uint int_level);
1060 INLINE void m68ki_check_interrupts(void); /* ASG: check for interrupts */
1061
1062 /* quick disassembly (used for logging) */
1063 char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type);
1064
1065
1066 /* ======================================================================== */
1067 /* =========================== UTILITY FUNCTIONS ========================== */
1068 /* ======================================================================== */
1069
1070
1071 /* ---------------------------- Read Immediate ---------------------------- */
1072
1073 /* Handles all immediate reads, does address error check, function code setting,
1074 * and prefetching if they are enabled in m68kconf.h
1075 */
m68ki_read_imm_16(void)1076 INLINE uint m68ki_read_imm_16(void)
1077 {
1078 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1079 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1080 #if M68K_EMULATE_PREFETCH
1081 if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
1082 {
1083 CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
1084 CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
1085 }
1086 REG_PC += 2;
1087 return MASK_OUT_ABOVE_16(CPU_PREF_DATA >> ((2-((REG_PC-2)&2))<<3));
1088 #else
1089 REG_PC += 2;
1090 return m68k_read_immediate_16(ADDRESS_68K(REG_PC-2));
1091 #endif /* M68K_EMULATE_PREFETCH */
1092 }
m68ki_read_imm_32(void)1093 INLINE uint m68ki_read_imm_32(void)
1094 {
1095 #if M68K_EMULATE_PREFETCH
1096 uint temp_val;
1097
1098 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1099 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1100 if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
1101 {
1102 CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
1103 CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
1104 }
1105 temp_val = CPU_PREF_DATA;
1106 REG_PC += 2;
1107 if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
1108 {
1109 CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
1110 CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
1111 temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | (CPU_PREF_DATA >> 16));
1112 }
1113 REG_PC += 2;
1114
1115 return temp_val;
1116 #else
1117 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1118 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1119 REG_PC += 4;
1120 return m68k_read_immediate_32(ADDRESS_68K(REG_PC-4));
1121 #endif /* M68K_EMULATE_PREFETCH */
1122 }
1123
1124
1125
1126 /* ------------------------- Top level read/write ------------------------- */
1127
1128 /* Handles all memory accesses (except for immediate reads if they are
1129 * configured to use separate functions in m68kconf.h).
1130 * All memory accesses must go through these top level functions.
1131 * These functions will also check for address error and set the function
1132 * code if they are enabled in m68kconf.h.
1133 */
m68ki_read_8_fc(uint address,uint fc)1134 INLINE uint m68ki_read_8_fc(uint address, uint fc)
1135 {
1136 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1137 return m68k_read_memory_8(ADDRESS_68K(address));
1138 }
m68ki_read_16_fc(uint address,uint fc)1139 INLINE uint m68ki_read_16_fc(uint address, uint fc)
1140 {
1141 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1142 m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1143 return m68k_read_memory_16(ADDRESS_68K(address));
1144 }
m68ki_read_32_fc(uint address,uint fc)1145 INLINE uint m68ki_read_32_fc(uint address, uint fc)
1146 {
1147 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1148 m68ki_check_address_error_010_less(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1149 return m68k_read_memory_32(ADDRESS_68K(address));
1150 }
1151
m68ki_write_8_fc(uint address,uint fc,uint value)1152 INLINE void m68ki_write_8_fc(uint address, uint fc, uint value)
1153 {
1154 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1155 m68k_write_memory_8(ADDRESS_68K(address), value);
1156 }
m68ki_write_16_fc(uint address,uint fc,uint value)1157 INLINE void m68ki_write_16_fc(uint address, uint fc, uint value)
1158 {
1159 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1160 m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1161 m68k_write_memory_16(ADDRESS_68K(address), value);
1162 }
m68ki_write_32_fc(uint address,uint fc,uint value)1163 INLINE void m68ki_write_32_fc(uint address, uint fc, uint value)
1164 {
1165 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1166 m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1167 m68k_write_memory_32(ADDRESS_68K(address), value);
1168 }
1169
1170 #if M68K_SIMULATE_PD_WRITES
m68ki_write_32_pd_fc(uint address,uint fc,uint value)1171 INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value)
1172 {
1173 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1174 m68ki_check_address_error_010_less(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1175 m68k_write_memory_32_pd(ADDRESS_68K(address), value);
1176 }
1177 #endif
1178
1179
1180 /* --------------------- Effective Address Calculation -------------------- */
1181
1182 /* The program counter relative addressing modes cause operands to be
1183 * retrieved from program space, not data space.
1184 */
m68ki_get_ea_pcdi(void)1185 INLINE uint m68ki_get_ea_pcdi(void)
1186 {
1187 uint old_pc = REG_PC;
1188 m68ki_use_program_space(); /* auto-disable */
1189 return old_pc + MAKE_INT_16(m68ki_read_imm_16());
1190 }
1191
1192
m68ki_get_ea_pcix(void)1193 INLINE uint m68ki_get_ea_pcix(void)
1194 {
1195 m68ki_use_program_space(); /* auto-disable */
1196 return m68ki_get_ea_ix(REG_PC);
1197 }
1198
1199 /* Indexed addressing modes are encoded as follows:
1200 *
1201 * Base instruction format:
1202 * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
1203 * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An)
1204 *
1205 * Base instruction format for destination EA in move instructions:
1206 * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0
1207 * x x x x | BASE REG | 1 1 0 | X X X X X X (An)
1208 *
1209 * Brief extension format:
1210 * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0
1211 * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT
1212 *
1213 * Full extension format:
1214 * F E D C B A 9 8 7 6 5 4 3 2 1 0
1215 * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS
1216 * BASE DISPLACEMENT (0, 16, 32 bit) (bd)
1217 * OUTER DISPLACEMENT (0, 16, 32 bit) (od)
1218 *
1219 * D/A: 0 = Dn, 1 = An (Xn)
1220 * W/L: 0 = W (sign extend), 1 = L (.SIZE)
1221 * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE)
1222 * BS: 0=add base reg, 1=suppress base reg (An suppressed)
1223 * IS: 0=add index, 1=suppress index (Xn suppressed)
1224 * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd)
1225 *
1226 * IS I/IS Operation
1227 * 0 000 No Memory Indirect
1228 * 0 001 indir prex with null outer
1229 * 0 010 indir prex with word outer
1230 * 0 011 indir prex with long outer
1231 * 0 100 reserved
1232 * 0 101 indir postx with null outer
1233 * 0 110 indir postx with word outer
1234 * 0 111 indir postx with long outer
1235 * 1 000 no memory indirect
1236 * 1 001 mem indir with null outer
1237 * 1 010 mem indir with word outer
1238 * 1 011 mem indir with long outer
1239 * 1 100-111 reserved
1240 */
m68ki_get_ea_ix(uint An)1241 INLINE uint m68ki_get_ea_ix(uint An)
1242 {
1243 /* An = base register */
1244 uint extension = m68ki_read_imm_16();
1245 uint Xn = 0; /* Index register */
1246 uint bd = 0; /* Base Displacement */
1247 uint od = 0; /* Outer Displacement */
1248
1249 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1250 {
1251 /* Calculate index */
1252 Xn = REG_DA[extension>>12]; /* Xn */
1253 if(!BIT_B(extension)) /* W/L */
1254 Xn = MAKE_INT_16(Xn);
1255
1256 /* Add base register and displacement and return */
1257 return An + Xn + MAKE_INT_8(extension);
1258 }
1259
1260 /* Brief extension format */
1261 if(!BIT_8(extension))
1262 {
1263 /* Calculate index */
1264 Xn = REG_DA[extension>>12]; /* Xn */
1265 if(!BIT_B(extension)) /* W/L */
1266 Xn = MAKE_INT_16(Xn);
1267 /* Add scale if proper CPU type */
1268 if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
1269 Xn <<= (extension>>9) & 3; /* SCALE */
1270
1271 /* Add base register and displacement and return */
1272 return An + Xn + MAKE_INT_8(extension);
1273 }
1274
1275 /* Full extension format */
1276
1277 USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]);
1278
1279 /* Check if base register is present */
1280 if(BIT_7(extension)) /* BS */
1281 An = 0; /* An */
1282
1283 /* Check if index is present */
1284 if(!BIT_6(extension)) /* IS */
1285 {
1286 Xn = REG_DA[extension>>12]; /* Xn */
1287 if(!BIT_B(extension)) /* W/L */
1288 Xn = MAKE_INT_16(Xn);
1289 Xn <<= (extension>>9) & 3; /* SCALE */
1290 }
1291
1292 /* Check if base displacement is present */
1293 if(BIT_5(extension)) /* BD SIZE */
1294 bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
1295
1296 /* If no indirect action, we are done */
1297 if(!(extension&7)) /* No Memory Indirect */
1298 return An + bd + Xn;
1299
1300 /* Check if outer displacement is present */
1301 if(BIT_1(extension)) /* I/IS: od */
1302 od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
1303
1304 /* Postindex */
1305 if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */
1306 return m68ki_read_32(An + bd) + Xn + od;
1307
1308 /* Preindex */
1309 return m68ki_read_32(An + bd + Xn) + od;
1310 }
1311
1312
1313 /* Fetch operands */
OPER_AY_AI_8(void)1314 INLINE uint OPER_AY_AI_8(void) {uint ea = EA_AY_AI_8(); return m68ki_read_8(ea); }
OPER_AY_AI_16(void)1315 INLINE uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);}
OPER_AY_AI_32(void)1316 INLINE uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);}
OPER_AY_PI_8(void)1317 INLINE uint OPER_AY_PI_8(void) {uint ea = EA_AY_PI_8(); return m68ki_read_8(ea); }
OPER_AY_PI_16(void)1318 INLINE uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);}
OPER_AY_PI_32(void)1319 INLINE uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);}
OPER_AY_PD_8(void)1320 INLINE uint OPER_AY_PD_8(void) {uint ea = EA_AY_PD_8(); return m68ki_read_8(ea); }
OPER_AY_PD_16(void)1321 INLINE uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);}
OPER_AY_PD_32(void)1322 INLINE uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);}
OPER_AY_DI_8(void)1323 INLINE uint OPER_AY_DI_8(void) {uint ea = EA_AY_DI_8(); return m68ki_read_8(ea); }
OPER_AY_DI_16(void)1324 INLINE uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);}
OPER_AY_DI_32(void)1325 INLINE uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);}
OPER_AY_IX_8(void)1326 INLINE uint OPER_AY_IX_8(void) {uint ea = EA_AY_IX_8(); return m68ki_read_8(ea); }
OPER_AY_IX_16(void)1327 INLINE uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);}
OPER_AY_IX_32(void)1328 INLINE uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);}
1329
OPER_AX_AI_8(void)1330 INLINE uint OPER_AX_AI_8(void) {uint ea = EA_AX_AI_8(); return m68ki_read_8(ea); }
OPER_AX_AI_16(void)1331 INLINE uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);}
OPER_AX_AI_32(void)1332 INLINE uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);}
OPER_AX_PI_8(void)1333 INLINE uint OPER_AX_PI_8(void) {uint ea = EA_AX_PI_8(); return m68ki_read_8(ea); }
OPER_AX_PI_16(void)1334 INLINE uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);}
OPER_AX_PI_32(void)1335 INLINE uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);}
OPER_AX_PD_8(void)1336 INLINE uint OPER_AX_PD_8(void) {uint ea = EA_AX_PD_8(); return m68ki_read_8(ea); }
OPER_AX_PD_16(void)1337 INLINE uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);}
OPER_AX_PD_32(void)1338 INLINE uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);}
OPER_AX_DI_8(void)1339 INLINE uint OPER_AX_DI_8(void) {uint ea = EA_AX_DI_8(); return m68ki_read_8(ea); }
OPER_AX_DI_16(void)1340 INLINE uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);}
OPER_AX_DI_32(void)1341 INLINE uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);}
OPER_AX_IX_8(void)1342 INLINE uint OPER_AX_IX_8(void) {uint ea = EA_AX_IX_8(); return m68ki_read_8(ea); }
OPER_AX_IX_16(void)1343 INLINE uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);}
OPER_AX_IX_32(void)1344 INLINE uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);}
1345
OPER_A7_PI_8(void)1346 INLINE uint OPER_A7_PI_8(void) {uint ea = EA_A7_PI_8(); return m68ki_read_8(ea); }
OPER_A7_PD_8(void)1347 INLINE uint OPER_A7_PD_8(void) {uint ea = EA_A7_PD_8(); return m68ki_read_8(ea); }
1348
OPER_AW_8(void)1349 INLINE uint OPER_AW_8(void) {uint ea = EA_AW_8(); return m68ki_read_8(ea); }
OPER_AW_16(void)1350 INLINE uint OPER_AW_16(void) {uint ea = EA_AW_16(); return m68ki_read_16(ea);}
OPER_AW_32(void)1351 INLINE uint OPER_AW_32(void) {uint ea = EA_AW_32(); return m68ki_read_32(ea);}
OPER_AL_8(void)1352 INLINE uint OPER_AL_8(void) {uint ea = EA_AL_8(); return m68ki_read_8(ea); }
OPER_AL_16(void)1353 INLINE uint OPER_AL_16(void) {uint ea = EA_AL_16(); return m68ki_read_16(ea);}
OPER_AL_32(void)1354 INLINE uint OPER_AL_32(void) {uint ea = EA_AL_32(); return m68ki_read_32(ea);}
OPER_PCDI_8(void)1355 INLINE uint OPER_PCDI_8(void) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); }
OPER_PCDI_16(void)1356 INLINE uint OPER_PCDI_16(void) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);}
OPER_PCDI_32(void)1357 INLINE uint OPER_PCDI_32(void) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);}
OPER_PCIX_8(void)1358 INLINE uint OPER_PCIX_8(void) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); }
OPER_PCIX_16(void)1359 INLINE uint OPER_PCIX_16(void) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);}
OPER_PCIX_32(void)1360 INLINE uint OPER_PCIX_32(void) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);}
1361
1362
1363
1364 /* ---------------------------- Stack Functions --------------------------- */
1365
1366 /* Push/pull data from the stack */
m68ki_push_16(uint value)1367 INLINE void m68ki_push_16(uint value)
1368 {
1369 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1370 m68ki_write_16(REG_SP, value);
1371 }
1372
m68ki_push_32(uint value)1373 INLINE void m68ki_push_32(uint value)
1374 {
1375 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1376 m68ki_write_32(REG_SP, value);
1377 }
1378
m68ki_pull_16(void)1379 INLINE uint m68ki_pull_16(void)
1380 {
1381 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1382 return m68ki_read_16(REG_SP-2);
1383 }
1384
m68ki_pull_32(void)1385 INLINE uint m68ki_pull_32(void)
1386 {
1387 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1388 return m68ki_read_32(REG_SP-4);
1389 }
1390
1391
1392 /* Increment/decrement the stack as if doing a push/pull but
1393 * don't do any memory access.
1394 */
m68ki_fake_push_16(void)1395 INLINE void m68ki_fake_push_16(void)
1396 {
1397 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1398 }
1399
m68ki_fake_push_32(void)1400 INLINE void m68ki_fake_push_32(void)
1401 {
1402 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1403 }
1404
m68ki_fake_pull_16(void)1405 INLINE void m68ki_fake_pull_16(void)
1406 {
1407 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1408 }
1409
m68ki_fake_pull_32(void)1410 INLINE void m68ki_fake_pull_32(void)
1411 {
1412 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1413 }
1414
1415
1416 /* ----------------------------- Program Flow ----------------------------- */
1417
1418 /* Jump to a new program location or vector.
1419 * These functions will also call the pc_changed callback if it was enabled
1420 * in m68kconf.h.
1421 */
m68ki_jump(uint new_pc)1422 INLINE void m68ki_jump(uint new_pc)
1423 {
1424 REG_PC = new_pc;
1425 m68ki_pc_changed(REG_PC);
1426 }
1427
m68ki_jump_vector(uint vector)1428 INLINE void m68ki_jump_vector(uint vector)
1429 {
1430 REG_PC = (vector<<2) + REG_VBR;
1431 REG_PC = m68ki_read_data_32(REG_PC);
1432 m68ki_pc_changed(REG_PC);
1433 }
1434
1435
1436 /* Branch to a new memory location.
1437 * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h.
1438 * So far I've found no problems with not calling pc_changed for 8 or 16
1439 * bit branches.
1440 */
m68ki_branch_8(uint offset)1441 INLINE void m68ki_branch_8(uint offset)
1442 {
1443 REG_PC += MAKE_INT_8(offset);
1444 }
1445
m68ki_branch_16(uint offset)1446 INLINE void m68ki_branch_16(uint offset)
1447 {
1448 REG_PC += MAKE_INT_16(offset);
1449 }
1450
m68ki_branch_32(uint offset)1451 INLINE void m68ki_branch_32(uint offset)
1452 {
1453 REG_PC += offset;
1454 m68ki_pc_changed(REG_PC);
1455 }
1456
1457
1458
1459 /* ---------------------------- Status Register --------------------------- */
1460
1461 /* Set the S flag and change the active stack pointer.
1462 * Note that value MUST be 4 or 0.
1463 */
m68ki_set_s_flag(uint value)1464 INLINE void m68ki_set_s_flag(uint value)
1465 {
1466 /* Backup the old stack pointer */
1467 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1468 /* Set the S flag */
1469 FLAG_S = value;
1470 /* Set the new stack pointer */
1471 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1472 }
1473
1474 /* Set the S and M flags and change the active stack pointer.
1475 * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
1476 */
m68ki_set_sm_flag(uint value)1477 INLINE void m68ki_set_sm_flag(uint value)
1478 {
1479 /* Backup the old stack pointer */
1480 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1481 /* Set the S and M flags */
1482 FLAG_S = value & SFLAG_SET;
1483 FLAG_M = value & MFLAG_SET;
1484 /* Set the new stack pointer */
1485 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1486 }
1487
1488 /* Set the S and M flags. Don't touch the stack pointer. */
m68ki_set_sm_flag_nosp(uint value)1489 INLINE void m68ki_set_sm_flag_nosp(uint value)
1490 {
1491 /* Set the S and M flags */
1492 FLAG_S = value & SFLAG_SET;
1493 FLAG_M = value & MFLAG_SET;
1494 }
1495
1496
1497 /* Set the condition code register */
m68ki_set_ccr(uint value)1498 INLINE void m68ki_set_ccr(uint value)
1499 {
1500 FLAG_X = BIT_4(value) << 4;
1501 FLAG_N = BIT_3(value) << 4;
1502 FLAG_Z = !BIT_2(value);
1503 FLAG_V = BIT_1(value) << 6;
1504 FLAG_C = BIT_0(value) << 8;
1505 }
1506
1507 /* Set the status register but don't check for interrupts */
m68ki_set_sr_noint(uint value)1508 INLINE void m68ki_set_sr_noint(uint value)
1509 {
1510 /* Mask out the "unimplemented" bits */
1511 value &= CPU_SR_MASK;
1512
1513 /* Now set the status register */
1514 FLAG_T1 = BIT_F(value);
1515 FLAG_T0 = BIT_E(value);
1516 FLAG_INT_MASK = value & 0x0700;
1517 m68ki_set_ccr(value);
1518 m68ki_set_sm_flag((value >> 11) & 6);
1519 }
1520
1521 /* Set the status register but don't check for interrupts nor
1522 * change the stack pointer
1523 */
m68ki_set_sr_noint_nosp(uint value)1524 INLINE void m68ki_set_sr_noint_nosp(uint value)
1525 {
1526 /* Mask out the "unimplemented" bits */
1527 value &= CPU_SR_MASK;
1528
1529 /* Now set the status register */
1530 FLAG_T1 = BIT_F(value);
1531 FLAG_T0 = BIT_E(value);
1532 FLAG_INT_MASK = value & 0x0700;
1533 m68ki_set_ccr(value);
1534 m68ki_set_sm_flag_nosp((value >> 11) & 6);
1535 }
1536
1537 /* Set the status register and check for interrupts */
m68ki_set_sr(uint value)1538 INLINE void m68ki_set_sr(uint value)
1539 {
1540 m68ki_set_sr_noint(value);
1541 if (GET_CYCLES() >= 0) // notaz
1542 m68ki_check_interrupts();
1543 }
1544
1545
1546 /* ------------------------- Exception Processing ------------------------- */
1547
1548 /* Initiate exception processing */
m68ki_init_exception(void)1549 INLINE uint m68ki_init_exception(void)
1550 {
1551 /* Save the old status register */
1552 uint sr = m68ki_get_sr();
1553
1554 /* Turn off trace flag, clear pending traces */
1555 FLAG_T1 = FLAG_T0 = 0;
1556 m68ki_clear_trace();
1557 /* Enter supervisor mode */
1558 m68ki_set_s_flag(SFLAG_SET);
1559
1560 return sr;
1561 }
1562
1563 /* 3 word stack frame (68000 only) */
m68ki_stack_frame_3word(uint pc,uint sr)1564 INLINE void m68ki_stack_frame_3word(uint pc, uint sr)
1565 {
1566 m68ki_push_32(pc);
1567 m68ki_push_16(sr);
1568 }
1569
1570 /* Format 0 stack frame.
1571 * This is the standard stack frame for 68010+.
1572 */
m68ki_stack_frame_0000(uint pc,uint sr,uint vector)1573 INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector)
1574 {
1575 /* Stack a 3-word frame if we are 68000 */
1576 if(CPU_TYPE == CPU_TYPE_000 || CPU_TYPE == CPU_TYPE_008)
1577 {
1578 m68ki_stack_frame_3word(pc, sr);
1579 return;
1580 }
1581 m68ki_push_16(vector<<2);
1582 m68ki_push_32(pc);
1583 m68ki_push_16(sr);
1584 }
1585
1586 /* Format 1 stack frame (68020).
1587 * For 68020, this is the 4 word throwaway frame.
1588 */
m68ki_stack_frame_0001(uint pc,uint sr,uint vector)1589 INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector)
1590 {
1591 m68ki_push_16(0x1000 | (vector<<2));
1592 m68ki_push_32(pc);
1593 m68ki_push_16(sr);
1594 }
1595
1596 /* Format 2 stack frame.
1597 * This is used only by 68020 for trap exceptions.
1598 */
m68ki_stack_frame_0010(uint sr,uint vector)1599 INLINE void m68ki_stack_frame_0010(uint sr, uint vector)
1600 {
1601 m68ki_push_32(REG_PPC);
1602 m68ki_push_16(0x2000 | (vector<<2));
1603 m68ki_push_32(REG_PC);
1604 m68ki_push_16(sr);
1605 }
1606
1607
1608 /* Bus error stack frame (68000 only).
1609 */
m68ki_stack_frame_buserr(uint sr)1610 INLINE void m68ki_stack_frame_buserr(uint sr)
1611 {
1612 m68ki_push_32(REG_PC);
1613 m68ki_push_16(sr);
1614 m68ki_push_16(REG_IR);
1615 m68ki_push_32(m68ki_aerr_address); /* access address */
1616 /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
1617 * R/W 0 = write, 1 = read
1618 * I/N 0 = instruction, 1 = not
1619 * FC 3-bit function code
1620 */
1621 m68ki_push_16(m68ki_aerr_write_mode | CPU_INSTR_MODE | m68ki_aerr_fc);
1622 }
1623
1624 /* Format 8 stack frame (68010).
1625 * 68010 only. This is the 29 word bus/address error frame.
1626 */
m68ki_stack_frame_1000(uint pc,uint sr,uint vector)1627 INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector)
1628 {
1629 /* VERSION
1630 * NUMBER
1631 * INTERNAL INFORMATION, 16 WORDS
1632 */
1633 m68ki_fake_push_32();
1634 m68ki_fake_push_32();
1635 m68ki_fake_push_32();
1636 m68ki_fake_push_32();
1637 m68ki_fake_push_32();
1638 m68ki_fake_push_32();
1639 m68ki_fake_push_32();
1640 m68ki_fake_push_32();
1641
1642 /* INSTRUCTION INPUT BUFFER */
1643 m68ki_push_16(0);
1644
1645 /* UNUSED, RESERVED (not written) */
1646 m68ki_fake_push_16();
1647
1648 /* DATA INPUT BUFFER */
1649 m68ki_push_16(0);
1650
1651 /* UNUSED, RESERVED (not written) */
1652 m68ki_fake_push_16();
1653
1654 /* DATA OUTPUT BUFFER */
1655 m68ki_push_16(0);
1656
1657 /* UNUSED, RESERVED (not written) */
1658 m68ki_fake_push_16();
1659
1660 /* FAULT ADDRESS */
1661 m68ki_push_32(0);
1662
1663 /* SPECIAL STATUS WORD */
1664 m68ki_push_16(0);
1665
1666 /* 1000, VECTOR OFFSET */
1667 m68ki_push_16(0x8000 | (vector<<2));
1668
1669 /* PROGRAM COUNTER */
1670 m68ki_push_32(pc);
1671
1672 /* STATUS REGISTER */
1673 m68ki_push_16(sr);
1674 }
1675
1676 /* Format A stack frame (short bus fault).
1677 * This is used only by 68020 for bus fault and address error
1678 * if the error happens at an instruction boundary.
1679 * PC stacked is address of next instruction.
1680 */
m68ki_stack_frame_1010(uint sr,uint vector,uint pc)1681 INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc)
1682 {
1683 /* INTERNAL REGISTER */
1684 m68ki_push_16(0);
1685
1686 /* INTERNAL REGISTER */
1687 m68ki_push_16(0);
1688
1689 /* DATA OUTPUT BUFFER (2 words) */
1690 m68ki_push_32(0);
1691
1692 /* INTERNAL REGISTER */
1693 m68ki_push_16(0);
1694
1695 /* INTERNAL REGISTER */
1696 m68ki_push_16(0);
1697
1698 /* DATA CYCLE FAULT ADDRESS (2 words) */
1699 m68ki_push_32(0);
1700
1701 /* INSTRUCTION PIPE STAGE B */
1702 m68ki_push_16(0);
1703
1704 /* INSTRUCTION PIPE STAGE C */
1705 m68ki_push_16(0);
1706
1707 /* SPECIAL STATUS REGISTER */
1708 m68ki_push_16(0);
1709
1710 /* INTERNAL REGISTER */
1711 m68ki_push_16(0);
1712
1713 /* 1010, VECTOR OFFSET */
1714 m68ki_push_16(0xa000 | (vector<<2));
1715
1716 /* PROGRAM COUNTER */
1717 m68ki_push_32(pc);
1718
1719 /* STATUS REGISTER */
1720 m68ki_push_16(sr);
1721 }
1722
1723 /* Format B stack frame (long bus fault).
1724 * This is used only by 68020 for bus fault and address error
1725 * if the error happens during instruction execution.
1726 * PC stacked is address of instruction in progress.
1727 */
m68ki_stack_frame_1011(uint sr,uint vector,uint pc)1728 INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc)
1729 {
1730 /* INTERNAL REGISTERS (18 words) */
1731 m68ki_push_32(0);
1732 m68ki_push_32(0);
1733 m68ki_push_32(0);
1734 m68ki_push_32(0);
1735 m68ki_push_32(0);
1736 m68ki_push_32(0);
1737 m68ki_push_32(0);
1738 m68ki_push_32(0);
1739 m68ki_push_32(0);
1740
1741 /* VERSION# (4 bits), INTERNAL INFORMATION */
1742 m68ki_push_16(0);
1743
1744 /* INTERNAL REGISTERS (3 words) */
1745 m68ki_push_32(0);
1746 m68ki_push_16(0);
1747
1748 /* DATA INTPUT BUFFER (2 words) */
1749 m68ki_push_32(0);
1750
1751 /* INTERNAL REGISTERS (2 words) */
1752 m68ki_push_32(0);
1753
1754 /* STAGE B ADDRESS (2 words) */
1755 m68ki_push_32(0);
1756
1757 /* INTERNAL REGISTER (4 words) */
1758 m68ki_push_32(0);
1759 m68ki_push_32(0);
1760
1761 /* DATA OUTPUT BUFFER (2 words) */
1762 m68ki_push_32(0);
1763
1764 /* INTERNAL REGISTER */
1765 m68ki_push_16(0);
1766
1767 /* INTERNAL REGISTER */
1768 m68ki_push_16(0);
1769
1770 /* DATA CYCLE FAULT ADDRESS (2 words) */
1771 m68ki_push_32(0);
1772
1773 /* INSTRUCTION PIPE STAGE B */
1774 m68ki_push_16(0);
1775
1776 /* INSTRUCTION PIPE STAGE C */
1777 m68ki_push_16(0);
1778
1779 /* SPECIAL STATUS REGISTER */
1780 m68ki_push_16(0);
1781
1782 /* INTERNAL REGISTER */
1783 m68ki_push_16(0);
1784
1785 /* 1011, VECTOR OFFSET */
1786 m68ki_push_16(0xb000 | (vector<<2));
1787
1788 /* PROGRAM COUNTER */
1789 m68ki_push_32(pc);
1790
1791 /* STATUS REGISTER */
1792 m68ki_push_16(sr);
1793 }
1794
1795
1796 /* Used for Group 2 exceptions.
1797 * These stack a type 2 frame on the 020.
1798 */
m68ki_exception_trap(uint vector)1799 INLINE void m68ki_exception_trap(uint vector)
1800 {
1801 uint sr = m68ki_init_exception();
1802
1803 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1804 m68ki_stack_frame_0000(REG_PC, sr, vector);
1805 else
1806 m68ki_stack_frame_0010(sr, vector);
1807
1808 m68ki_jump_vector(vector);
1809
1810 /* Use up some clock cycles */
1811 USE_CYCLES(CYC_EXCEPTION[vector]);
1812 }
1813
1814 /* Trap#n stacks a 0 frame but behaves like group2 otherwise */
m68ki_exception_trapN(uint vector)1815 INLINE void m68ki_exception_trapN(uint vector)
1816 {
1817 uint sr = m68ki_init_exception();
1818 m68ki_stack_frame_0000(REG_PC, sr, vector);
1819 m68ki_jump_vector(vector);
1820
1821 /* Use up some clock cycles */
1822 USE_CYCLES(CYC_EXCEPTION[vector]);
1823 }
1824
1825 /* Exception for trace mode */
m68ki_exception_trace(void)1826 INLINE void m68ki_exception_trace(void)
1827 {
1828 uint sr = m68ki_init_exception();
1829
1830 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1831 {
1832 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1833 if(CPU_TYPE_IS_000(CPU_TYPE))
1834 {
1835 CPU_INSTR_MODE = INSTRUCTION_NO;
1836 }
1837 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1838 m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_TRACE);
1839 }
1840 else
1841 m68ki_stack_frame_0010(sr, EXCEPTION_TRACE);
1842
1843 m68ki_jump_vector(EXCEPTION_TRACE);
1844
1845 /* Trace nullifies a STOP instruction */
1846 CPU_STOPPED &= ~STOP_LEVEL_STOP;
1847
1848 /* Use up some clock cycles */
1849 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]);
1850 }
1851
1852 /* Exception for privilege violation */
m68ki_exception_privilege_violation(void)1853 INLINE void m68ki_exception_privilege_violation(void)
1854 {
1855 uint sr = m68ki_init_exception();
1856
1857 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1858 if(CPU_TYPE_IS_000(CPU_TYPE))
1859 {
1860 CPU_INSTR_MODE = INSTRUCTION_NO;
1861 }
1862 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1863
1864 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_PRIVILEGE_VIOLATION);
1865 m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION);
1866
1867 /* Use up some clock cycles and undo the instruction's cycles */
1868 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]);
1869 }
1870
1871 /* Exception for A-Line instructions */
m68ki_exception_1010(void)1872 INLINE void m68ki_exception_1010(void)
1873 {
1874 uint sr;
1875 #if M68K_LOG_1010_1111 == OPT_ON
1876 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n",
1877 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
1878 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
1879 #endif
1880
1881 sr = m68ki_init_exception();
1882 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1010);
1883 m68ki_jump_vector(EXCEPTION_1010);
1884
1885 /* Use up some clock cycles and undo the instruction's cycles */
1886 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]);
1887 }
1888
1889 /* Exception for F-Line instructions */
m68ki_exception_1111(void)1890 INLINE void m68ki_exception_1111(void)
1891 {
1892 uint sr;
1893
1894 #if M68K_LOG_1010_1111 == OPT_ON
1895 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n",
1896 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
1897 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
1898 #endif
1899
1900 sr = m68ki_init_exception();
1901 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1111);
1902 m68ki_jump_vector(EXCEPTION_1111);
1903
1904 /* Use up some clock cycles and undo the instruction's cycles */
1905 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]);
1906 }
1907
1908 /* Exception for illegal instructions */
m68ki_exception_illegal(void)1909 INLINE void m68ki_exception_illegal(void)
1910 {
1911 uint sr;
1912
1913 M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n",
1914 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
1915 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
1916
1917 sr = m68ki_init_exception();
1918
1919 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1920 if(CPU_TYPE_IS_000(CPU_TYPE))
1921 {
1922 CPU_INSTR_MODE = INSTRUCTION_NO;
1923 }
1924 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1925
1926 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_ILLEGAL_INSTRUCTION);
1927 m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION);
1928
1929 /* Use up some clock cycles and undo the instruction's cycles */
1930 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]);
1931 }
1932
1933 /* Exception for format errror in RTE */
m68ki_exception_format_error(void)1934 INLINE void m68ki_exception_format_error(void)
1935 {
1936 uint sr = m68ki_init_exception();
1937 m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_FORMAT_ERROR);
1938 m68ki_jump_vector(EXCEPTION_FORMAT_ERROR);
1939
1940 /* Use up some clock cycles and undo the instruction's cycles */
1941 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]);
1942 }
1943
1944 /* Exception for address error */
m68ki_exception_address_error(void)1945 INLINE void m68ki_exception_address_error(void)
1946 {
1947 uint sr = m68ki_init_exception();
1948
1949 /* If we were processing a bus error, address error, or reset,
1950 * this is a catastrophic failure.
1951 * Halt the CPU
1952 */
1953 if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET)
1954 {
1955 m68k_read_memory_8(0x00ffff01);
1956 CPU_STOPPED = STOP_LEVEL_HALT;
1957 return;
1958 }
1959 CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
1960
1961 /* Note: This is implemented for 68000 only! */
1962 m68ki_stack_frame_buserr(sr);
1963
1964 m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR);
1965
1966 /* Use up some clock cycles and undo the instruction's cycles */
1967 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR] - CYC_INSTRUCTION[REG_IR]);
1968 }
1969
1970
1971 /* Service an interrupt request and start exception processing */
m68ki_exception_interrupt(uint int_level)1972 INLINE void m68ki_exception_interrupt(uint int_level)
1973 {
1974 uint vector;
1975 uint sr;
1976 uint new_pc;
1977
1978 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1979 if(CPU_TYPE_IS_000(CPU_TYPE))
1980 {
1981 CPU_INSTR_MODE = INSTRUCTION_NO;
1982 }
1983 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1984
1985 /* Turn off the stopped state */
1986 CPU_STOPPED &= ~STOP_LEVEL_STOP;
1987
1988 /* If we are halted, don't do anything */
1989 if(CPU_STOPPED)
1990 return;
1991
1992 /* Acknowledge the interrupt */
1993 vector = m68ki_int_ack(int_level);
1994
1995 /* Get the interrupt vector */
1996 if(vector == M68K_INT_ACK_AUTOVECTOR)
1997 /* Use the autovectors. This is the most commonly used implementation */
1998 vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
1999 else if(vector == M68K_INT_ACK_SPURIOUS)
2000 /* Called if no devices respond to the interrupt acknowledge */
2001 vector = EXCEPTION_SPURIOUS_INTERRUPT;
2002 else if(vector > 255)
2003 {
2004 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
2005 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
2006 return;
2007 }
2008
2009 /* Start exception processing */
2010 sr = m68ki_init_exception();
2011
2012 /* Set the interrupt mask to the level of the one being serviced */
2013 FLAG_INT_MASK = int_level<<8;
2014
2015 /* Get the new PC */
2016 new_pc = m68ki_read_data_32((vector<<2) + REG_VBR);
2017 //new_pc = m68k_read_immediate_32((vector<<2) + REG_VBR); // notaz hack
2018
2019 /* If vector is uninitialized, call the uninitialized interrupt vector */
2020 if(new_pc == 0)
2021 new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR);
2022
2023 /* Generate a stack frame */
2024 m68ki_stack_frame_0000(REG_PC, sr, vector);
2025 if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
2026 {
2027 /* Create throwaway frame */
2028 m68ki_set_sm_flag(FLAG_S); /* clear M */
2029 sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
2030 m68ki_stack_frame_0001(REG_PC, sr, vector);
2031 }
2032
2033 m68ki_jump(new_pc);
2034
2035 /* Defer cycle counting until later */
2036 CPU_INT_CYCLES += CYC_EXCEPTION[vector];
2037
2038 #if !M68K_EMULATE_INT_ACK
2039 /* Automatically clear IRQ if we are not using an acknowledge scheme */
2040 CPU_INT_LEVEL = 0;
2041 #endif /* M68K_EMULATE_INT_ACK */
2042 }
2043
2044
2045 /* ASG: Check for interrupts */
m68ki_check_interrupts(void)2046 INLINE void m68ki_check_interrupts(void)
2047 {
2048 if(CPU_INT_LEVEL > FLAG_INT_MASK)
2049 m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
2050 }
2051
2052
2053
2054 /* ======================================================================== */
2055 /* ============================== END OF FILE ============================= */
2056 /* ======================================================================== */
2057
2058 #endif /* M68KCPU__HEADER */
2059