1
2 // AM1 Functions (for ReadAM)
3 // **************************
4
am1Register(void)5 static UINT32 am1Register(void)
6 {
7 switch (modDim)
8 {
9 case 0:
10 amOut=(UINT8)v60.reg[modVal&0x1F];
11 break;
12 case 1:
13 amOut=(UINT16)v60.reg[modVal&0x1F];
14 break;
15 case 2:
16 amOut=v60.reg[modVal&0x1F];
17 break;
18 }
19
20 return 1;
21 }
22
am1RegisterIndirect(void)23 static UINT32 am1RegisterIndirect(void)
24 {
25 switch (modDim)
26 {
27 case 0:
28 amOut=MemRead8(v60.reg[modVal&0x1F]);
29 break;
30 case 1:
31 amOut=MemRead16(v60.reg[modVal&0x1F]);
32 break;
33 case 2:
34 amOut=MemRead32(v60.reg[modVal&0x1F]);
35 break;
36 }
37
38 return 1;
39 }
40
bam1RegisterIndirect(void)41 static UINT32 bam1RegisterIndirect(void)
42 {
43 bamOffset=0;
44 amOut=MemRead32(v60.reg[modVal&0x1F]);
45 return 1;
46 }
47
am1RegisterIndirectIndexed(void)48 static UINT32 am1RegisterIndirectIndexed(void)
49 {
50 switch (modDim)
51 {
52 case 0:
53 amOut=MemRead8(v60.reg[modVal2&0x1F]+v60.reg[modVal&0x1F]);
54 break;
55 case 1:
56 amOut=MemRead16(v60.reg[modVal2&0x1F]+v60.reg[modVal&0x1F]*2);
57 break;
58 case 2:
59 amOut=MemRead32(v60.reg[modVal2&0x1F]+v60.reg[modVal&0x1F]*4);
60 break;
61 }
62
63 return 2;
64 }
65
bam1RegisterIndirectIndexed(void)66 static UINT32 bam1RegisterIndirectIndexed(void)
67 {
68 bamOffset=v60.reg[modVal&0x1F];
69 amOut=MemRead32(v60.reg[modVal2&0x1F]+bamOffset/8);
70 bamOffset&=7;
71 return 2;
72 }
73
am1Autoincrement(void)74 static UINT32 am1Autoincrement(void)
75 {
76 switch (modDim)
77 {
78 case 0:
79 amOut=MemRead8(v60.reg[modVal&0x1F]);
80 v60.reg[modVal&0x1F]++;
81 break;
82 case 1:
83 amOut=MemRead16(v60.reg[modVal&0x1F]);
84 v60.reg[modVal&0x1F]+=2;
85 break;
86 case 2:
87 amOut=MemRead32(v60.reg[modVal&0x1F]);
88 v60.reg[modVal&0x1F]+=4;
89 break;
90 }
91
92 return 1;
93 }
94
bam1Autoincrement(void)95 static UINT32 bam1Autoincrement(void)
96 {
97 bamOffset=0;
98 amOut=MemRead32(v60.reg[modVal&0x1F]);
99 switch (modDim)
100 {
101 case 10:
102 v60.reg[modVal&0x1F]+=1;
103 break;
104 case 11:
105 v60.reg[modVal&0x1F]+=4;
106 break;
107 default:
108 // fatalerror("CPU - BAM1 - 7");
109 break;
110 }
111 return 1;
112 }
113
am1Autodecrement(void)114 static UINT32 am1Autodecrement(void)
115 {
116 switch (modDim)
117 {
118 case 0:
119 v60.reg[modVal&0x1F]--;
120 amOut=MemRead8(v60.reg[modVal&0x1F]);
121 break;
122 case 1:
123 v60.reg[modVal&0x1F]-=2;
124 amOut=MemRead16(v60.reg[modVal&0x1F]);
125 break;
126 case 2:
127 v60.reg[modVal&0x1F]-=4;
128 amOut=MemRead32(v60.reg[modVal&0x1F]);
129 break;
130 }
131
132 return 1;
133 }
134
bam1Autodecrement(void)135 static UINT32 bam1Autodecrement(void)
136 {
137 bamOffset=0;
138 switch (modDim)
139 {
140 case 10:
141 v60.reg[modVal&0x1F]-=1;
142 break;
143 case 11:
144 v60.reg[modVal&0x1F]-=4;
145 break;
146 default:
147 // fatalerror("CPU - BAM1 - 7");
148 break;
149 }
150 amOut=MemRead32(v60.reg[modVal&0x1F]);
151 return 1;
152 }
153
am1Displacement8(void)154 static UINT32 am1Displacement8(void)
155 {
156 switch (modDim)
157 {
158 case 0:
159 amOut=MemRead8(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1));
160 break;
161 case 1:
162 amOut=MemRead16(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1));
163 break;
164 case 2:
165 amOut=MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1));
166 break;
167 }
168
169 return 2;
170 }
171
bam1Displacement8(void)172 static UINT32 bam1Displacement8(void)
173 {
174 bamOffset=MemRead8(modAdd+1);
175 amOut=MemRead32(v60.reg[modVal&0x1F]+bamOffset/8);
176 bamOffset&=7;
177 return 2;
178 }
179
180
am1Displacement16(void)181 static UINT32 am1Displacement16(void)
182 {
183 switch (modDim)
184 {
185 case 0:
186 amOut=MemRead8(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1));
187 break;
188 case 1:
189 amOut=MemRead16(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1));
190 break;
191 case 2:
192 amOut=MemRead32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1));
193 break;
194 }
195
196 return 3;
197 }
198
bam1Displacement16(void)199 static UINT32 bam1Displacement16(void)
200 {
201 bamOffset=OpRead16(modAdd+1);
202 amOut=MemRead32(v60.reg[modVal&0x1F]+bamOffset/8);
203 bamOffset&=7;
204 return 3;
205 }
206
am1Displacement32(void)207 static UINT32 am1Displacement32(void)
208 {
209 switch (modDim)
210 {
211 case 0:
212 amOut=MemRead8(v60.reg[modVal&0x1F] + OpRead32(modAdd+1));
213 break;
214 case 1:
215 amOut=MemRead16(v60.reg[modVal&0x1F] + OpRead32(modAdd+1));
216 break;
217 case 2:
218 amOut=MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1));
219 break;
220 }
221
222 return 5;
223 }
224
bam1Displacement32(void)225 static UINT32 bam1Displacement32(void)
226 {
227 bamOffset=OpRead32(modAdd+1);
228 amOut=MemRead32(v60.reg[modVal&0x1F]+bamOffset/8);
229 bamOffset&=7;
230 return 5;
231 }
232
am1DisplacementIndexed8(void)233 static UINT32 am1DisplacementIndexed8(void)
234 {
235 switch (modDim)
236 {
237 case 0:
238 amOut=MemRead8(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F]);
239 break;
240 case 1:
241 amOut=MemRead16(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F]*2);
242 break;
243 case 2:
244 amOut=MemRead32(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F]*4);
245 break;
246 }
247
248 return 3;
249 }
250
bam1DisplacementIndexed8(void)251 static UINT32 bam1DisplacementIndexed8(void)
252 {
253 bamOffset=v60.reg[modVal&0x1F];
254 amOut=MemRead32(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2)+bamOffset/8);
255 bamOffset&=7;
256 return 3;
257 }
258
am1DisplacementIndexed16(void)259 static UINT32 am1DisplacementIndexed16(void)
260 {
261 switch (modDim)
262 {
263 case 0:
264 amOut=MemRead8(v60.reg[modVal2&0x1F] + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F]);
265 break;
266 case 1:
267 amOut=MemRead16(v60.reg[modVal2&0x1F] + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F]*2);
268 break;
269 case 2:
270 amOut=MemRead32(v60.reg[modVal2&0x1F] + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F]*4);
271 break;
272 }
273
274 return 4;
275 }
276
bam1DisplacementIndexed16(void)277 static UINT32 bam1DisplacementIndexed16(void)
278 {
279 bamOffset=v60.reg[modVal&0x1F];
280 amOut=MemRead32(v60.reg[modVal2&0x1F] + (INT16)OpRead16(modAdd+2)+bamOffset/8);
281 bamOffset&=7;
282 return 4;
283 }
284
am1DisplacementIndexed32(void)285 static UINT32 am1DisplacementIndexed32(void)
286 {
287 switch (modDim)
288 {
289 case 0:
290 amOut=MemRead8(v60.reg[modVal2&0x1F] + OpRead32(modAdd+2) + v60.reg[modVal&0x1F]);
291 break;
292 case 1:
293 amOut=MemRead16(v60.reg[modVal2&0x1F] + OpRead32(modAdd+2) + v60.reg[modVal&0x1F]*2);
294 break;
295 case 2:
296 amOut=MemRead32(v60.reg[modVal2&0x1F] + OpRead32(modAdd+2) + v60.reg[modVal&0x1F]*4);
297 break;
298 }
299
300 return 6;
301 }
302
bam1DisplacementIndexed32(void)303 static UINT32 bam1DisplacementIndexed32(void)
304 {
305 bamOffset=v60.reg[modVal&0x1F];
306 amOut=MemRead32(v60.reg[modVal2&0x1F] + OpRead32(modAdd+2)+bamOffset/8);
307 bamOffset&=7;
308 return 6;
309 }
310
311
am1PCDisplacement8(void)312 static UINT32 am1PCDisplacement8(void)
313 {
314 switch (modDim)
315 {
316 case 0:
317 amOut=MemRead8(PC + (INT8)OpRead8(modAdd+1));
318 break;
319 case 1:
320 amOut=MemRead16(PC + (INT8)OpRead8(modAdd+1));
321 break;
322 case 2:
323 amOut=MemRead32(PC + (INT8)OpRead8(modAdd+1));
324 break;
325 }
326
327 return 2;
328 }
329
bam1PCDisplacement8(void)330 static UINT32 bam1PCDisplacement8(void)
331 {
332 bamOffset=OpRead8(modAdd+1);
333 amOut=MemRead32(PC+bamOffset/8);
334 bamOffset&=7;
335 return 2;
336 }
337
am1PCDisplacement16(void)338 static UINT32 am1PCDisplacement16(void)
339 {
340 switch (modDim)
341 {
342 case 0:
343 amOut=MemRead8(PC + (INT16)OpRead16(modAdd+1));
344 break;
345 case 1:
346 amOut=MemRead16(PC + (INT16)OpRead16(modAdd+1));
347 break;
348 case 2:
349 amOut=MemRead32(PC + (INT16)OpRead16(modAdd+1));
350 break;
351 }
352
353 return 3;
354 }
355
bam1PCDisplacement16(void)356 static UINT32 bam1PCDisplacement16(void)
357 {
358 bamOffset=OpRead16(modAdd+1);
359 amOut=MemRead32(PC+bamOffset/8);
360 bamOffset&=7;
361 return 3;
362 }
363
am1PCDisplacement32(void)364 static UINT32 am1PCDisplacement32(void)
365 {
366 switch (modDim)
367 {
368 case 0:
369 amOut=MemRead8(PC + OpRead32(modAdd+1));
370 break;
371 case 1:
372 amOut=MemRead16(PC + OpRead32(modAdd+1));
373 break;
374 case 2:
375 amOut=MemRead32(PC + OpRead32(modAdd+1));
376 break;
377 }
378
379 return 5;
380 }
381
bam1PCDisplacement32(void)382 static UINT32 bam1PCDisplacement32(void)
383 {
384 bamOffset=OpRead32(modAdd+1);
385 amOut=MemRead32(PC+bamOffset/8);
386 bamOffset&=7;
387 return 5;
388 }
389
am1PCDisplacementIndexed8(void)390 static UINT32 am1PCDisplacementIndexed8(void)
391 {
392 switch (modDim)
393 {
394 case 0:
395 amOut=MemRead8(PC + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F]);
396 break;
397 case 1:
398 amOut=MemRead16(PC + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F]*2);
399 break;
400 case 2:
401 amOut=MemRead32(PC + (INT8)OpRead8(modAdd+2) + v60.reg[modVal&0x1F]*4);
402 break;
403 }
404
405 return 3;
406 }
407
bam1PCDisplacementIndexed8(void)408 static UINT32 bam1PCDisplacementIndexed8(void)
409 {
410 bamOffset=v60.reg[modVal&0x1F];
411 amOut=MemRead32(PC + (INT8)OpRead8(modAdd+2)+bamOffset/8);
412 bamOffset&=7;
413 return 3;
414 }
415
416
am1PCDisplacementIndexed16(void)417 static UINT32 am1PCDisplacementIndexed16(void)
418 {
419 switch (modDim)
420 {
421 case 0:
422 amOut=MemRead8(PC + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F]);
423 break;
424 case 1:
425 amOut=MemRead16(PC + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F]*2);
426 break;
427 case 2:
428 amOut=MemRead32(PC + (INT16)OpRead16(modAdd+2) + v60.reg[modVal&0x1F]*4);
429 break;
430 }
431
432 return 4;
433 }
434
bam1PCDisplacementIndexed16(void)435 static UINT32 bam1PCDisplacementIndexed16(void)
436 {
437 bamOffset=v60.reg[modVal&0x1F];
438 amOut=MemRead32(PC + (INT16)OpRead16(modAdd+2)+bamOffset/8);
439 bamOffset&=7;
440 return 4;
441 }
442
am1PCDisplacementIndexed32(void)443 static UINT32 am1PCDisplacementIndexed32(void)
444 {
445 switch (modDim)
446 {
447 case 0:
448 amOut=MemRead8(PC + OpRead32(modAdd+2) + v60.reg[modVal&0x1F]);
449 break;
450 case 1:
451 amOut=MemRead16(PC + OpRead32(modAdd+2) + v60.reg[modVal&0x1F]*2);
452 break;
453 case 2:
454 amOut=MemRead32(PC + OpRead32(modAdd+2) + v60.reg[modVal&0x1F]*4);
455 break;
456 }
457
458 return 6;
459 }
460
bam1PCDisplacementIndexed32(void)461 static UINT32 bam1PCDisplacementIndexed32(void)
462 {
463 bamOffset=v60.reg[modVal&0x1F];
464 amOut=MemRead32(PC + OpRead32(modAdd+2)+bamOffset/8);
465 bamOffset&=7;
466 return 6;
467 }
468
am1DisplacementIndirect8(void)469 static UINT32 am1DisplacementIndirect8(void)
470 {
471 switch (modDim)
472 {
473 case 0:
474 amOut=MemRead8(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)));
475 break;
476 case 1:
477 amOut=MemRead16(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)));
478 break;
479 case 2:
480 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)));
481 break;
482 }
483
484 return 2;
485 }
486
bam1DisplacementIndirect8(void)487 static UINT32 bam1DisplacementIndirect8(void)
488 {
489 bamOffset=0;
490 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)));
491 return 2;
492 }
493
am1DisplacementIndirect16(void)494 static UINT32 am1DisplacementIndirect16(void)
495 {
496 switch (modDim)
497 {
498 case 0:
499 amOut=MemRead8(MemRead32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1)));
500 break;
501 case 1:
502 amOut=MemRead16(MemRead32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1)));
503 break;
504 case 2:
505 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1)));
506 break;
507 }
508
509 return 3;
510 }
511
bam1DisplacementIndirect16(void)512 static UINT32 bam1DisplacementIndirect16(void)
513 {
514 bamOffset=0;
515 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1)));
516 return 3;
517 }
518
am1DisplacementIndirect32(void)519 static UINT32 am1DisplacementIndirect32(void)
520 {
521 switch (modDim)
522 {
523 case 0:
524 amOut=MemRead8(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)));
525 break;
526 case 1:
527 amOut=MemRead16(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)));
528 break;
529 case 2:
530 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)));
531 break;
532 }
533
534 return 5;
535 }
536
bam1DisplacementIndirect32(void)537 static UINT32 bam1DisplacementIndirect32(void)
538 {
539 bamOffset=0;
540 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)));
541 return 5;
542 }
543
am1DisplacementIndirectIndexed8(void)544 static UINT32 am1DisplacementIndirectIndexed8(void)
545 {
546 switch (modDim)
547 {
548 case 0:
549 amOut=MemRead8(MemRead32(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2)) + v60.reg[modVal&0x1F]);
550 break;
551 case 1:
552 amOut=MemRead16(MemRead32(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2)) + v60.reg[modVal&0x1F]*2);
553 break;
554 case 2:
555 amOut=MemRead32(MemRead32(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2)) + v60.reg[modVal&0x1F]*4);
556 break;
557 }
558
559 return 3;
560 }
561
bam1DisplacementIndirectIndexed8(void)562 static UINT32 bam1DisplacementIndirectIndexed8(void)
563 {
564 bamOffset=v60.reg[modVal&0x1F];
565 amOut=MemRead32(MemRead32(v60.reg[modVal2&0x1F] + (INT8)OpRead8(modAdd+2))+bamOffset/8);
566 bamOffset&=7;
567 return 3;
568 }
569
am1DisplacementIndirectIndexed16(void)570 static UINT32 am1DisplacementIndirectIndexed16(void)
571 {
572 switch (modDim)
573 {
574 case 0:
575 amOut=MemRead8(MemRead32(v60.reg[modVal2&0x1F] + (INT16)OpRead16(modAdd+2)) + v60.reg[modVal&0x1F]);
576 break;
577 case 1:
578 amOut=MemRead16(MemRead32(v60.reg[modVal2&0x1F] + (INT16)OpRead16(modAdd+2)) + v60.reg[modVal&0x1F]*2);
579 break;
580 case 2:
581 amOut=MemRead32(MemRead32(v60.reg[modVal2&0x1F] + (INT16)OpRead16(modAdd+2)) + v60.reg[modVal&0x1F]*4);
582 break;
583 }
584
585 return 4;
586 }
587
bam1DisplacementIndirectIndexed16(void)588 static UINT32 bam1DisplacementIndirectIndexed16(void)
589 {
590 bamOffset=v60.reg[modVal&0x1F];
591 amOut=MemRead32(MemRead32(v60.reg[modVal2&0x1F] + (INT16)OpRead16(modAdd+2))+bamOffset/8);
592 bamOffset&=7;
593 return 4;
594 }
595
am1DisplacementIndirectIndexed32(void)596 static UINT32 am1DisplacementIndirectIndexed32(void)
597 {
598 switch (modDim)
599 {
600 case 0:
601 amOut=MemRead8(MemRead32(v60.reg[modVal2&0x1F] + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F]);
602 break;
603 case 1:
604 amOut=MemRead16(MemRead32(v60.reg[modVal2&0x1F] + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F]*2);
605 break;
606 case 2:
607 amOut=MemRead32(MemRead32(v60.reg[modVal2&0x1F] + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F]*4);
608 break;
609 }
610
611 return 6;
612 }
613
bam1DisplacementIndirectIndexed32(void)614 static UINT32 bam1DisplacementIndirectIndexed32(void)
615 {
616 bamOffset=v60.reg[modVal&0x1F];
617 amOut=MemRead32(MemRead32(v60.reg[modVal2&0x1F] + OpRead32(modAdd+2))+bamOffset/8);
618 bamOffset&=7;
619 return 6;
620 }
621
am1PCDisplacementIndirect8(void)622 static UINT32 am1PCDisplacementIndirect8(void)
623 {
624 switch (modDim)
625 {
626 case 0:
627 amOut=MemRead8(MemRead32(PC + (INT8)OpRead8(modAdd+1)));
628 break;
629 case 1:
630 amOut=MemRead16(MemRead32(PC + (INT8)OpRead8(modAdd+1)));
631 break;
632 case 2:
633 amOut=MemRead32(MemRead32(PC + (INT8)OpRead8(modAdd+1)));
634 break;
635 }
636
637 return 2;
638 }
639
bam1PCDisplacementIndirect8(void)640 static UINT32 bam1PCDisplacementIndirect8(void)
641 {
642 bamOffset=0;
643 amOut=MemRead32(MemRead32(PC + (INT8)OpRead8(modAdd+1)));
644 return 2;
645 }
646
am1PCDisplacementIndirect16(void)647 static UINT32 am1PCDisplacementIndirect16(void)
648 {
649 switch (modDim)
650 {
651 case 0:
652 amOut=MemRead8(MemRead32(PC + (INT16)OpRead16(modAdd+1)));
653 break;
654 case 1:
655 amOut=MemRead16(MemRead32(PC + (INT16)OpRead16(modAdd+1)));
656 break;
657 case 2:
658 amOut=MemRead32(MemRead32(PC + (INT16)OpRead16(modAdd+1)));
659 break;
660 }
661
662 return 3;
663 }
664
bam1PCDisplacementIndirect16(void)665 static UINT32 bam1PCDisplacementIndirect16(void)
666 {
667 bamOffset=0;
668 amOut=MemRead32(MemRead32(PC + (INT16)OpRead16(modAdd+1)));
669 return 3;
670 }
671
am1PCDisplacementIndirect32(void)672 static UINT32 am1PCDisplacementIndirect32(void)
673 {
674 switch (modDim)
675 {
676 case 0:
677 amOut=MemRead8(MemRead32(PC + OpRead32(modAdd+1)));
678 break;
679 case 1:
680 amOut=MemRead16(MemRead32(PC + OpRead32(modAdd+1)));
681 break;
682 case 2:
683 amOut=MemRead32(MemRead32(PC + OpRead32(modAdd+1)));
684 break;
685 }
686
687 return 5;
688 }
689
bam1PCDisplacementIndirect32(void)690 static UINT32 bam1PCDisplacementIndirect32(void)
691 {
692 bamOffset=0;
693 amOut=MemRead32(MemRead32(PC + OpRead32(modAdd+1)));
694 return 5;
695 }
696
am1PCDisplacementIndirectIndexed8(void)697 static UINT32 am1PCDisplacementIndirectIndexed8(void)
698 {
699 switch (modDim)
700 {
701 case 0:
702 amOut=MemRead8(MemRead32(PC + (INT8)OpRead8(modAdd+2)) + v60.reg[modVal&0x1F]);
703 break;
704 case 1:
705 amOut=MemRead16(MemRead32(PC + (INT8)OpRead8(modAdd+2)) + v60.reg[modVal&0x1F]*2);
706 break;
707 case 2:
708 amOut=MemRead32(MemRead32(PC + (INT8)OpRead8(modAdd+2)) + v60.reg[modVal&0x1F]*4);
709 break;
710 }
711
712 return 3;
713 }
714
bam1PCDisplacementIndirectIndexed8(void)715 static UINT32 bam1PCDisplacementIndirectIndexed8(void)
716 {
717 bamOffset=v60.reg[modVal&0x1F];
718 amOut=MemRead32(MemRead32(PC + (INT8)OpRead8(modAdd+2))+bamOffset/8);
719 bamOffset&=7;
720 return 3;
721 }
722
am1PCDisplacementIndirectIndexed16(void)723 static UINT32 am1PCDisplacementIndirectIndexed16(void)
724 {
725 switch (modDim)
726 {
727 case 0:
728 amOut=MemRead8(MemRead32(PC + (INT16)OpRead16(modAdd+2)) + v60.reg[modVal&0x1F]);
729 break;
730 case 1:
731 amOut=MemRead16(MemRead32(PC + (INT16)OpRead16(modAdd+2)) + v60.reg[modVal&0x1F]*2);
732 break;
733 case 2:
734 amOut=MemRead32(MemRead32(PC + (INT16)OpRead16(modAdd+2)) + v60.reg[modVal&0x1F]*4);
735 break;
736 }
737
738 return 4;
739 }
740
bam1PCDisplacementIndirectIndexed16(void)741 static UINT32 bam1PCDisplacementIndirectIndexed16(void)
742 {
743 bamOffset=v60.reg[modVal&0x1F];
744 amOut=MemRead32(MemRead32(PC + (INT16)OpRead16(modAdd+2))+bamOffset/8);
745 bamOffset&=7;
746 return 4;
747 }
748
am1PCDisplacementIndirectIndexed32(void)749 static UINT32 am1PCDisplacementIndirectIndexed32(void)
750 {
751 switch (modDim)
752 {
753 case 0:
754 amOut=MemRead8(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F]);
755 break;
756 case 1:
757 amOut=MemRead16(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F]*2);
758 break;
759 case 2:
760 amOut=MemRead32(MemRead32(PC + OpRead32(modAdd+2)) + v60.reg[modVal&0x1F]*4);
761 break;
762 }
763
764 return 6;
765 }
766
bam1PCDisplacementIndirectIndexed32(void)767 static UINT32 bam1PCDisplacementIndirectIndexed32(void)
768 {
769 bamOffset=v60.reg[modVal&0x1F];
770 amOut=MemRead32(MemRead32(PC + OpRead32(modAdd+2))+bamOffset/8);
771 bamOffset&=7;
772 return 6;
773 }
774
am1DoubleDisplacement8(void)775 static UINT32 am1DoubleDisplacement8(void)
776 {
777 switch (modDim)
778 {
779 case 0:
780 amOut=MemRead8(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2));
781 break;
782
783 case 1:
784 amOut=MemRead16(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2));
785 break;
786
787 case 2:
788 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2));
789 break;
790 }
791
792 return 3;
793 }
794
bam1DoubleDisplacement8(void)795 static UINT32 bam1DoubleDisplacement8(void)
796 {
797 bamOffset=OpRead8(modAdd+2);
798 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + (INT8)OpRead8(modAdd+1))+bamOffset/8);
799 bamOffset&=7;
800 return 3;
801 }
802
am1DoubleDisplacement16(void)803 static UINT32 am1DoubleDisplacement16(void)
804 {
805 switch (modDim)
806 {
807 case 0:
808 amOut=MemRead8(MemRead32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3));
809 break;
810
811 case 1:
812 amOut=MemRead16(MemRead32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3));
813 break;
814
815 case 2:
816 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3));
817 break;
818 }
819
820 return 5;
821 }
822
bam1DoubleDisplacement16(void)823 static UINT32 bam1DoubleDisplacement16(void)
824 {
825 bamOffset=OpRead16(modAdd+3);
826 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + (INT16)OpRead16(modAdd+1))+bamOffset/8);
827 bamOffset&=7;
828 return 5;
829 }
830
am1DoubleDisplacement32(void)831 static UINT32 am1DoubleDisplacement32(void)
832 {
833 switch (modDim)
834 {
835 case 0:
836 amOut=MemRead8(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)) + OpRead32(modAdd+5));
837 break;
838
839 case 1:
840 amOut=MemRead16(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)) + OpRead32(modAdd+5));
841 break;
842
843 case 2:
844 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1)) + OpRead32(modAdd+5));
845 break;
846 }
847
848 return 9;
849 }
850
bam1DoubleDisplacement32(void)851 static UINT32 bam1DoubleDisplacement32(void)
852 {
853 bamOffset=OpRead32(modAdd+5);
854 amOut=MemRead32(MemRead32(v60.reg[modVal&0x1F] + OpRead32(modAdd+1))+bamOffset/8);
855 bamOffset&=7;
856 return 9;
857 }
858
am1PCDoubleDisplacement8(void)859 static UINT32 am1PCDoubleDisplacement8(void)
860 {
861 switch (modDim)
862 {
863 case 0:
864 amOut=MemRead8(MemRead32(PC + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2));
865 break;
866
867 case 1:
868 amOut=MemRead16(MemRead32(PC + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2));
869 break;
870
871 case 2:
872 amOut=MemRead32(MemRead32(PC + (INT8)OpRead8(modAdd+1)) + (INT8)OpRead8(modAdd+2));
873 break;
874 }
875
876 return 3;
877 }
878
bam1PCDoubleDisplacement8(void)879 static UINT32 bam1PCDoubleDisplacement8(void)
880 {
881 bamOffset=OpRead8(modAdd+2);
882 amOut=MemRead32(MemRead32(PC + (INT8)OpRead8(modAdd+1))+bamOffset/8);
883 bamOffset&=7;
884 return 3;
885 }
886
am1PCDoubleDisplacement16(void)887 static UINT32 am1PCDoubleDisplacement16(void)
888 {
889 switch (modDim)
890 {
891 case 0:
892 amOut=MemRead8(MemRead32(PC + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3));
893 break;
894
895 case 1:
896 amOut=MemRead16(MemRead32(PC + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3));
897 break;
898
899 case 2:
900 amOut=MemRead32(MemRead32(PC + (INT16)OpRead16(modAdd+1)) + (INT16)OpRead16(modAdd+3));
901 break;
902 }
903
904 return 5;
905 }
906
bam1PCDoubleDisplacement16(void)907 static UINT32 bam1PCDoubleDisplacement16(void)
908 {
909 bamOffset=OpRead16(modAdd+3);
910 amOut=MemRead32(MemRead32(PC + (INT16)OpRead16(modAdd+1))+bamOffset/8);
911 bamOffset&=7;
912 return 5;
913 }
914
915
am1PCDoubleDisplacement32(void)916 static UINT32 am1PCDoubleDisplacement32(void)
917 {
918 switch (modDim)
919 {
920 case 0:
921 amOut=MemRead8(MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5));
922 break;
923
924 case 1:
925 amOut=MemRead16(MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5));
926 break;
927
928 case 2:
929 amOut=MemRead32(MemRead32(PC + OpRead32(modAdd+1)) + OpRead32(modAdd+5));
930 break;
931 }
932
933 return 9;
934 }
935
bam1PCDoubleDisplacement32(void)936 static UINT32 bam1PCDoubleDisplacement32(void)
937 {
938 bamOffset=OpRead32(modAdd+5);
939 amOut=MemRead32(MemRead32(PC + OpRead32(modAdd+1))+bamOffset/8);
940 bamOffset&=7;
941 return 9;
942 }
943
am1DirectAddress(void)944 static UINT32 am1DirectAddress(void)
945 {
946 switch (modDim)
947 {
948 case 0:
949 amOut=MemRead8(OpRead32(modAdd+1));
950 break;
951
952 case 1:
953 amOut=MemRead16(OpRead32(modAdd+1));
954 break;
955
956 case 2:
957 amOut=MemRead32(OpRead32(modAdd+1));
958 break;
959 }
960
961 return 5;
962 }
963
bam1DirectAddress(void)964 static UINT32 bam1DirectAddress(void)
965 {
966 bamOffset=0;
967 amOut=MemRead32(OpRead32(modAdd+1));
968 return 5;
969 }
970
am1DirectAddressIndexed(void)971 static UINT32 am1DirectAddressIndexed(void)
972 {
973 switch (modDim)
974 {
975 case 0:
976 amOut=MemRead8(OpRead32(modAdd+2) + v60.reg[modVal&0x1F]);
977 break;
978
979 case 1:
980 amOut=MemRead16(OpRead32(modAdd+2) + v60.reg[modVal&0x1F]*2);
981 break;
982
983 case 2:
984 amOut=MemRead32(OpRead32(modAdd+2) + v60.reg[modVal&0x1F]*4);
985 break;
986 }
987
988 return 6;
989 }
990
bam1DirectAddressIndexed(void)991 static UINT32 bam1DirectAddressIndexed(void)
992 {
993 bamOffset=v60.reg[modVal&0x1F];
994 amOut=MemRead32(OpRead32(modAdd+2)+bamOffset/8);
995 bamOffset&=7;
996 return 6;
997 }
998
am1DirectAddressDeferred(void)999 static UINT32 am1DirectAddressDeferred(void)
1000 {
1001 switch (modDim)
1002 {
1003 case 0:
1004 amOut=MemRead8(MemRead32(OpRead32(modAdd+1)));
1005 break;
1006
1007 case 1:
1008 amOut=MemRead16(MemRead32(OpRead32(modAdd+1)));
1009 break;
1010
1011 case 2:
1012 amOut=MemRead32(MemRead32(OpRead32(modAdd+1)));
1013 break;
1014 }
1015
1016 return 5;
1017 }
1018
bam1DirectAddressDeferred(void)1019 static UINT32 bam1DirectAddressDeferred(void)
1020 {
1021 bamOffset=0;
1022 amOut=MemRead32(MemRead32(OpRead32(modAdd+1)));
1023 return 5;
1024 }
1025
am1DirectAddressDeferredIndexed(void)1026 static UINT32 am1DirectAddressDeferredIndexed(void)
1027 {
1028 switch (modDim)
1029 {
1030 case 0:
1031 amOut=MemRead8(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F]);
1032 break;
1033
1034 case 1:
1035 amOut=MemRead16(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F]*2);
1036 break;
1037
1038 case 2:
1039 amOut=MemRead32(MemRead32(OpRead32(modAdd+2)) + v60.reg[modVal&0x1F]*4);
1040 break;
1041 }
1042
1043 return 6;
1044 }
1045
bam1DirectAddressDeferredIndexed(void)1046 static UINT32 bam1DirectAddressDeferredIndexed(void)
1047 {
1048 bamOffset=v60.reg[modVal&0x1F];
1049 amOut=MemRead32(MemRead32(OpRead32(modAdd+2))+bamOffset/8);
1050 bamOffset&=7;
1051 return 6;
1052 }
1053
am1Immediate(void)1054 static UINT32 am1Immediate(void)
1055 {
1056 switch (modDim)
1057 {
1058 case 0:
1059 amOut=OpRead8(modAdd+1);
1060 return 2;
1061 break;
1062
1063 case 1:
1064 amOut=OpRead16(modAdd+1);
1065 return 3;
1066 break;
1067
1068 case 2:
1069 amOut=OpRead32(modAdd+1);
1070 return 5;
1071 break;
1072 }
1073
1074 // It should not be here! Written to avoid warning
1075 assert(0);
1076 return 1;
1077 }
1078
am1ImmediateQuick(void)1079 static UINT32 am1ImmediateQuick(void)
1080 {
1081 amOut=modVal&0xF;
1082 return 1;
1083 }
1084
1085
1086
1087
1088 // AM1 Tables (for ReadAM)
1089 // ***********************
1090
am1Error1(void)1091 static UINT32 am1Error1(void)
1092 {
1093 //fatalerror("CPU - AM1 - 1 (PC=%06x)", PC);
1094 return 0; /* never reached, fatalerror won't return */
1095 }
1096
bam1Error1(void)1097 static UINT32 bam1Error1(void)
1098 {
1099 //fatalerror("CPU - BAM1 - 1 (PC=%06x)", PC);
1100 return 0; /* never reached, fatalerror won't return */
1101 }
1102
am1Error2(void)1103 static UINT32 am1Error2(void)
1104 {
1105 //fatalerror("CPU - AM1 - 2 (PC=%06x)", PC);
1106 return 0; /* never reached, fatalerror won't return */
1107 }
1108
bam1Error2(void)1109 static UINT32 bam1Error2(void)
1110 {
1111 //fatalerror("CPU - BAM1 - 2 (PC=%06x)", PC);
1112 return 0; /* never reached, fatalerror won't return */
1113 }
1114
1115 #if 0
1116 static UINT32 am1Error3(void)
1117 {
1118 //fatalerror("CPU - AM1 - 3 (PC=%06x)", PC);
1119 return 0; /* never reached, fatalerror won't return */
1120 }
1121
1122 static UINT32 bam1Error3(void)
1123 {
1124 //fatalerror("CPU - BAM1 - 3 (PC=%06x)", PC);
1125 return 0; /* never reached, fatalerror won't return */
1126 }
1127 #endif
1128
am1Error4(void)1129 static UINT32 am1Error4(void)
1130 {
1131 //fatalerror("CPU - AM1 - 4 (PC=%06x)", PC);
1132 return 0; /* never reached, fatalerror won't return */
1133 }
1134
bam1Error4(void)1135 static UINT32 bam1Error4(void)
1136 {
1137 //fatalerror("CPU - BAM1 - 4 (PC=%06x)", PC);
1138 return 0; /* never reached, fatalerror won't return */
1139 }
1140
am1Error5(void)1141 static UINT32 am1Error5(void)
1142 {
1143 //fatalerror("CPU - AM1 - 5 (PC=%06x)", PC);
1144 return 0; /* never reached, fatalerror won't return */
1145 }
1146
bam1Error5(void)1147 static UINT32 bam1Error5(void)
1148 {
1149 //fatalerror("CPU - BAM1 - 5 (PC=%06x)", PC);
1150 return 0; /* never reached, fatalerror won't return */
1151 }
1152
bam1Error6(void)1153 static UINT32 bam1Error6(void)
1154 {
1155 //fatalerror("CPU - BAM1 - 6 (PC=%06x)", PC);
1156 return 0; /* never reached, fatalerror won't return */
1157 }
1158
1159 static UINT32 (*const AMTable1_G7a[16])(void) =
1160 {
1161 am1PCDisplacementIndexed8,
1162 am1PCDisplacementIndexed16,
1163 am1PCDisplacementIndexed32,
1164 am1DirectAddressIndexed,
1165 am1Error5,
1166 am1Error5,
1167 am1Error5,
1168 am1Error5,
1169 am1PCDisplacementIndirectIndexed8,
1170 am1PCDisplacementIndirectIndexed16,
1171 am1PCDisplacementIndirectIndexed32,
1172 am1DirectAddressDeferredIndexed,
1173 am1Error5,
1174 am1Error5,
1175 am1Error5,
1176 am1Error5
1177 };
1178
1179 static UINT32 (*const BAMTable1_G7a[16])(void) =
1180 {
1181 bam1PCDisplacementIndexed8,
1182 bam1PCDisplacementIndexed16,
1183 bam1PCDisplacementIndexed32,
1184 bam1DirectAddressIndexed,
1185 bam1Error5,
1186 bam1Error5,
1187 bam1Error5,
1188 bam1Error5,
1189 bam1PCDisplacementIndirectIndexed8,
1190 bam1PCDisplacementIndirectIndexed16,
1191 bam1PCDisplacementIndirectIndexed32,
1192 bam1DirectAddressDeferredIndexed,
1193 bam1Error5,
1194 bam1Error5,
1195 bam1Error5,
1196 bam1Error5
1197 };
1198
1199
am1Group7a(void)1200 static UINT32 am1Group7a(void)
1201 {
1202 if (!(modVal2&0x10))
1203 return am1Error4();
1204
1205 return AMTable1_G7a[modVal2&0xF]();
1206 }
1207
bam1Group7a(void)1208 static UINT32 bam1Group7a(void)
1209 {
1210 if (!(modVal2&0x10))
1211 return bam1Error4();
1212
1213 return BAMTable1_G7a[modVal2&0xF]();
1214 }
1215
1216 static UINT32 (*const AMTable1_G7[32])(void) =
1217 {
1218 am1ImmediateQuick,
1219 am1ImmediateQuick,
1220 am1ImmediateQuick,
1221 am1ImmediateQuick,
1222 am1ImmediateQuick,
1223 am1ImmediateQuick,
1224 am1ImmediateQuick,
1225 am1ImmediateQuick,
1226 am1ImmediateQuick,
1227 am1ImmediateQuick,
1228 am1ImmediateQuick,
1229 am1ImmediateQuick,
1230 am1ImmediateQuick,
1231 am1ImmediateQuick,
1232 am1ImmediateQuick,
1233 am1ImmediateQuick,
1234 am1PCDisplacement8,
1235 am1PCDisplacement16,
1236 am1PCDisplacement32,
1237 am1DirectAddress,
1238 am1Immediate,
1239 am1Error2,
1240 am1Error2,
1241 am1Error2,
1242 am1PCDisplacementIndirect8,
1243 am1PCDisplacementIndirect16,
1244 am1PCDisplacementIndirect32,
1245 am1DirectAddressDeferred,
1246 am1PCDoubleDisplacement8,
1247 am1PCDoubleDisplacement16,
1248 am1PCDoubleDisplacement32,
1249 am1Error2
1250 };
1251
1252 static UINT32 (*const BAMTable1_G7[32])(void) =
1253 {
1254 bam1Error6,
1255 bam1Error6,
1256 bam1Error6,
1257 bam1Error6,
1258 bam1Error6,
1259 bam1Error6,
1260 bam1Error6,
1261 bam1Error6,
1262 bam1Error6,
1263 bam1Error6,
1264 bam1Error6,
1265 bam1Error6,
1266 bam1Error6,
1267 bam1Error6,
1268 bam1Error6,
1269 bam1Error6,
1270 bam1PCDisplacement8,
1271 bam1PCDisplacement16,
1272 bam1PCDisplacement32,
1273 bam1DirectAddress,
1274 bam1Error6,
1275 bam1Error2,
1276 bam1Error2,
1277 bam1Error2,
1278 bam1PCDisplacementIndirect8,
1279 bam1PCDisplacementIndirect16,
1280 bam1PCDisplacementIndirect32,
1281 bam1DirectAddressDeferred,
1282 bam1PCDoubleDisplacement8,
1283 bam1PCDoubleDisplacement16,
1284 bam1PCDoubleDisplacement32,
1285 bam1Error2
1286 };
1287
1288
1289
1290 static UINT32 (*const AMTable1_G6[8])(void) =
1291 {
1292 am1DisplacementIndexed8,
1293 am1DisplacementIndexed16,
1294 am1DisplacementIndexed32,
1295 am1RegisterIndirectIndexed,
1296 am1DisplacementIndirectIndexed8,
1297 am1DisplacementIndirectIndexed16,
1298 am1DisplacementIndirectIndexed32,
1299 am1Group7a
1300 };
1301
1302 static UINT32 (*const BAMTable1_G6[8])(void) =
1303 {
1304 bam1DisplacementIndexed8,
1305 bam1DisplacementIndexed16,
1306 bam1DisplacementIndexed32,
1307 bam1RegisterIndirectIndexed,
1308 bam1DisplacementIndirectIndexed8,
1309 bam1DisplacementIndirectIndexed16,
1310 bam1DisplacementIndirectIndexed32,
1311 bam1Group7a
1312 };
1313
1314
am1Group6(void)1315 static UINT32 am1Group6(void)
1316 {
1317 modVal2=OpRead8(modAdd+1);
1318 return AMTable1_G6[modVal2>>5]();
1319 }
1320
bam1Group6(void)1321 static UINT32 bam1Group6(void)
1322 {
1323 modVal2=OpRead8(modAdd+1);
1324 return BAMTable1_G6[modVal2>>5]();
1325 }
1326
1327
am1Group7(void)1328 static UINT32 am1Group7(void)
1329 {
1330 return AMTable1_G7[modVal&0x1F]();
1331 }
1332
bam1Group7(void)1333 static UINT32 bam1Group7(void)
1334 {
1335 return BAMTable1_G7[modVal&0x1F]();
1336 }
1337
1338 static UINT32 (*const AMTable1[2][8])(void) =
1339 {
1340 {
1341 am1Displacement8,
1342 am1Displacement16,
1343 am1Displacement32,
1344 am1RegisterIndirect,
1345 am1DisplacementIndirect8,
1346 am1DisplacementIndirect16,
1347 am1DisplacementIndirect32,
1348 am1Group7
1349 },
1350
1351 {
1352 am1DoubleDisplacement8,
1353 am1DoubleDisplacement16,
1354 am1DoubleDisplacement32,
1355 am1Register,
1356 am1Autoincrement,
1357 am1Autodecrement,
1358 am1Group6,
1359 am1Error1
1360 }
1361 };
1362
1363
1364 static UINT32 (*const BAMTable1[2][8])(void) =
1365 {
1366 {
1367 bam1Displacement8,
1368 bam1Displacement16,
1369 bam1Displacement32,
1370 bam1RegisterIndirect,
1371 bam1DisplacementIndirect8,
1372 bam1DisplacementIndirect16,
1373 bam1DisplacementIndirect32,
1374 bam1Group7
1375 },
1376
1377 {
1378 bam1DoubleDisplacement8,
1379 bam1DoubleDisplacement16,
1380 bam1DoubleDisplacement32,
1381 bam1Error6,
1382 bam1Autoincrement,
1383 bam1Autodecrement,
1384 bam1Group6,
1385 bam1Error1
1386 }
1387 };
1388
1389
1390
1391
1392