1 /*
2  *  Copyright (C) 2017 Alexey Khokholov (Nuke.YKT)
3  *
4  *  Redistribution and use of this code or any derivative works are permitted
5  *  provided that the following conditions are met:
6  *
7  *   - Redistributions may not be sold, nor may they be used in a commercial
8  *     product or activity.
9  *
10  *   - Redistributions that are modified from the original source must include the
11  *     complete source code, including the source code for all components used by a
12  *     binary built from the modified sources. However, as a special exception, the
13  *     source code distributed need not include anything that is normally distributed
14  *     (in either source or binary form) with the major components (compiler, kernel,
15  *     and so on) of the operating system on which the executable runs, unless that
16  *     component itself accompanies the executable.
17  *
18  *   - Redistributions must reproduce the above copyright notice, this list of
19  *     conditions and the following disclaimer in the documentation and/or other
20  *     materials provided with the distribution.
21  *
22  *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23  *  AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  *  IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  *  ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
26  *  LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
27  *  CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
28  *  SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
29  *  INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
30  *  CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
31  *  ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
32  *  POSSIBILITY OF SUCH DAMAGE.
33  *
34  *
35  *  Nuked OPN2(Yamaha YM3438) emulator.
36  *  Thanks:
37  *      Silicon Pr0n:
38  *          Yamaha YM3438 decap and die shot(digshadow).
39  *      OPLx decapsulated(Matthew Gambrell, Olli Niemitalo):
40  *          OPL2 ROMs.
41  *
42  * version: 1.0.8
43  */
44 
45 #ifndef YM3438_H
46 #define YM3438_H
47 
48 enum {
49     ym3438_mode_ym2612 = 0x01,      /* Enables YM2612 emulation (MD1, MD2 VA2) */
50     ym3438_mode_readmode = 0x02,    /* Enables status read on any port (TeraDrive, MD1 VA7, MD2, etc) */
51 };
52 
53 #include <stdint.h>
54 
55 typedef uintptr_t       Bitu;
56 typedef intptr_t        Bits;
57 typedef uint64_t        Bit64u;
58 typedef int64_t         Bit64s;
59 typedef uint32_t        Bit32u;
60 typedef int32_t         Bit32s;
61 typedef uint16_t        Bit16u;
62 typedef int16_t         Bit16s;
63 typedef uint8_t         Bit8u;
64 typedef int8_t          Bit8s;
65 
66 typedef struct
67 {
68     Bit32u cycles;
69     Bit32u slot;
70     Bit32u channel;
71     Bit16s mol, mor;
72     /* IO */
73     Bit16u write_data;
74     Bit8u write_a;
75     Bit8u write_d;
76     Bit8u write_a_en;
77     Bit8u write_d_en;
78     Bit8u write_busy;
79     Bit8u write_busy_cnt;
80     Bit8u write_fm_address;
81     Bit8u write_fm_data;
82     Bit8u write_fm_mode_a;
83     Bit16u address;
84     Bit8u data;
85     Bit8u pin_test_in;
86     Bit8u pin_irq;
87     Bit8u busy;
88     /* LFO */
89     Bit8u lfo_en;
90     Bit8u lfo_freq;
91     Bit8u lfo_pm;
92     Bit8u lfo_am;
93     Bit8u lfo_cnt;
94     Bit8u lfo_inc;
95     Bit8u lfo_quotient;
96     /* Phase generator */
97     Bit16u pg_fnum;
98     Bit8u pg_block;
99     Bit8u pg_kcode;
100     Bit32u pg_inc[24];
101     Bit32u pg_phase[24];
102     Bit8u pg_reset[24];
103     Bit32u pg_read;
104     /* Envelope generator */
105     Bit8u eg_cycle;
106     Bit8u eg_cycle_stop;
107     Bit8u eg_shift;
108     Bit8u eg_shift_lock;
109     Bit8u eg_timer_low_lock;
110     Bit16u eg_timer;
111     Bit8u eg_timer_inc;
112     Bit16u eg_quotient;
113     Bit8u eg_custom_timer;
114     Bit8u eg_rate;
115     Bit8u eg_ksv;
116     Bit8u eg_inc;
117     Bit8u eg_ratemax;
118     Bit8u eg_sl[2];
119     Bit8u eg_lfo_am;
120     Bit8u eg_tl[2];
121     Bit8u eg_state[24];
122     Bit16u eg_level[24];
123     Bit16u eg_out[24];
124     Bit8u eg_kon[24];
125     Bit8u eg_kon_csm[24];
126     Bit8u eg_kon_latch[24];
127     Bit8u eg_csm_mode[24];
128     Bit8u eg_ssg_enable[24];
129     Bit8u eg_ssg_pgrst_latch[24];
130     Bit8u eg_ssg_repeat_latch[24];
131     Bit8u eg_ssg_hold_up_latch[24];
132     Bit8u eg_ssg_dir[24];
133     Bit8u eg_ssg_inv[24];
134     Bit32u eg_read[2];
135     Bit8u eg_read_inc;
136     /* FM */
137     Bit16s fm_op1[6][2];
138     Bit16s fm_op2[6];
139     Bit16s fm_out[24];
140     Bit16u fm_mod[24];
141     /* Channel */
142     Bit16s ch_acc[6];
143     Bit16s ch_out[6];
144     Bit16s ch_lock;
145     Bit8u ch_lock_l;
146     Bit8u ch_lock_r;
147     Bit16s ch_read;
148     /* Timer */
149     Bit16u timer_a_cnt;
150     Bit16u timer_a_reg;
151     Bit8u timer_a_load_lock;
152     Bit8u timer_a_load;
153     Bit8u timer_a_enable;
154     Bit8u timer_a_reset;
155     Bit8u timer_a_load_latch;
156     Bit8u timer_a_overflow_flag;
157     Bit8u timer_a_overflow;
158 
159     Bit16u timer_b_cnt;
160     Bit8u timer_b_subcnt;
161     Bit16u timer_b_reg;
162     Bit8u timer_b_load_lock;
163     Bit8u timer_b_load;
164     Bit8u timer_b_enable;
165     Bit8u timer_b_reset;
166     Bit8u timer_b_load_latch;
167     Bit8u timer_b_overflow_flag;
168     Bit8u timer_b_overflow;
169 
170     /* Register set */
171     Bit8u mode_test_21[8];
172     Bit8u mode_test_2c[8];
173     Bit8u mode_ch3;
174     Bit8u mode_kon_channel;
175     Bit8u mode_kon_operator[4];
176     Bit8u mode_kon[24];
177     Bit8u mode_csm;
178     Bit8u mode_kon_csm;
179     Bit8u dacen;
180     Bit16s dacdata;
181 
182     Bit8u ks[24];
183     Bit8u ar[24];
184     Bit8u sr[24];
185     Bit8u dt[24];
186     Bit8u multi[24];
187     Bit8u sl[24];
188     Bit8u rr[24];
189     Bit8u dr[24];
190     Bit8u am[24];
191     Bit8u tl[24];
192     Bit8u ssg_eg[24];
193 
194     Bit16u fnum[6];
195     Bit8u block[6];
196     Bit8u kcode[6];
197     Bit16u fnum_3ch[6];
198     Bit8u block_3ch[6];
199     Bit8u kcode_3ch[6];
200     Bit8u reg_a4;
201     Bit8u reg_ac;
202     Bit8u connect[6];
203     Bit8u fb[6];
204     Bit8u pan_l[6], pan_r[6];
205     Bit8u ams[6];
206     Bit8u pms[6];
207     Bit8u status;
208     Bit32u status_time;
209 } ym3438_t;
210 
211 void OPN2_Reset(ym3438_t *chip);
212 void OPN2_SetChipType(Bit32u type);
213 void OPN2_Clock(ym3438_t *chip, Bit16s *buffer);
214 void OPN2_Write(ym3438_t *chip, Bit32u port, Bit8u data);
215 void OPN2_SetTestPin(ym3438_t *chip, Bit32u value);
216 Bit32u OPN2_ReadTestPin(ym3438_t *chip);
217 Bit32u OPN2_ReadIRQPin(ym3438_t *chip);
218 Bit8u OPN2_Read(ym3438_t *chip, Bit32u port);
219 #endif
220